JPS6187371A - Thin-film semiconductor device - Google Patents
Thin-film semiconductor deviceInfo
- Publication number
- JPS6187371A JPS6187371A JP20822684A JP20822684A JPS6187371A JP S6187371 A JPS6187371 A JP S6187371A JP 20822684 A JP20822684 A JP 20822684A JP 20822684 A JP20822684 A JP 20822684A JP S6187371 A JPS6187371 A JP S6187371A
- Authority
- JP
- Japan
- Prior art keywords
- amorphous silicon
- amorphous
- channel
- film semiconductor
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 27
- 239000010409 thin film Substances 0.000 title claims abstract description 23
- 230000005669 field effect Effects 0.000 claims abstract description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 abstract description 31
- 239000010408 film Substances 0.000 abstract description 14
- 108091006146 Channels Proteins 0.000 abstract description 8
- 239000011521 glass Substances 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 5
- 102000004129 N-Type Calcium Channels Human genes 0.000 abstract description 3
- 108090000699 N-Type Calcium Channels Proteins 0.000 abstract description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 2
- 229910052782 aluminium Inorganic materials 0.000 abstract description 2
- 238000001704 evaporation Methods 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 4
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910021424 microcrystalline silicon Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000011856 silicon-based particle Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78663—Amorphous silicon transistors
- H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は薄膜半導体装置に係り、特に、高速で大電流を
駆動できる非晶質薄膜半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a thin film semiconductor device, and particularly to an amorphous thin film semiconductor device that can drive a large current at high speed.
薄膜半導体装置のなかで、非晶質薄膜半導体装置は低温
で形成できる点が大きな特徴であり、多方面に用途が開
けている。低温で形成できる観点から、ガラス板のよう
な透明な大面積の基板に形成することが可能であシ、代
表的な例として、成品表示装置に応用されている。これ
は、マトリックス状に配置した非晶質薄膜半導体装置で
液晶に加える電圧を制御し、ドツト表示するものである
、この場合、主として電界幼果型素子が使われている。Among thin film semiconductor devices, an amorphous thin film semiconductor device has a major feature in that it can be formed at low temperatures, and has a wide range of applications. Since it can be formed at low temperatures, it is possible to form it on a transparent large-area substrate such as a glass plate, and is typically applied to product display devices. This displays dots by controlling the voltage applied to the liquid crystal using amorphous thin film semiconductor devices arranged in a matrix. In this case, electric field seedling elements are mainly used.
以下、この素子の基本的描成について第２図を用いて説
明する。The basic drawing of this element will be explained below using FIG. 2.
第２図は従来の非晶ｆｉ薄膜半導体装置ｉｏの断面図を
示す、この装置はガラス基板ｌの上にゲート電極２、ゲ
ート絶縁膜３、非晶質７リコン４、ソースＴ！Ｌ極５、
ドレイン電極６がら構成されているっ非晶質シリコン４
は、通常、モノシランガス（ＳｉＨ４）と水素ガスの混
合ガス中でグロー放電させて形成される。ドープ剤を入
れてない真性の非晶質シリコンは暗導電率が低く高抵抗
体である。FIG. 2 shows a cross-sectional view of a conventional amorphous FI thin film semiconductor device io. This device consists of a glass substrate l, a gate electrode 2, a gate insulating film 3, an amorphous silicon 7 silicon 4, a source T! L pole 5,
Amorphous silicon 4 made up of drain electrode 6
is usually formed by glow discharge in a mixed gas of monosilane gas (SiH4) and hydrogen gas. Intrinsic amorphous silicon without dopants has low dark conductivity and high resistance.
従って、この素子はゲート電極２に電圧を加えない楊会
はオフ状態となる。正のゲート電圧全印加すると非晶質
シリコン４とゲート館縁膜３の界面にｎ型チャンネルが
発生し、このチャンネルとソ−スミ極５、ドレイン電極
６とを介して、素子はオン状態となる。Therefore, this element is in an OFF state when no voltage is applied to the gate electrode 2. When the full positive gate voltage is applied, an n-type channel is generated at the interface between the amorphous silicon 4 and the gate edge film 3, and the device is turned on via this channel, the source-semi electrode 5, and the drain electrode 6. Become.
従来の非晶質薄膜半導体装置では、オン電流とオフ屯流
の比が１０４以上となシ、液晶表示装置の単位ドツトを
駆動することが可能でめる。In a conventional amorphous thin film semiconductor device, the ratio of on-current to off-current is 104 or more, and it is possible to drive a unit dot of a liquid crystal display device.
しかし、通常の非晶質シリコンは、多数の局在準位を含
むため、本質的にキャリア移動度が小さく、液晶表示装
置の単位ドラ）ｆｔ駆動するための電流を得るには、素
子のチャンネル幅を大きくする必要があシ、従って、素
子が大型化するのが難点である。また、液晶表示装置の
ドツト数を増して約１０５個以上として大型化する場合
には、各ドツトの走査速度を増す必要がめるが、素子の
キャリア移動度が小さいため、動作スピードが遅く、走
査速度に追従でさなくなシ、正常な液晶表示ができない
点も問題でめる。However, since normal amorphous silicon contains a large number of localized levels, carrier mobility is inherently low, and in order to obtain the current for driving the unit driver (2) ft of a liquid crystal display device, it is necessary to The problem is that the width needs to be increased, and therefore the device becomes larger. Furthermore, when increasing the number of dots in a liquid crystal display device to about 105 or more, it is necessary to increase the scanning speed of each dot, but since the carrier mobility of the element is small, the operating speed is slow, and the scanning speed is There are also problems with the LCD display not being able to properly follow the image.
本発明の目的は、高速で大電流を駆動できる非晶質薄膜
半導体素子を提供することにある。An object of the present invention is to provide an amorphous thin film semiconductor element that can drive a large current at high speed.
［発明の低置〕
本発明は、非晶質薄膜半導体素子の伝導特性を改善する
ため、電界効果素子でチャンネルの形成される領域に電
気伝導度の大きい非晶質半導体膜を設けることを特徴と
する。[Summary of the Invention] The present invention is characterized in that an amorphous semiconductor film with high electrical conductivity is provided in a region where a channel is formed in a field effect element in order to improve the conduction characteristics of an amorphous thin film semiconductor element. shall be.
第１図は本発明による非晶質薄膜半導体装置２０の断面
図を示す。ガラス基板ｌの上に、ゲート電極２、ゲート
絶縁膜３、高導痘性非晶質シリコン４ａ、低導電性非晶
質シリコン４ｂ、ソース成極５、ドレイン電極６が構成
されている。FIG. 1 shows a cross-sectional view of an amorphous thin film semiconductor device 20 according to the present invention. A gate electrode 2, a gate insulating film 3, a highly conductive amorphous silicon 4a, a low conductive amorphous silicon 4b, a source electrode 5, and a drain electrode 6 are formed on a glass substrate l.
ここでの高導電性とは、キャリアの移動度が大きいとい
う意味であシ、非晶質シリコン中にドーピングを行ない
、低抵抗化したという意味ではない。High conductivity here means that carrier mobility is high, and does not mean that the resistance is lowered by doping into amorphous silicon.
非晶質薄膜半導体装置２ｏの製法を説明する。A method for manufacturing the amorphous thin film semiconductor device 2o will be explained.
まず、ガラス基板ｌにｃｒｔ蒸着し、ホトリソグラフィ
法によってパターニングし、ゲート電極２を形成する。First, CRT is deposited on a glass substrate 1 and patterned by photolithography to form a gate electrode 2.
次に、減圧の気相化学反応炉中でグロー放電を発生させ
、ゲート絶縁膜３．高導電性非晶質シリコン４ａ、低導
電性非晶質シリコン４ｂを連続して形成する。すなわち
、まず、ＮＨ３とＳｉＨ４ガス中でグロー放電して、ゲ
ート絶縁膜３を約４０００人形成する。次に、ガスを８
ｒＨａとＨ２に替えグロー放電を行なう。ところで、こ
の反応で非晶質シリコンが生成するが、反応条件によっ
て生成する非晶質シリコンの電気的性質が異なる。例え
ば、グロー放電の出力が２０Ｗでは従来と同様な低導電
性の非晶質シリコンが生成するが、グロー放電の出力を
約ｔｏｏｗにした場合には、高導電性の非晶質シリコン
が生成する。グロー放電の出力が高くなると、高導電性
を持つのけ、膜中に１００人前後の微結晶シリコンが発
生してくるためである。すなわち、短距離秩序を持った
領域が含まれるためで、キャリアの移動度が大きくなっ
てくる。ここでは、このような微結晶シリコンを含んだ
膜を高導電性非晶質シリコンと呼ぶっ
ゲート絶縁膜３の上にガスを替えるだけで、まず、グロ
ー放電の出力を１００〜２００Ｗとして、厚さ約１００
人の高導電性非晶質シリコン４ａ、連続してグロー放電
の出力を約２０Ｗにして、低導電性非晶質シリコン４ｂ
を約４０００人形成する。次に、この非晶質シリコン層
をホトリソグラフィ法で加工して、素子以外の部分を除
去する。Next, a glow discharge is generated in a reduced pressure gas phase chemical reactor, and the gate insulating film 3. High conductivity amorphous silicon 4a and low conductivity amorphous silicon 4b are successively formed. That is, first, about 4000 gate insulating films 3 are formed by glow discharge in NH3 and SiH4 gases. Next, add 8 gas
Glow discharge is performed instead of rHa and H2. Incidentally, although amorphous silicon is produced in this reaction, the electrical properties of the produced amorphous silicon vary depending on the reaction conditions. For example, when the output of glow discharge is 20W, amorphous silicon with low conductivity similar to the conventional one is produced, but when the output of glow discharge is set to about too much, amorphous silicon with high conductivity is produced. . This is because when the output of the glow discharge increases, around 100 microcrystalline silicon particles are generated in the film despite its high conductivity. In other words, this is because a region with short-range order is included, and carrier mobility increases. Here, a film containing such microcrystalline silicon is called highly conductive amorphous silicon.By simply changing the gas on the gate insulating film 3, we first set the glow discharge output to 100 to 200 W, and then About 100
A person's highly conductive amorphous silicon 4a is continuously heated to a glow discharge output of about 20W, and a low conductive amorphous silicon 4b is
approximately 4,000 people. Next, this amorphous silicon layer is processed by photolithography to remove portions other than the elements.
この士に、ソース電極５、ドレイン電極６として、アル
ミニウムを蒸着、加工して形成する。A source electrode 5 and a drain electrode 6 are formed thereon by vapor deposition and processing of aluminum.
本発明による非晶質薄膜半導体装置２ｏの動作について
説明する。ゲート１α圧が印加されない場合は、チャン
ネルが発生せず、素子はオフ状態となる。この場合、リ
ークζ流は、高導電性非晶質シリコン４ａと、低導電性
非晶質シリコン４ｂとを介して流れる。前者の揚重抵抗
が低いが、膜厚が約１００人と非常に薄いため、この部
分を流れることによるリークζ流の増加は実用上無視で
きる。また、後者は、従来と同様に、高抵抗体であり、
これを介して流れるリーク−流は従来素子と同じく微少
でろシ問題とならない。この構造でリーク電流を小さく
保つには、前者の電気伝導度を後者の１０〜１００倍程
度とすること、及び、前者の膜厚を次に述べる、４電性
と改善するのに必要な最少限の厚さにすることである。The operation of the amorphous thin film semiconductor device 2o according to the present invention will be explained. When the gate 1α pressure is not applied, no channel is generated and the device is in an off state. In this case, the leak ζ current flows through the highly conductive amorphous silicon 4a and the low conductive amorphous silicon 4b. Although the former has a low lifting resistance, the film thickness is very thin at about 100 mm, so the increase in leakage ζ flow due to flowing through this part can be ignored in practical terms. In addition, the latter is a high resistance material as before,
The leakage current flowing through this is minute and does not pose a problem as in the conventional element. In order to keep the leakage current small in this structure, the electrical conductivity of the former must be about 10 to 100 times that of the latter, and the film thickness of the former must be the minimum required to improve the tetraconductivity as described below. The thickness must be as thick as possible.
正のゲート％圧を印加した楊居、ｎ型のチャンネルが発
生し、ソース・ドレイン間の電導が可能となる。ところ
で、このチャンネルの発生する深さは高々１００人前後
であるが、この領域は高導電性非晶質シリコン４ａで形
成されており、従来素子に比較して大きな電流を流すこ
とができる。When a positive gate % pressure is applied, an n-type channel is generated and conduction between the source and drain becomes possible. Incidentally, although the depth at which this channel occurs is approximately 100 mm at most, this region is formed of highly conductive amorphous silicon 4a and can flow a larger current than conventional elements.
なお、この高導電性非晶質シリコン４ａは、厚くしてお
くほうが安全であるが、厚くなった場合、リーク−流増
加の原因となるので、チャンネルの発生する深さ程度に
とどめることが好ましい。Note that it is safer to make this highly conductive amorphous silicon 4a thick, but if it becomes thick, it will cause an increase in leakage current, so it is preferable to limit the thickness to a depth at which a channel is generated. .
本発明の実施例では、非晶質半桿体材料として非晶質シ
リコンを例にとって述べたが、ゲルマニウム、炭化ケイ
素等の非晶質薄膜半導体装置にも適用できる。In the embodiments of the present invention, amorphous silicon is used as an example of the amorphous semi-rod material, but the present invention can also be applied to amorphous thin film semiconductor devices made of germanium, silicon carbide, or the like.
本発明によれば、非晶質薄膜半導体装置の導電特性を改
善でき、高速で大世流を流すことができる、換言すれば
、一定心ｖｋ、谷量の素子を得る場合、電界効果素子の
サイズ（チャンネル幅）を縮少することかでさる。また
素子が高速化されることによシ、画紫、駆動用素子以外
に、表示装置全体を駆動する走査回路の同時形成も可能
となる。According to the present invention, it is possible to improve the conductive characteristics of an amorphous thin film semiconductor device, and it is possible to make a large current flow at high speed.In other words, when obtaining a device with a constant core vk and valley amount, It depends on reducing the size (channel width). Furthermore, by increasing the speed of the element, it becomes possible to simultaneously form a scanning circuit for driving the entire display device in addition to the image forming and driving elements.
ム）１図は本発明の一犬施例の非晶質薄膜半導体装置の
断面図、第２図は従来技術を説明するための非晶′Ｊ４
１．薄膜半導体装置の断面図である。
４・・・非晶質シリコン、４ａ・・・高専４性非晶質シ
リコン、４ｂ・・・低専心性非晶負シリコン。Figure 1 is a sectional view of an amorphous thin film semiconductor device according to one embodiment of the present invention, and Figure 2 is an amorphous thin film semiconductor device for explaining the prior art.
1. 1 is a cross-sectional view of a thin film semiconductor device. 4...Amorphous silicon, 4a...Technical college tetramorphic amorphous silicon, 4b...Low concentration amorphous negative silicon.
Claims (1)
いて、 チャンネルが形成される近傍に高導電性非晶質半導体層
、他の部分に低導電性非晶質半導体層を配置したことを
特徴とする薄膜半導体装置。 ２、特許請求の範囲において、前記非晶質半導体層が非
晶質薄膜シリコンであることを特徴とする薄膜半導体装
置。[Claims] 1. In an amorphous thin film semiconductor device that operates by field effect, a highly conductive amorphous semiconductor layer is provided near where a channel is formed, and a low conductive amorphous semiconductor layer is provided in other parts. A thin film semiconductor device characterized by having: 2. A thin film semiconductor device according to the claims, wherein the amorphous semiconductor layer is amorphous thin film silicon.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20822684A JPS6187371A (en) | 1984-10-05 | 1984-10-05 | Thin-film semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20822684A JPS6187371A (en) | 1984-10-05 | 1984-10-05 | Thin-film semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6187371A true JPS6187371A (en) | 1986-05-02 |
Family
ID=16552748
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20822684A Pending JPS6187371A (en) | 1984-10-05 | 1984-10-05 | Thin-film semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6187371A (en) |
Cited By (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0225074A (en) * | 1988-07-13 | 1990-01-26 | Mitsubishi Electric Corp | Thin film transistor and manufacture thereof |
| EP0383743A2 (en) * | 1989-02-17 | 1990-08-22 | International Business Machines Corporation | Thin film transistor |
| US5045905A (en) * | 1988-03-23 | 1991-09-03 | Nippon Precision Circuits Ltd. | Amorphous silicon thin film transistor |
| JPH05235357A (en) * | 1992-02-25 | 1993-09-10 | Semiconductor Energy Lab Co Ltd | Insulated-gate thin-film semiconductor device and manufacture thereof |
| JPH06342909A (en) * | 1990-08-29 | 1994-12-13 | Internatl Business Mach Corp <Ibm> | Thin-film transistor and its manufacture |
| US5894151A (en) * | 1992-02-25 | 1999-04-13 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having reduced leakage current |
| US6028333A (en) * | 1991-02-16 | 2000-02-22 | Semiconductor Energy Laboratory Co., Ltd. | Electric device, matrix device, electro-optical display device, and semiconductor memory having thin-film transistors |
| US6709907B1 (en) | 1992-02-25 | 2004-03-23 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating a thin film transistor |
| JP2007158307A (en) * | 2005-11-08 | 2007-06-21 | Canon Inc | Field effect transistor |
| US7842586B2 (en) | 2007-08-17 | 2010-11-30 | Semiconductor Energy Laboratory Co., Ltd. | Plasma CVD apparatus, method for manufacturing microcrystalline semiconductor layer, and method for manufacturing thin film transistor |
| US7910929B2 (en) | 2007-12-18 | 2011-03-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| US7940345B2 (en) | 2007-07-20 | 2011-05-10 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device |
| US7968879B2 (en) | 2007-12-28 | 2011-06-28 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor and display device including the same |
| US7968885B2 (en) | 2007-08-07 | 2011-06-28 | Semiconductor Energy Laboratory Co., Ltd. | Display device and manufacturing method thereof |
| US8017946B2 (en) | 2007-08-17 | 2011-09-13 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor having microcrystalline semiconductor layer and amorphous semiconductor layer |
| US8030655B2 (en) | 2007-12-03 | 2011-10-04 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor, display device having thin film transistor |
| US8101444B2 (en) | 2007-08-17 | 2012-01-24 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| US8120030B2 (en) | 2008-12-11 | 2012-02-21 | Semiconductor Energy Laboratory Co., Ltd. | Thin film transistor and display device |
| US8227278B2 (en) | 2008-09-05 | 2012-07-24 | Semiconductor Energy Laboratory Co., Ltd. | Methods for manufacturing thin film transistor and display device |
| US8247315B2 (en) | 2008-03-17 | 2012-08-21 | Semiconductor Energy Laboratory Co., Ltd. | Plasma processing apparatus and method for manufacturing semiconductor device |
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| US9054206B2 (en) | 2007-08-17 | 2015-06-09 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
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| JPS6098680A (en) * | 1983-11-04 | 1985-06-01 | Seiko Instr & Electronics Ltd | Field effect type thin film transistor |
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|---|---|---|---|---|
| US5045905A (en) * | 1988-03-23 | 1991-09-03 | Nippon Precision Circuits Ltd. | Amorphous silicon thin film transistor |
| JPH0225074A (en) * | 1988-07-13 | 1990-01-26 | Mitsubishi Electric Corp | Thin film transistor and manufacture thereof |
| EP0383743A2 (en) * | 1989-02-17 | 1990-08-22 | International Business Machines Corporation | Thin film transistor |
| US5101242A (en) * | 1989-02-17 | 1992-03-31 | International Business Machines Corporation | Thin film transistor |
| JPH06342909A (en) * | 1990-08-29 | 1994-12-13 | Internatl Business Mach Corp <Ibm> | Thin-film transistor and its manufacture |
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