JPS6177346A - Terminal of multiple transmitter - Google Patents

Terminal of multiple transmitter

Info

Publication number
JPS6177346A
JPS6177346A JP59199941A JP19994184A JPS6177346A JP S6177346 A JPS6177346 A JP S6177346A JP 59199941 A JP59199941 A JP 59199941A JP 19994184 A JP19994184 A JP 19994184A JP S6177346 A JPS6177346 A JP S6177346A
Authority
JP
Japan
Prior art keywords
circuit
terminals
terminal
dil
cover
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59199941A
Other languages
Japanese (ja)
Other versions
JPH0570939B2 (en
Inventor
Toshiyuki Masuda
敏行 増田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP59199941A priority Critical patent/JPS6177346A/en
Publication of JPS6177346A publication Critical patent/JPS6177346A/en
Publication of JPH0570939B2 publication Critical patent/JPH0570939B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Small-Scale Networks (AREA)
  • Selective Calling Equipment (AREA)

Abstract

PURPOSE:To contrive the MT-conversion and miniaturization of the terminal main body and the cost reduction by a method wherein an LSI, a variety of circuit elements, and address setting switch are mounted on a piece of print board, and pat of DIL terminals are made as mode switch terminals, then the cover having a window is filled with filler. CONSTITUTION:Besides an LSI 2 which constitutes a signal processing logic circuit A, I/O circuits B and C for this circuit A, a power source circuit D, circuit elements 3... constituting peripheral circuits such as a mode setting circuit F and a signal input circuit E, and an address setting switch 4 are mounted on the print board 1. Besides, DIL terminals 5... are projected out of this print board 1: these DIL terminals are I/O terminals of the terminal and mode switch terminals to adapt the circuits on this print board 1 for a various kind of terminals. A print board 1 with a construction of circuits as above-mentioned is provided with a cover 7 having a window 6 through which only 6 the top operation part of the switch 4 is exposed, and this cover 7 is filled with a suitable filler and molded.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、リレーコントロール用や接点入力用、スイッ
チ用等の各種端末器を有し、これら端末器を時分割多重
伝送方式により監視、制御するようにした多重伝送機器
の端末器に関するものである0 〔背景技術〕 従来、この種の多重伝送機器においては、リレーコント
ロール用や接点入力用、スイッチ用等の端末器の種類に
応じて夫々の用途に適合した回路を構成し、これをプリ
ント板上に実装していた。
[Detailed Description of the Invention] [Technical Field] The present invention has various terminal devices for relay control, contact input, switches, etc., and is capable of monitoring and controlling these terminal devices using a time division multiplex transmission method. 0 [Background Art] Conventionally, in this type of multiplex transmission equipment, terminal devices for relay control, contact input, switches, etc. are used for each purpose depending on the type of terminal. A suitable circuit was constructed and mounted on a printed board.

このためかかる従来例においては、各種の端末器毎に回
路設計しなければならない問題を有する他、ICやトラ
ンジスタその他の回路素子の組合せ構成となることから
形状も大型化し、信頼性にも劣る点がでてくるという問
題があった。
For this reason, such conventional examples have the problem of having to design a circuit for each type of terminal device, and also have a large size and poor reliability due to the combination of ICs, transistors, and other circuit elements. There was a problem with the appearance of

〔発明の目的〕[Purpose of the invention]

本発明は、各種用途の端末器として使用できる七ジュー
ルを作成して端末器本体のMT化を図り、小型化及び低
コスト化を図るとともに信頼性を向上した多重伝送機器
の端末器を提供することを目的とするものである。
The present invention creates a 7 joule that can be used as a terminal for various purposes, converts the main body of the terminal into MT, and provides a terminal for multiplex transmission equipment that is smaller and lower in cost and has improved reliability. The purpose is to

〔発明の開示〕[Disclosure of the invention]

第1図(a) (b)は本発明一実施例の分解斜視図及
び斜視図を示′すものであり、づリシト板fll上には
、信号処理ロジック回路Aを構成するL S I +2
1の地路を構成する回路素子13)・・・と、アドレス
設定スイッチ(4)が実装されており、またこのプリン
ト板(1)からはプリント板国際端子配列に適合したD
IL端子(6)・・・が突設され、このDIL端子(5
)・・・が端末器の入出力端子であり、またこのプリン
ト板+1)上の回路を各種の端末器に適合させるための
モード切換端子である。ここでプリント板(1)上に構
成される回路は、第2図ブロック図に示すように、LS
I(2+として構成された信号処理0シック回路Aを中
心として、入力回wSB、出力回路C1電源回路D1信
号入力回路E1モード設定回路F1アドレス設定スイッ
チ(4)等が形成されるものであり、このプリント板(
1)上の具体回路例を第3図に示し、図中同一番号記号
は同一個所を示す。
FIGS. 1(a) and 1(b) show an exploded perspective view and a perspective view of one embodiment of the present invention.
The circuit elements 13) constituting the ground path 1 and the address setting switch (4) are mounted, and from this printed board (1) there is a D
IL terminal (6)... is provided protrudingly, and this DIL terminal (5)
)... are the input/output terminals of the terminal, and mode switching terminals for adapting the circuit on this printed board +1) to various terminals. Here, the circuit configured on the printed board (1) is as shown in the block diagram of FIG.
The input circuit wSB, the output circuit C1, the power supply circuit D1, the signal input circuit E1, the mode setting circuit F1, the address setting switch (4), etc. are formed around the signal processing 0 thick circuit A configured as I(2+). This printed board (
1) A concrete example of the above circuit is shown in FIG. 3, and the same numbers and symbols in the figure indicate the same parts.

かくて上記のような回路が構成されたプリシト板(11
上には、アトしス設定スイッチ(4)の上面操作部のみ
が外部に露出するようにした窓(6)を有するカバー(
7)が被設され、とのカバー(7)内には適宜の充填剤
が充填され、七−ルド化されている。
In this way, the circuit board (11) was constructed with the circuit as described above.
On the top is a cover (6) that has a window (6) that exposes only the top operation section of the Atos setting switch (4).
7) is provided, and the inside of the cover (7) is filled with an appropriate filler and sealed.

〔発明の効果〕〔Effect of the invention〕

本発明は上述のように構成したものであるから、複数種
の端末器を別個に設計製作する必要がなくてMT化が図
れ、小型化及びコストの低減が図れる効果を有し、また
端末器のV:ジュールとして信頼性が確保されることに
より、各種用途の端末器として展開することを極く容易
なものにすることができる効果を有するものである。
Since the present invention is configured as described above, it is not necessary to separately design and manufacture multiple types of terminal devices, and it has the effect of achieving MT, miniaturization, and cost reduction. V: By ensuring reliability as a joule, it has the effect of making it extremely easy to deploy it as a terminal device for various uses.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a) (b)は本発明一実施例の分解斜視図及
び斜視図、第2図は同上のプリント板上に構成される回
路例の″′jロック図、第3図は同上の第2図回路の具
体回路偶因であり、Aは信号処理ロジック回路、Bは入
力回路、Cは出力回路、Dは電源回路、Fは℃−ド設定
回路で、(1)はプリント板、(2)はLSI、+3)
Fi回路素子、(4)はアドレス設定スイッチ、(5)
はDIL端子亀・(6)は窓、(7)はカバーである。   ′
Figures 1 (a) and (b) are an exploded perspective view and perspective view of one embodiment of the present invention, Figure 2 is a lock diagram of an example of a circuit configured on the same printed board, and Figure 3 is the same as the above. The specific circuit cause of the circuit in Figure 2 is as follows: A is a signal processing logic circuit, B is an input circuit, C is an output circuit, D is a power supply circuit, F is a °C-mode setting circuit, and (1) is a printed board. , (2) is LSI, +3)
Fi circuit element, (4) is address setting switch, (5)
is the DIL terminal turtle, (6) is the window, and (7) is the cover. ′

Claims (1)

【特許請求の範囲】[Claims] (1)信号処理ロジック回路を構成するLSIと、その
入出力回路や電源回路、モード設定回路等を構成する各
種回路素子と、アドレス設定スイッチとを一枚のプリン
ト板上に実装するとともに、このプリント板よりDIL
端子を突出してこのDIL端子の一部をリレーコントロ
ール用や接点入力用、スイッチ用等の各種端末器に切換
的に適合させるためのモード切換端子とし、上記アドレ
ス設定スイッチが露出する窓を設けたカバーを前記プリ
ント板に被設し、このカバー内に充填剤を充填して成る
ことを特徴とする多重伝送機器の端末器。
(1) An LSI that constitutes a signal processing logic circuit, various circuit elements that constitute its input/output circuit, power supply circuit, mode setting circuit, etc., and an address setting switch are mounted on a single printed board. DIL from printed board
A portion of this DIL terminal is protruded to serve as a mode switching terminal for adapting it to various terminal devices such as relay control, contact input, and switches, and a window is provided to expose the address setting switch. A terminal device for multiplex transmission equipment, characterized in that a cover is provided on the printed board, and a filler is filled in the cover.
JP59199941A 1984-09-25 1984-09-25 Terminal of multiple transmitter Granted JPS6177346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59199941A JPS6177346A (en) 1984-09-25 1984-09-25 Terminal of multiple transmitter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59199941A JPS6177346A (en) 1984-09-25 1984-09-25 Terminal of multiple transmitter

Publications (2)

Publication Number Publication Date
JPS6177346A true JPS6177346A (en) 1986-04-19
JPH0570939B2 JPH0570939B2 (en) 1993-10-06

Family

ID=16416140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59199941A Granted JPS6177346A (en) 1984-09-25 1984-09-25 Terminal of multiple transmitter

Country Status (1)

Country Link
JP (1) JPS6177346A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04280524A (en) * 1991-03-08 1992-10-06 Sumitomo Wiring Syst Ltd Multiplex communication controller
EP0536739A2 (en) * 1991-10-09 1993-04-14 Canon Kabushiki Kaisha Electrical packaging structure and liquid crystal display device having the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58140642U (en) * 1982-03-15 1983-09-21 日本電気株式会社 Hybrid IC case enclosure structure

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58140642U (en) * 1982-03-15 1983-09-21 日本電気株式会社 Hybrid IC case enclosure structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04280524A (en) * 1991-03-08 1992-10-06 Sumitomo Wiring Syst Ltd Multiplex communication controller
EP0536739A2 (en) * 1991-10-09 1993-04-14 Canon Kabushiki Kaisha Electrical packaging structure and liquid crystal display device having the same
EP0536739A3 (en) * 1991-10-09 1994-06-15 Canon Kk Electrical packaging structure and liquid crystal display device having the same
US5353196A (en) * 1991-10-09 1994-10-04 Canon Kabushiki Kaisha Method of assembling electrical packaging structure and liquid crystal display device having the same

Also Published As

Publication number Publication date
JPH0570939B2 (en) 1993-10-06

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