JPS6175680A - Antenna mixer - Google Patents

Antenna mixer

Info

Publication number
JPS6175680A
JPS6175680A JP19656184A JP19656184A JPS6175680A JP S6175680 A JPS6175680 A JP S6175680A JP 19656184 A JP19656184 A JP 19656184A JP 19656184 A JP19656184 A JP 19656184A JP S6175680 A JPS6175680 A JP S6175680A
Authority
JP
Japan
Prior art keywords
coil
transistor
parallel
switching diode
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19656184A
Other languages
Japanese (ja)
Inventor
Shinichi Fujimura
藤村 信一
Tsutomu Kawase
川瀬 務
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP19656184A priority Critical patent/JPS6175680A/en
Publication of JPS6175680A publication Critical patent/JPS6175680A/en
Pending legal-status Critical Current

Links

Landscapes

  • Noise Elimination (AREA)
  • Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Electronic Switches (AREA)
  • Networks Using Active Elements (AREA)

Abstract

PURPOSE:To obtain a good damping characteristic of the interference signal with simple circuit composition by connecting a coil in parallel to the transistor for amplifying a TV signal and the switching diode which turns on-off and setting a responance frequency of the parallel resonance circuit formed by a reverse capacity of the diode and inductance of the coil to the interference frequency. CONSTITUTION:A parallel coil L1 is inserted to the switching diode D1, when D1 is off, a parallel resonance is composed by the reverse capacity of D1 and the coil L1 and the resonance frequency is set to the interference frequency. Within + or -32MHz of the set value, the damping characteristic of min 20dB can be obtained. Matching with 20dB in the non-action condition of a transistor Q2, a resonance characteristic 40dB or above can be obtained and the necessary resonance frequency min 40dB is satisified by only one step of the transistor Q2. A resistance R1 is the one for the bias from a B circuit of the switching diode D1 and to stably operate the switching diode D1. A capacitor C1 is for a direct cut.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、アンテナミキサに関する。[Detailed description of the invention] (Industrial application field) The present invention relates to an antenna mixer.

(従来例の構成とその問題点) 第2図は、従来のアンテナミキサ回路を示す図であるが
、説明を簡単にするため、信号伝送回路とバイアス回路
のみとする。
(Structure of Conventional Example and Its Problems) FIG. 2 is a diagram showing a conventional antenna mixer circuit, but to simplify the explanation, only a signal transmission circuit and a bias circuit are shown.

RF−INより入力された外部信号(TV信号)は、ト
ランジスタロ工で増幅され、分配トランスT□で一方は
VTR−0UT (VTRの録画用人力信号としてVT
Rのデモシュレータ入力)に、他方は、トランジスタQ
2・Q、を介しコンバータ信号(VTR再生信号)と整
合トランスT2で合成されRF−OUTに出力される。
The external signal (TV signal) input from RF-IN is amplified by a transistor transformer, and one side is amplified by a distribution transformer T□.
(demosulator input of R), the other is a transistor Q
2.Q, the signal is combined with the converter signal (VTR reproduction signal) by the matching transformer T2, and output to RF-OUT.

この回路には、トランジスタロ工を動作させる8回路と
トランジスタQ2・Q3をon−offする85回路を
有している。
This circuit has 8 circuits for operating the transistors and 85 circuits for turning on and off the transistors Q2 and Q3.

B5回路は、TV−MODE (TV受信)時とVTR
−MODE (VTR再生)時を切換え、それぞれ12
V・Ovに設定する。
The B5 circuit is used for TV-MODE (TV reception) and VTR.
-Switch the MODE (VTR playback) time, each with 12
Set to V・Ov.

B、=12V時、TV−MODE”C−スイッチングダ
イオードD工・D2はon となり、トランジスタQ2
・Q、が動作状態となりRF−INよりの信号がロスな
くRF−OUTに伝送される。
When B, = 12V, TV-MODE"C-switching diode D/D2 is on, and transistor Q2
-Q becomes operational and the signal from RF-IN is transmitted to RF-OUT without loss.

Bs=ov時、VTR−MODE’?’スイッチングダ
イオードD工・D2はoffとなり、トランジスタQ2
・Q、は不動作状態となり、RF−INよりの信号が減
衰され、RFコンバータ1の再生信号に外部信号による
妨害を与えないようになっている。
When Bs=ov, VTR-MODE'? 'Switching diode D/D2 is turned off, and transistor Q2
Q is in an inactive state, and the signal from RF-IN is attenuated so that the reproduced signal of the RF converter 1 is not interfered with by external signals.

ところで、特殊地区においては、RFコンバータ1の再
生信号(591,25±32MHz)付近に外部妨害信
号を有し、再生信号にビート等の妨害を与えないよう前
記の回路を有している。すなわちトランジスタQ2・Q
□の不動作状態でミニマム(win)40dBの減衰特
性を満たす回路構成になっている。
By the way, in special areas, there is an external interference signal near the reproduced signal (591, 25±32 MHz) of the RF converter 1, and the above-mentioned circuit is provided to prevent interference such as beats from being caused to the reproduced signal. In other words, transistor Q2・Q
The circuit configuration satisfies a minimum (win) 40 dB attenuation characteristic in the non-operating state of □.

しかしながら、従来のものは、妨害信号の減衰特性m1
n40dBを得る為に、複雑な回路構成を必要としてい
た。
However, in the conventional method, the attenuation characteristic m1 of the interference signal is
In order to obtain n40dB, a complicated circuit configuration was required.

(発明の目的) 本発明は、斯かる事情に鑑みてなされたもので、簡単な
回路構成で、妨害信号の良好な減衰特性が得られるアン
テナミキサを提供しようとするものである。
(Objective of the Invention) The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide an antenna mixer that has a simple circuit configuration and can obtain good attenuation characteristics for interfering signals.

(発明の構成) 本発明は、VTR用アンテナミキサ回路において、TV
信号増幅用トランジスタをon−offするスイッチン
グダイオードに並列にコイルを接続し、前記ダイオード
の逆容量と前記コイルのインダクタンスで形成される並
列共振回路の共振周波数を妨害周波数に設定し、必要な
減衰特性を達成するものである。
(Structure of the Invention) The present invention provides an antenna mixer circuit for a VTR.
A coil is connected in parallel to a switching diode that turns the signal amplification transistor on and off, and the resonant frequency of the parallel resonant circuit formed by the inverse capacitance of the diode and the inductance of the coil is set to the disturbance frequency, and the necessary attenuation characteristics are set. The goal is to achieve the following.

(実施例の説明) 第1図は本発明によるアンテナミキサ回路の一実施例を
示す図で、第2図と同一符号は同一内容を示している。
(Description of Embodiment) FIG. 1 is a diagram showing an embodiment of an antenna mixer circuit according to the present invention, and the same reference numerals as in FIG. 2 indicate the same contents.

第2図の説明においてスイッチングダイオードD□は、
トランジスタQ2のバイアスをon−offする動作で
あったが1本実施例においては、このスイッチングダイ
オードD、に並列にコイルL工を挿入し、D工のoff
時、Dlの逆容量とコイルL□で並列共振回路を構成し
、その共振周波数を妨害周波数に設定する。設定値の±
32MHz内でm1n20dBの減衰特性を得る事がで
きる。トランジスタQ2の不動作状態で20dBと合せ
て、減衰特性40dB以上になり、第2図における、ト
ランジス502段の回路を省略しても、必要な減衰特性
m1n40dBを満足する。
In the explanation of FIG. 2, the switching diode D□ is
The operation was to turn on and off the bias of the transistor Q2, but in this embodiment, a coil L is inserted in parallel with this switching diode D, and the bias of the transistor Q2 is turned off.
At this time, the inverse capacitance of Dl and the coil L□ constitute a parallel resonant circuit, and the resonant frequency is set as the disturbance frequency. ± of setting value
Attenuation characteristics of m1n20dB can be obtained within 32MHz. Combined with 20 dB in the non-operating state of the transistor Q2, the attenuation characteristic becomes 40 dB or more, and even if the circuit of 502 stages of transistors in FIG. 2 is omitted, the required attenuation characteristic m1n of 40 dB is satisfied.

抵抗R工は、スイッチングダイオードD工の8回路より
のバイアス用抵抗であり、スイッチングダイオードD1
を安定動作させるためである。コンデンサC工は直流カ
ット用である。
The resistor R is a bias resistor for the 8 circuits of switching diodes D, and the switching diode D1
This is to ensure stable operation. Capacitor C type is for DC cut.

(発明の効果) 以上のように本発明によれば回路素子を大幅に削減し、
簡単な回路構成で従来と同等以上の妨害排除能力を有す
ることができ、工業的価値は非常に高いものである。
(Effects of the Invention) As described above, according to the present invention, the number of circuit elements can be significantly reduced.
With a simple circuit configuration, it is possible to have an interference rejection ability equal to or higher than that of the conventional one, and the industrial value is extremely high.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によるアンテナミキサ回路の一実施例を
示す図、第2図は従来のアンテナミキサ回路を示す図で
ある。 1 ・・・RFコンバータ、 Q工、Q2・・・ トラ
ンジスタ、 Tよ、T2・・・ トランス、 D工・・
・スイッチングダイオード、 Ll・・・コイル。 C0・・・コンデンサ。
FIG. 1 is a diagram showing an embodiment of an antenna mixer circuit according to the present invention, and FIG. 2 is a diagram showing a conventional antenna mixer circuit. 1...RF converter, Q engineering, Q2... transistor, T, T2... transformer, D engineering...
・Switching diode, Ll...coil. C0... Capacitor.

Claims (1)

【特許請求の範囲】[Claims] VTR用アンテナミキサ回路において、TV信号増幅用
トランジスタのオンオフ用ダイオードに並列にコイルを
接続し、前記ダイオードの逆容量と前記コイルのインダ
クタンスで形成される並列共振回路の共振周波数を、妨
害周波数に設定したことを特徴とするアンテナミキサ。
In an antenna mixer circuit for a VTR, a coil is connected in parallel to an on/off diode of a transistor for TV signal amplification, and the resonant frequency of a parallel resonant circuit formed by the inverse capacitance of the diode and the inductance of the coil is set to the interference frequency. Antenna mixer characterized by:
JP19656184A 1984-09-21 1984-09-21 Antenna mixer Pending JPS6175680A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19656184A JPS6175680A (en) 1984-09-21 1984-09-21 Antenna mixer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19656184A JPS6175680A (en) 1984-09-21 1984-09-21 Antenna mixer

Publications (1)

Publication Number Publication Date
JPS6175680A true JPS6175680A (en) 1986-04-18

Family

ID=16359778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19656184A Pending JPS6175680A (en) 1984-09-21 1984-09-21 Antenna mixer

Country Status (1)

Country Link
JP (1) JPS6175680A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542412A (en) * 1978-09-20 1980-03-25 Hitachi Ltd Electronic high frequency switch

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5542412A (en) * 1978-09-20 1980-03-25 Hitachi Ltd Electronic high frequency switch

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