JPS6133747Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an operation mode designation circuit for a television audio multiplex receiver.

Signal processing of television audio multiplexed signals, such as matrix and switching circuits, are implemented as integrated circuits. A mode command circuit that commands the operation mode of this signal processing circuit is connected through an external terminal of the IC. For example, when receiving a dual audio broadcast of a television audio multiplex signal, this mode command circuit sends (i) both main channel signals, (ii) both sub channel signals, (iii) A case where a main channel signal is selectively provided to one side, a sub-channel signal is provided to the other side, and (iv) a signal opposite to the above (iii) is provided as an alternative, and (i) above.
There are cases where the signals in ~(iii) are provided alternatively. In the former case, as shown in page 60 of the ``Television Society Technical Report'' published on December 22, 1971, one circuit four-contact switch is connected to three ICs.
In the latter case, as shown in "Television" Vol. 27, No. 1 (1973), p. 38, the external terminal of the IC is connected via two external terminals. It is constructed by combining these with individual switches and switches with one circuit and three contacts. As described above, although the former method allows for four types of reception modes for dual audio broadcasting, it requires many external IC terminals. In the latter case, on the other hand, only two external IC terminals are required, but only three reception modes can be selected. In the latter case, the IC configuration shown in this document cannot realize either mode (iii) or (vi), no matter how the mode command circuit is configured.

The present invention reduces the number of external IC terminals required for mode commands when receiving dual audio broadcasts of television audio multiplexed signals to two, and furthermore, by appropriately designing the mode command circuit, dual audio broadcasting can be performed as needed. It is an object of the present invention to provide an operation mode designation circuit for a television audio multiplex receiver that can select four or three types of broadcast reception modes.

Next, the present invention will be explained based on embodiments shown in the drawings. As shown in Figure 1, the television audio multiplex signal is made by frequency multiplexing the main channel signal A, the sub channel signal B, and the control channel signal C. is the main audio signal and also consists of a sum signal in the case of stereo broadcasting, and the subchannel signal consists of the subcarrier center frequency ( _2H : _H is the horizontal frequency) as the subaudio signal (in the case of dual audio broadcasting) or The control signal consists of a difference signal (in the case of stereo broadcasting) that is frequency-modulated, and the control signal subcarrier (3.5 _H ) for distinguishing these two types of broadcasting is converted into a first wave number ( ₁ = 922.5). Hz; in the case of dual audio broadcasting) or the second frequency ( ₂ = 982.5Hz; in the case of stereo broadcasting). This television audio multiplex signal is obtained by FM modulating the audio carrier wave of the television broadcast signal. Therefore, this television audio multiplexed signal can be derived to the output terminal of the front end including the tuner, IF circuit, FM discrimination circuit, etc.

FIG. 2 shows a circuit block diagram of the main part of the receiver for this signal. The television audio multiplexed signal derived from the output terminal 2 of the front end 1 is applied to a low-pass filter 3 and a band-pass filter 4 via a preamplifier 5, and from the low-pass filter 3, the main channel signal A is Further, the sub channel signal B and the control channel signal C are separated from the band pass filter 4. The sub-channel signal B is transmitted through a limiter amplifier 7 and a pulse counter type discrimination circuit 8 built into the integrated circuit IC 6.
and a demodulation circuit 10 including an amplifier 9, and derives a sub-audio signal or a difference signal as its output. The output of this demodulation circuit is passed through a low-pass filter 11 for removing subcarriers and a stereo separation degree adjuster 12.
The signal is then input to the signal processing circuit 13 in the IC 6 together with the main audio signal or sum signal constituting the main channel signal A.

The control channel signal C separated from the bandpass filter 4 is applied to an amplifier 14 and an AM detection circuit 15 in the IC 6, and a control signal of the first or second frequency is derived as an output thereof. 16 is a tuning circuit tuned to the control signal subcarrier (3.5 _H ). This control signal is transmitted to the first and second PLLs 1 provided in the second IC 17 (it goes without saying that elements of this IC may be included in the first IC to form a single chip).
8 and 19, and derive valid signals from the first PLL 18 when the control signal is at the first frequency, and from the second PLL 19 when the control signal is at the second frequency. That's what I do.

Each output signal from the first and second PLLs 18 and 19 is applied to a comparator 20 in the first IC 6, and the output signal from the comparator 20 is applied to the first and second control circuits 21 and 21 in the signal processing circuit 13, respectively. 2
2 and the indicator drive circuit 23. The indicator drive circuit 23 has light emitting diodes L ₁ and L ₂ connected in parallel in opposite directions between its output terminal 24 and a point 27 where the power source is divided by resistors 25 and 26. The light emitting diode _L1 is selectively turned on when receiving an audio broadcast, and the light emitting diode _L2 is selectively turned on when receiving a stereo broadcast. Note that this comparator 20 is connected to the first and second control circuits 21 and 2.
2. When receiving a stereo broadcast, a high level control signal is applied, and when receiving a dual audio broadcast, a low level control signal is applied.

Next, an embodiment of the signal processing circuit 13 will be described based on the actual circuit diagram shown in FIG. This signal processing circuit 13 includes a first input terminal 28 into which a first signal (main channel signal) is introduced, and first and second differential amplifiers A1 and 28 into which the first signal from this first input terminal is respectively introduced. A2, a second input terminal 29 that introduces a second signal (demodulated sub-channel signal), and third and fourth differential amplifiers A3 and A4 that respectively introduce the second signal from this second input terminal. , a fifth differential amplifier A5 configured on the upper stage of the third differential amplifier A3, and a second and/or third differential amplifier A.
2, the first output circuit 3 that derives the output signal of A3
0 and the first and/or fourth differential amplifier A1,
A second output circuit 31 that derives the output signal of A4
and first, second, third and fourth differential amplifiers A
A first control circuit 21 that generates first to fourth control signals a 1 , a 2 , a 3 , and a 4 that individually control the operations of A ₁ , A ₂ , A ₃ , and A ₄ , and a 5 th differential amplifier. A second control circuit 22 that controls the operation of A5 and the operation of the first control circuit 21 is provided.

First to fourth differential amplifiers A1, A2, A3, A
4 are the first to common constant voltage circuits 32, respectively.
It has a fourth constant current source B1, B2, B3, B4,
The first and second differential amplifiers A1 and A2 are energized by a first bias circuit 33, and the third and fourth differential amplifiers A3 and A4 are energized by a second bias circuit 34. . The first differential amplifier A1 includes the first to fourth transistors Q ₁ , Q ₂ ,
Q ₃ , Q ₄ and receives the first signal from the first input terminal 28 through the emitter follower type transistor Q ₅ , amplifies it by the first and fourth transistors Q ₁ and Q ₄ and sends it to the second output circuit 31 . It is made possible to provide. Further, the second differential amplifier A2 includes the sixth to ninth transistors Q ₆ , Q ₇ , Q ₈ , Q ₉
and receives the first signal from the first input terminal 28 through the emitter follower type tenth transistor _Q10 , amplifies it by the sixth and ninth transistors _Q6 and _Q9 , and supplies it to the first output circuit 30. is made possible. Also, a third differential amplifier A
3 are the 11th to 14th transistors Q ₁₁ , Q ₁₂ , Q ₁₃ ,
Q ₁₄ receives the second signal from the second input terminal 29 through the emitter follower type 15th transistor Q ₁₅ and transmits it to the 11th, 14th transistors Q ₁₁ ,
The signal is amplified by Q ₁₄ and further supplied to the first output circuit 30 through a fifth differential amplifier A5 arranged above the third differential amplifier. Furthermore, the fourth differential amplifier A4 is the 16th to 19th differential amplifier.
It has transistors Q ₁₆ , Q ₁₇ , Q ₁₈ , and Q ₁₉ and receives the second signal from the second input terminal 29 and transmits it to the second input terminal 29.
The signal can be amplified by the 16th and 19th transistors Q ₁₆ and Q ₁₉ and supplied to the second output circuit 31 . The fifth differential amplifier A5 has the 20th to 23rd transistors Q ₂₀ , Q ₂₁ , Q ₂₂ , and Q ₂₃ , and when the 20th and 23rd transistors Q ₂₀ and Q ₂₃ are on, the second
The output signal in phase with the second signal from the input terminal 29 is passed through the 14th transistor Q ₁₄ of the third differential amplifier A3, and also through the 21st and 22nd transistors Q ₂₁ ,
When Q ₂₂ is on, the output signal with the opposite phase to the second signal from the second input terminal is sent to the third differential amplifier A3.
The signals are distributed and supplied to the first output circuit 30 through 11 transistors _Q11 .

The first output circuit 30 and the second output circuit 31 include the 24th, 25th, 26th, and 27th transistors, respectively.
Q ₂₄ , Q ₂₅ , Q ₂₆ , and Q ₂₇ , and each amplified output signal thereof is configured to be derived through first and second output terminals 35 and 36 .

The first control circuit 21 has first to fifth control input terminals C ₁ , C ₂ , C ₃ , C ₄ , C ₅ and first to fourth control output signals a ₁ , a ₂ , a _{3 .} , _a4 , respectively, have control output terminals _d1 , _d2 , _d3 , and _d4 . The first control input terminal c ₁ receives an output signal from the comparator 20, and when the output signal is at a high level indicating stereo broadcast reception, it turns on the 28th and 29th transistors Q ₂₈ and Q ₂₉ and controls them. The 30th and 31st transistors Q ₃₀ and Q ₃₁ connected in series to each other are turned off. And second,
The command of the switch S1 constituting the mode command circuit 37 applied to the first control circuit 21 through the third control input terminals c ₂ and c ₃ is made invalid. On the other hand, when receiving a dual audio broadcast where the output of the comparator is at a low level, the 28th and 29th transistors Q ₂₈ and Q ₂₉ are turned off so that they can provide a control output according to the command from the mode command switch S1. . Fourth and fifth control input terminals
c ₄ and c ₅ receive the control output signal from the second control circuit 22 and apply power to the 32nd to 35th transistors Q ₃₂ , Q ₃₃ , Q ₃₄ , and Q ₃₅ configuring the first control circuit, respectively. , I try not to do it. Each control output terminal of this first control circuit 21
For d ₁ , d ₂ , d ₃ , and d ₄ , first to fourth control signals a ₁ to a ₄ as shown in the diagram of FIG. fourth differential amplifier A1,
Each transistor pair provided in A2, A3, and A4, that is, second and third transistors Q _{2 and} Q 3 , seventh and eighth transistors Q ₇ and Q ₈ , _{twelfth and} thirteenth transistors Q ₁₂ and Q ₁₃ , and 17, 18th transistor Q ₁₇ ,
I try to give it to Q ₁₈ .

The second control circuit 22 has first to third control input terminals _e1 , _e2 , _e3 , and first to fourth control output terminals _f1 , _f2 , _f3 , _f4. ing. The first control input terminal _e1 receives an output signal from the comparator 20, and when the output signal is at a high level indicating stereo broadcast reception, the 36th and 37th transistors
Q ₃₆ and Q ₃₇ are turned on when switch S2 connected to the third control input terminal _e3 is turned off. When the switch means S3 connected to the second control input terminal _e2 is on (muted off), the 38th transistor _Q38 is on, so that the signal is transmitted through the first and second control output terminals _f1 and _f2. , controls the operation of the fifth differential amplifier A5, and also turns off the 39th transistor _Q39 to output the third control output terminal _f3.
(the fourth control input terminal c ₄ of the first control circuit) is set to low level. Then, the level of each control output terminal of the first control circuit 21 is all set to low level. At this time, when the switch means S2 connected to the third control input terminal _e3 of the second control circuit 22 is turned on, the level from the comparator 20 to the first control input terminal _e1 is set to low level, that is, the dual audio broadcasting Since this is equivalent to what was done at the time of reception, both the 36th and 37th transistors Q ₃₆ and Q ₃₇ are turned off, and therefore the operating state of the fifth differential amplifier A5 is inverted, and the 4 presents a high level signal to control input terminal _c4 . By the way, at this time, the 28th and 29th transistors Q ₂₈ and Q ₂₉ of the first control circuit 21
and the 38th transistor Q ₃₈ of the second control circuit 22
are both on, so the 32nd control circuit of the first control circuit
~ Turn on all 35 transistors and turn on this first
The first to fourth control output signals a ₁ , a ₂ ,
The levels of a ₃ and a ₄ are maintained at low level. At this time, the fifth differential amplifier A5 supplies the first output circuit 35 with a signal that is in phase with the second signal from the second input terminal 29. When matrixed with a signal, it is possible to output only a signal of the same quality as the output signal from the second output circuit 36, that is, only one channel.

By the way, when the switch procedure S3 connected to the second control input terminal _e2 of this second control circuit 22 is turned off (muted on), the 38th transistor _Q38 is turned off, so that any other control input terminal is Even if it is in the state, the 32nd to 35th transistors of the first control circuit 21 and the 36th and 37th transistors of the second control circuit 22 are set to a floating state, and all the control output signals of the first control circuit 21 are set to high. The first to fourth differential amplifiers A1
~ Stop all operations of A4. During the period when the switch means S3 is turned off, the output signals can be prevented from being derived from the first and second output circuits 35 and 36. This is useful, for example, when receiving an incoming call such as a telephone call while receiving a broadcast, or when you want to temporarily cut off the derivation of the output signal, or when switching channels, especially when switching from a station transmitting a subchannel signal to a station not transmitting it. It is used to remove the popping sound that occurs (due to the residual width channel signal), and the former is used by manual operation using a remote controller, and the latter is used when the switch means S3 is activated by a tuning signal temporarily created during tuning. It is better to control it.

Next, the operation of this signal processing circuit in each mode will be briefly explained. Since the operation of the switch means S3 being open (mute-on) and the operation of the switch means S2 being on have been described above, the case where these switch means are in the state shown in FIG. 3 will be described below.

(b) In stereo mode At this time, as mentioned above, each output signal a ₁ to a ₄ of each control output terminal d ₁ , d ₂ , d ₃ , d ₄ of the first control circuit 21 is at a low level, so the Each of the first to fourth differential amplifiers A1 to A4 is set to an operating state. Further, the fifth differential amplifier A5 is
21, the 22nd transistors Q ₂₁ and Q ₂₂ are turned on. Therefore, the first signal from the first input terminal 28, that is, the stereo sum signal (L+R) is
to the second output circuit 31 via the first differential amplifier A1, and to the first output circuit 31 via the second differential amplifier A2.
The second signal, that is, the stereo difference signal (L-R) from the second input terminal 29 is applied in phase to the output circuits ₃₀ of the third differential amplifier A3, and the fifth The fourth differential amplifier A is also connected to the first output circuit 30 through the 21st transistor Q ₂₁ of the differential amplifier A5 in opposite phase.
4 to the second output circuit 31 in the same phase. Therefore, the first output circuit 30 receives the stereo sum signal (L+
R) and a signal -(L-R) of the opposite phase of the stereo difference signal from the second input terminal 29 are applied, and an output signal of -2R can be derived from the first output terminal 35. Also, the second output circuit 3
Since each signal from the first and second input terminals 28 and 29 is applied to the output terminal 1 in the same phase, an output signal of -2L can be derived from the second output terminal 36. In other words, it is possible to receive stereo broadcasts with high reception. Note that each output circuit 30, 3
Constant current circuits B1 to B are connected to the input terminals 38 and 39 of 1.
A constant current flows from 4 and the respective DC levels at this input are E ₁ and E ₂ respectively.

The second input terminal 29 is equipped with the stereo separation degree adjuster 12 as described above, which has a volume 40 and a coupling capacitor 41 as shown in the figure, so that the AC level of the second signal can be adjusted without changing the DC level of the second signal. so that it can be adjusted. Through this adjustment, it is possible to control the mixing ratio of the stereo sum and difference signals and adjust the degree of stereo separation, but even with this adjustment, the above-mentioned DC levels remain unchanged.

(b) When the switch S1 is set as a terminal (main channel mode of dual audio broadcasting), in this case, as shown in the diagram of FIG. 4, the first and second control output terminals d ₁ of the first control circuit 21, The output signals a ₁ and a ₂ of d ₂ are at low level, and _{the output signals a 3 and a 4 of the third and fourth control output terminals d 3 and d 4 are at high} level. The differential amplifiers A1 and A2 are set to the operating state, and the third and fourth differential amplifiers A3 and A4 are set to the non-operating state. Therefore, only the first signal from the first input terminal 28, that is, the main channel M signal of the dual audio broadcast, is applied to the first and second output circuits 30 and 31.
In this case as well, the input terminal 3 of each of these output circuits
Constant currents from the constant current circuits B1 and B2 flow through the constant current circuits B1 and B2, and the DC levels at these input terminals are _E1 and _E2, respectively, as in the case (A) above.

(c) When switch S1 is set as a terminal (double audio broadcast sub-channel mode), in this case, contrary to (b) above, the first and second differential amplifiers A1 and A2 are inactive. state, the third and fourth differential amplifiers A3 and A4 are in the operating state,
Furthermore, the fifth differential amplifier A5 is the 20th and 23rd differential amplifier A5.
Transistors Q ₂₀ and Q ₂₃ are activated. Therefore, the first signal from the first input terminal 28 is not output, and the second signal from the second input terminal 29, that is, the sub-channel signal of the dual audio broadcast, is transmitted to the 14th transistor of the third differential amplifier A3.
Q ₁₄ is applied in phase to the first output circuit 30 through the 23rd transistor Q ₂₃ of the fifth differential amplifier A5, and is also applied in phase to the second output circuit 31 through the fourth differential amplifier A4. Ru. Subchannel signals can therefore be derived from both output circuits.

(d) When switch S1 is set as a terminal (main and sub channel mode of dual audio broadcasting), in this case, the output signal shown in the diagram of Fig. 5 is transmitted to the first to fourth differential amplifiers A1 to A4. , the first and third differential amplifiers A1 and A3 are inactivated, and the second and fourth differential amplifiers A2 and A3 are inactivated.
Activate A4. The first signal, ie, the main channel signal, from the first input terminal 28 is sent to the first output circuit 30 through the second differential amplifier A2, and the second signal, ie, the sub-channel signal, from the second input terminal 29 is sent to the first output circuit 30 through the second differential amplifier A2. The signals are applied in phase to the second output circuit 31 through the fourth differential amplifier A4. Therefore, each output terminal 3
Different kinds of dual audio broadcast programs can be individually derived from 5 and 36, respectively. In each of the above (c) and this (d) modes, the input terminal 3 of each output circuit 30, 31 is the same as in the above (a) and (b) modes.
The DC levels of 8 and 39 are E ₁ and E ₂ and remain unchanged.

Note that during monaural reception, the first
The signal from the control input terminal _c1 is set to high level, and the signal from the first control input terminal _e1 of the second control circuit is set to low level, and each of the first control circuits The output signal from the control output terminal is made similar to the case (a) above, so that monaural signals can be derived from each output terminal 35, 36.

FIG. 5 shows another embodiment of the present invention. This switch S4 has two circuits and two contacts in the mode command circuit 37, and one contact 43 and 44 of each circuit of this switch is connected to a power source 45, and the other contact 46,
47 to the second and third control input terminals, respectively.
It is designed to be connected to the two external terminals of IC6, which are c ₂ and c ₃ , and when both contacts 48 and 49 are turned off as shown in the figure, the above mode (b) is set, and both are turned on again. When you do this, the mode (c) above returns and
When only one contact piece 49 is turned on, the above mode (d) can be set, and when only the other contact piece 48 is turned on, the mode shown in FIG.
As shown in the figure, the output signals of the first and third control output terminals of the first control circuit can be made low, and the output signals of the second and fourth control output terminals can be made high. As above, the first and second output terminals 35,
36 can derive a signal in a mode opposite to the mode (d) above.

In this way, the present invention is equipped with only two external terminals for giving signals to an IC that receives television audio multiplexed signals to command its operating mode, and has an external terminal that is suitable for this purpose, that is, as shown in FIG. 3 or 5. By selectively adding a mode command circuit as shown, it is possible to operate dual audio multiplex broadcasting in three or four types of modes. Therefore, there is no need to increase the external terminals of the IC in order to realize four types of modes, and an inexpensive single-circuit multi-contact switch can be used for three types of modes.

[Brief explanation of the drawing]

FIG. 1 shows the frequency spectrum of a television audio multiplex signal. FIG. 2 is a block diagram showing the main parts of a receiver to which the present invention is applied. FIG. 3 is an actual circuit diagram of one embodiment of the present invention. FIG. 4 is a diagram of input and output signals used to explain the operation of this circuit. FIG. 5 is a circuit diagram of a main part of another embodiment of the present invention. 28...first input terminal, A1, A2...first,
Second differential amplifier, 29...second input terminal, A
3, A4...Third and fourth differential amplifiers, A5...
Fifth differential amplifier, 30...first output circuit, 3
1... Second output circuit, 21... First control circuit,
22...Second control circuit, 37, 37'...Mode command circuit, S1...1 circuit 3 contact switch, S4
...2 circuit 2 contact switch.

Claims (1)

[Claims for Utility Model Registration] 1. A first input terminal for introducing a first signal;
first and second differential amplifiers that respectively introduce the first signal from an input terminal; a second input terminal that introduces the second signal; and a second input terminal that respectively introduces the second signal from the second input terminal. third and fourth differential amplifiers, a fifth differential amplifier configured on the upper stage of the third differential amplifier, and a first differential amplifier that derives the output signal of the second and/or third differential amplifier. a second output circuit that derives the output signals of the first and/or fourth differential amplifiers, and operations of the first, second, third, and fourth differential amplifiers, respectively. a first control circuit that creates first to fourth control signals for individual control; and an operation of the fifth differential amplifier and the first control circuit;
a second control circuit that controls the operation of the control circuit, the first control circuit having first to fifth control input terminals and the first to fourth differential amplifiers connected to the first to fourth differential amplifiers; and first to fourth control output terminals for providing control signals, the first control input terminal receiving different signals depending on the received broadcast content, and the second and third control input terminals receiving different signals depending on the received broadcast content. The terminal is configured to receive a command signal from a mode command circuit, and the fourth and fifth control input terminals are configured to receive a control signal from the second control circuit, and the broadcast content is a television audio multiplex signal. When it is a dual audio broadcast, the first to fourth control signals from the first to fourth control output terminals correspond to the command signal from the mode command circuit,
Further, an operation mode designation circuit for a television audio multiplex receiver is configured such that the first to fourth control signals do not respond to the command signal when the broadcast content is a stereo broadcast of a television audio signal. 2. The second and third control input terminals are external terminals of the integrated circuits constituting each of the circuits, and the mode command circuit includes a switch with two circuits and two contacts, and one of the circuits of this switch One contact is connected to a power source, and the other contact is connected to each external terminal, which is the second and third control input terminal, and this mode command circuit has four command modes.Registered as a utility model. An operation mode designation circuit for a television audio multiplex receiver according to claim 1. 3. The second and third control input terminals are external terminals of the integrated circuits constituting each of the circuits, and the mode command circuit includes a switch with one circuit and three contacts, and the contact piece of this switch is connected to the third control input terminal. In this mode, a first contact is connected to the connection point between the control input terminal and the power supply, a first contact is connected to the second control input terminal, a second contact is connected to the other terminal of the power supply, and a third contact is opened. 3 command modes by command circuit
1. An operating mode designation circuit for a television audio multiplex receiver as claimed in claim 1.