JPS612980B2 - - Google Patents

Info

Publication number
JPS612980B2
JPS612980B2 JP56201221A JP20122181A JPS612980B2 JP S612980 B2 JPS612980 B2 JP S612980B2 JP 56201221 A JP56201221 A JP 56201221A JP 20122181 A JP20122181 A JP 20122181A JP S612980 B2 JPS612980 B2 JP S612980B2
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56201221A
Other languages
Japanese (ja)
Other versions
JPS58102382A (en
Inventor
Kazuo Tajiri
Shizuo Shiokawa
Kyoshi Oguri
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56201221A priority Critical patent/JPS58102382A/en
Publication of JPS58102382A publication Critical patent/JPS58102382A/en
Publication of JPS612980B2 publication Critical patent/JPS612980B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP56201221A 1981-12-14 1981-12-14 Reference bit control system Granted JPS58102382A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56201221A JPS58102382A (en) 1981-12-14 1981-12-14 Reference bit control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56201221A JPS58102382A (en) 1981-12-14 1981-12-14 Reference bit control system

Publications (2)

Publication Number Publication Date
JPS58102382A JPS58102382A (en) 1983-06-17
JPS612980B2 true JPS612980B2 (en) 1986-01-29

Family

ID=16437343

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56201221A Granted JPS58102382A (en) 1981-12-14 1981-12-14 Reference bit control system

Country Status (1)

Country Link
JP (1) JPS58102382A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE48417E1 (en) 2006-09-28 2021-02-02 Sony Interactive Entertainment Inc. Object direction using video input combined with tilt angle information
US11010971B2 (en) 2003-05-29 2021-05-18 Sony Interactive Entertainment Inc. User-driven three-dimensional interactive gaming environment

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11010971B2 (en) 2003-05-29 2021-05-18 Sony Interactive Entertainment Inc. User-driven three-dimensional interactive gaming environment
USRE48417E1 (en) 2006-09-28 2021-02-02 Sony Interactive Entertainment Inc. Object direction using video input combined with tilt angle information

Also Published As

Publication number Publication date
JPS58102382A (en) 1983-06-17

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