JPS61296407A - Multiprocessor type numerical controller - Google Patents

Abstract

PURPOSE:To increase a processing speed and to make the updating or modification of software easy by using a high speed volatile submemory as a submemory for subprocessor. CONSTITUTION:When a power source is turned on, a main processor 2 starts to fetch an instruction from a non-volatile main memory 3a after the completion of power supply reset to execute a program. Then, a reset signal 17A is turned on to keep a subsystem 4 at the stopped state. Subsequently, a transfer program I is started to transfer a control program for the system 4 and a transfer program II from the memory 3a to a 2-port memory 7. After the completion of the transfer, the signal 17A is turned off, so that a subprocessor 5A is released from the stopped state. Since a program starting address is set up in the memory 7, a control circuit 16 starts to fetch an instruction from the memory 7, starts the program II and transfers the program II from the memory 7 to the volatile submemory 15A. After the completion of the transfer, the circuit 16 changes the setting so as to fetch the program from the memory 15.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a multiprocessor type numerical control device that employs a multiprocessor system.

[Conventional technology]

Fig. 3 is a block diagram showing the system configuration of a conventional multiprocessor type numerical control device. 14 is a system bus.

4.8.9 are subsystems hanging from this system bus 14. In this example, 4 is the first subsystem that controls the motor, 8 is the second subsystem that performs sequence processing, and 9 is the other subsystem. This is the third subsystem that performs processing. 5A is a subprocessor in the first subsystem 4; 6A is a nonvolatile submemory consisting of EPROM; 6A is a nonvolatile submemory consisting of an EPROM; T is a subprocessor for the main processor 2 and subprocessor 5; This is a two-boat memory provided at the ninth point that exchanges information between the two. Second. The third subsystems 8 and 9 also include subprocessors 5B and 5C, and nonvolatile submemories 6B and 6, respectively.
0% Has two boat memories 7B and 7C. 10 is a servo amplifier, 11 is a servo motor, 12 is a relay contact, and 13 is a relay coil.

Next, the operation will be explained. When the power is turned on, the main processor 2 in the main system 1 sequentially takes in instructions written in the nonvolatile main memory 3 and starts control.

On the other hand, the subprocessor 5A in the first subsystem 4 similarly sequentially takes in the first nine write instructions to the nonvolatile submemory 1J6A and controls the servo amplifier 10 and the servo amplifier 11.

Here, information exchange between the main processor 2 and the sub-processor 5A is performed through a two-board memo UTA. Although the third subsystems 8 and 9 operate in the same manner as the first subsystem, the explanation thereof will be omitted.

[Problems to be Solved by the Invention] Since the conventional multiprocessor numerical control device is configured as described above, the control program of the first subsystem 4 is stored in a nonvolatile submemory consisting of a slow EPROM. Even if a recent high-speed processor is used as the sub-processor 5A for the purpose of high-degree motor control, current LSI technology cannot keep up with the speed of the non-volatile sub-memory IJ 6A. However, there was a problem that sufficient effects could not be obtained. Furthermore, in such a multiprocessor type numerical control device.

Software updates or modifications often extend not only to the main memory 2 but also to the nonvolatile submemory 6A in the 8g1 subsystem, resulting in problems such as the need to prepare many repair parts.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to obtain a multiprocessor type numerical control device that has high processing speed and whose software can be easily updated or modified.

[Means for solving problems]

In the multiprocessor type numerical control device according to the present invention, a high-speed volatile submemory for storing control programs is provided in the subsystem, and the main system stores the control program of the subsystem in addition to the control program of the main system. A non-volatile main memory is provided for storing images, and a subsystem control program is transferred from this non-volatile main memory to a volatile sub-memory when power is turned on.

[Effect]

The multiprocessor type numerical control device in this invention includes:
When the power is turned on, the main system stops the subprocessor by resetting it, and during this time, it transfers the image of the control program of the subsystem written in the main memory to the volatile submemory in the subsystem, and resets it after the transfer is completed. Cancel.

Start a subsystem.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. wc
FIG. 1 is a block diagram showing the system configuration of a multiprocessor type numerical control device according to the present invention.

The same reference numerals as in FIG. 3 indicate corresponding parts, respectively.

15A is a volatile submemory IJ made of SRAM in which the control program for the first subsystem 4 is stored, 16A is a control circuit, and 17A is a reset signal whose purpose is to stop the first subsystem 4 and transfer data during this period. It is.

3a is the same as the main memory 3 in FIG.
The control program for the subsystem 4, the program that transfers this first subsystem 40 control program to the 2-board memory 7A (hereinafter referred to as the transfer program), and further transfers it from the 2-board memory 7A to the volatile submemo 'J15A. Program (hereinafter referred to as transfer program ■)
It is included.

Second. Also in the third subsystems 8 and 9, subprocessors 5B and 5C1 nonvolatile submemories 15B and 15C
, 2 boat memo') 7B, 7C and control circuit 1
6B and 16C are configured in the same way. 17B, 17C
is the second. This is a reset signal whose purpose is to stop the third subsystems 8 and 9 and transfer data during this period.

The operation of the multiprocessor type numerical control device configured as described above will be explained with reference to the chart 70 in FIG. When the power is turned on in step 101, the main processor 2 of the main system 1 is turned on in step 102 after the power reset is completed.
starts fetching seven instructions from the non-volatile main memory 3a and executes the program.

In step 103, the reset signal 17A is turned on to keep the first subsystem 4 in a stopped state.

In step 104, the transfer program (2) is started and the control program for the first subsystem 4 (5) and the transfer program (2) are transferred from the main memory 3 & to the 2-board memory T.

When the transfer is completely completed in step 105, step 10B
The reset signal 17A is turned OFF. Then, the sub-processor 5A is released from the stopped state. The control circuit 16 stores the program start address in the 2-boat memory T.
Therefore, in step 107, the instruction 7 is started from the 2-board memory T, and in step 107, the transfer program (■) is started, and the control program of the first subsystem 4 is transferred from the 2-board memory T. Transfer to volatile submemory j5A. When the transfer is completed in step 108, the control circuit 16 changes the settings so that the program is fetched from the volatile sub-memory 15.

Below, in step 109, from volatile submemo January 5,
fetching the control program of the first subsystem 4;
Start normal system operation.

However, in the present invention, the first subsystem 4
Since the control program is stored in the volatile sub-memory 15A made of high-speed SRAM, the speed of the non-volatile sub-memory 6A cannot keep up with the speed of the high-speed sub-processor 5A as in conventional devices of this type. This eliminates the problem of entering a number of predetermined wait states, prolonging the bus cycle, and not being able to achieve its original performance.

Furthermore, in the present invention, since the image of the first subsystem 40 control program is stored in the main memory 3a,
When updating or modifying software, only the main memory card needs to be replaced.

Further, if a similar method is adopted for the second 48% third subsystem 9, only one card will be replaced.

In the above embodiment, the control program for the first subsystem 4 is stored in the dedicated volatile submemory 15A.
If the system bus overhead is within the allowable range, the memory is stored in the 2-board memory 7A, and the volatile sub-memory 15
A may be omitted.

〔Effect of the invention〕

As described above, according to the present invention, since a high-speed volatile sub-memory is used as the sub-memory for the sub-processor, it is possible to operate the system without reducing system efficiency even if the sub-processor is high-speed. . Furthermore, since the control program for the subsystem is transferred from the nonvolatile memory of the main system to the volatile memory of the subsystem, there is an effect that updating or modifying the software becomes easy.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a multiprocessor numerical control device according to an embodiment of the present invention, FIG. 2 is a flowchart showing data transfer from the main system to the subsystem in the present invention, and FIG. 3 is a block diagram of a multiprocessor numerical control device according to an embodiment of the present invention. It is a block diagram showing a numerical control device of the method. In the figure, 1 is the main system, 2 is the main processor, 3 &
is non-volatile main memory, 4 is the first subsystem %5A,
5B and 5C are sub-processors, 7A. 7B and 7C are 2 boat memories, 8.9 is 2nd . The third subsystem %10 is a servo amplifier.%11 is a servo motor.14 is a system bus.15A, 15B. 15C is a volatile submemory, 16A, 16B, and 16C are control circuits, and 17A, 17B, and 17C are reset signals. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. Patent applicant: Mitsubishi Electric Corporation j-m--→1 Agent: Patent attorney 1) Hiroshi Sawa'': (2 others)

Claims (1)

[Claims] A subsystem having a volatile submemory and a subprocessor, and a control program for the subsystem and a control program for the subsystem in addition to a main system control program are transferred to the volatile submemory of the subsystem when power is turned on. A multiprocessor numerical control device comprising a main system having a non-volatile main memory storing a transfer program and a main processor.