JPS61269476A - Initial display control system - Google Patents

Abstract

PURPOSE:To prevent a hard-to-see random pattern image from being projected when a terminal is powered on by switching modes of an image display device with a control signal after an image processor sets the starting screen data of the terminal. CONSTITUTION:When the terminal 1 for video disk utilizer is powered on, a CPU 3 accesses a signal control circuit 22 in its initial operation to lower an A Control signal 11 and a Ys signal 12 to a level Low respectively. Consequently, the CPU 3 accesses a video RAM 5 and write the 1st screen data in such as state that a television receiver 2 is already powered on and images of a television broadcast are projected on the television screen. Then, the CPU accesses the signal control circuit 22 again to raise the AV control signal 11 and Ys signal 12 to a level High. At this point of time, a mode where image data sent from the terminal 1 is displayed is entered by switching and the 1st screen of the terminal 1 is projected on the television screen.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a system in which an image processing device using a microprocessor or the like and an image display device are connected by a cable, and in particular, □control from one image processing device. This invention relates to an initial display control method that switches the mode of an image display device using a signal.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional initial display control method. In the initial display control method shown in Fig. 3, MIkJ
(Japan Electronics Industry Association Standards) Technical File '1' T
In Figure 0, a Videotex user terminal (abbreviated as a terminal) as one image processing device and a television receiver as one image display device are connected by cable according to the connection conditions specified in C-003. Terminal 2 is a television receiver. 3 is the CPU of terminal 1 (
4 is a synchronization signal generation circuit, 5 is a video RAM (Random
Access Memory), 6 is terminal 1
7 is an output terminal on the terminal 1 side, 8 is an input terminal on the television receiver 2 side, and each of these outputs,
Input terminals 7 and 8 are 21 as specified in TTC-003 above.
It consists of bin connectors, each connected by a cable. Through this cable, a synchronization signal 9. R-G
・B color signal IO, AV control signal 11 and Ys
A signal 12 is sent from terminal 1 to television receiver 2 and 6
．． 14 according to the level of the AV control signal 11,
Synchronization signal9. This is a signal selection circuit that selects one signal from two signals of the video synchronization signal 13 of television broadcasting and outputs it as a video synchronization signal. Reference numeral 15 denotes a synchronization m circuit, and 17 a vertical/horizontal deflection circuit, which sends a vertical synchronization signal 16 from the synchronization separation circuit 15 to a vertical horizontal deflection circuit 17. 18 is a color signal reproducing circuit, RΦG@B color signal 1
Outputs 9. 20 according to the level of Ys signal 12,
- 1 out of 2 signals of each R-G-B color signal l0119
A signal selection circuit 21 for selecting a signal is a C1-LT (cathode ray tube) circuit.

FIG. 4 is a timing chart of each part of the initial display control method shown in FIG.

Next, the operation of the conventional initial display control method shown in FIG. 3 will be described. In order for the terminal 1 to display an image on the television screen (not shown) of the television receiver 2, the CPU first writes R-G-B data to the video RAM 5. The signal IO is sent to the television receiver 2 through the cable together with the synchronization signal 9. In addition, each AV control signal 11°Y is sent from the terminal 1 to the television receiver 2.
s signal 12 is sent out, and each signal selection circuit 14, 20
control. Here, the above EIAJ technical file 'I
"TC-003 each AV: 17 troll signal 11,
A definition regarding the Ys signal 12 is shown.

AV control signal 11 High level (3-5V): As a video synchronization signal,
Select an externally input signal.

Low level (0 to 0.4V): As a video synchronization signal,
Select internal signal.

Ys signal 12 High level (1 to 3v): As a color signal.

Select R, , G, and B color signals input from the outside.

Low L/to JL/ (0 to 0.4 V):
Turn on the color light.

The signal output from the internal color signal reproduction circuit 18 is selected.

In this example, the signal selection circuit 1 also follows the above TTC-003.
4 selects and outputs the synchronization signal 9 sent from the terminal 1 when the AV control signal 11 is at High level.

This output signal passes through the sync separation circuit 15 and is sent to the vertical/horizontal deflection circuit 17 as a vertical/horizontal sync signal 16. On the other hand, the video synchronization signal output from the signal selection circuit 14 is also sent to the color signal reproduction circuit 18, and
9 is output. However, if the synchronization signal 9 sent from the terminal 1 is not a video synchronization signal containing a color signal component but a pure synchronization signal as in this example, the color value reproduction circuit 18
The signal selection circuit 20 receives the R signal sent from the terminal 1 when the Ys signal 12 is at a high level.

The G-B color signal IO is selected and sent to the CR1 circuit 21. Therefore, the image based on the
%AV control signal 11,
In the conventional system, in which both Ys signals 12 must be set to High level, each AV control signal 11
, Ys signal 12 is directly connected to the constant voltage supply circuit 6 of terminal 1, and at the same time as the terminal 1 is powered on, each AV control signal 11 . Both Ys signals 12 are configured to be at High level. Such an operating mode will be made clearer from the timing chart shown in FIG. 4 above.

[Problem that the invention seeks to solve]

In the conventional initial display control method as described above, when the power of the terminal 1 is turned on while the power of the television receiver 2 is turned on, each AV control signal 11 is immediately
, Ys signal 12 both become High level,
Therefore, terminal 1 appears on the television screen (not shown).
The image sent from will be displayed. However, until the CPU 3 of the terminal 1 initializes the video RAM 5, random data exists in the video RAM 5, and this random data is sent to the television receiver 2, so a random pattern image is not displayed on the television screen. The problem was that it looked unsightly.

This invention was made to solve this problem, and even if the power of the television receiver as an image display device is turned on in advance, when the power of the terminal as an image processing device is turned on, To obtain an initial display control system in which an unsightly random pattern image is not displayed on a television screen as one display unit.

[Means for solving problems]

The initial display control method according to the present invention is such that after one image processing device sets the first screen data, the mode for displaying the image data of nine image display devices can be switched by a control signal from this image processing device. It is.

[Effect]

In the initial display control method of this invention, the control signal for switching the mode sent from one image processing device to the image display device is controlled by the CPU in one image processing device, so this CPU sets the first screen data. After that, the mode of the nine-image display device can be switched to a mode in which the image sent from the image processing device is displayed on the display section.

〔Example〕

FIG. 1 is a block diagram showing an initial display control method as an embodiment of the present invention.

1 is a Videotex user terminal (abbreviated as terminal).

22 is a signal control circuit, and this signal control circuit 22 is provided between the constant voltage supply circuit 6 and each AV control signal 11 and Ys signal 12 in the terminal 1, and
Each AV control signal 11 according to instructions from IJ3.

Ys Controls the level of signal 12. Others, each code 2
21 are the same as the conventional system shown in FIG. 3 above.

FIG. 2 is a timing chart for each method of the initial display rFrlj control method shown in FIG.

Next, the operation of the initial display control system shown in FIG. 1, which is an embodiment of the present invention, will be described.

In the initial operation of the terminal 1, the CPL 13 sends each AV control signal 11. Controls the level of Ys signal 12. That is, when the terminal 1 is powered on, the CPU 3 accesses the signal control circuit 22 during its initial operation and outputs each AV control signal 11. The Ys signal 12 is set to Low level. Therefore, the signal selection circuit 14 in the television receiver 2 selects the internal (television broadcast) video synchronization signal as the video synchronization signal, and sends it to the synchronization separation circuit 15 and the color signal reproduction circuit 18 (the AV control signal 11 is Low
level), also.

The signal selection circuit 20 receives the R signal sent from the color signal reproduction circuit 18.
@Select G-B color signal 19 and connect CI-L'l' circuit 21
(Ys signal 12 is low level), from this point.

Even if you turn on the terminal 1 with the power of the television receiver 2 turned on in advance and the image of the television broadcast displayed on the television screen, the image of the television broadcast will not appear on the television screen at first. It remains as shown.

Next, CPJ3 accesses the video module AM5 and writes (initializes) the first screen data.

After that, the signal control circuit 22 is accessed again and each =
9 - AV control signal 11. Ys signal 12 to High
level. At this point, the mode of the television receiver 2 is switched for the first time to a mode for displaying the image data sent from the terminal 1, and the first screen of the terminal 1 is displayed on the television screen. Such an operating mode will be made clearer from the timing chart shown in FIG. 2 above.

In the above embodiment, the case of the Videotex user terminal 1 was explained, but according to the JflIAJ technical file TTC-003, an image processing device and a television receiver 2 as an image display device are connected by a cable, This invention can be used as is if the AV control signal 11 and Ys signal 12 are used to switch the mode of the television receiver 2. Further, the present invention can be applied to any device in which an image processing device and an image display device are generally connected by a cable and the mode of the image display device is switched by control signals from the five image processing devices.

〔Effect of the invention〕

As explained above, in the present invention, after one image processing device sets the first screen data in the initial display control method, the image data of the one screen f-image display device is set by the control signal from this image processing device. I configured it so that I can switch the display mode.

Even if the television receiver as an image display device is turned on in advance. This provides an excellent effect in that an unsightly random pattern image is not displayed on the television screen as one display unit when the power of the terminal as an image processing device is turned on.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an initial display control method according to an embodiment of the present invention, FIG. 2 is a timing chart of each part of the initial display control method shown in FIG. 1, and FIG. 3 is a conventional initial display control method. A block configuration diagram showing the method, FIG. 4, is
4 is a timing chart at the valley portion of the initial display control method of FIG. 3. FIG. In the figure, 1... Videotex user terminal. 2... Television receiver, 3... CPU (central processing unit), 4... Synchronization signal generation circuit, 5... Video RAM, 5... Constant voltage supply circuit, 7... Output terminal,
8...Input terminal, 9...Synchronization signal, 10.19...
・R, GeB color signal, 11...AV control signal, 12...Ys double signal 13...TV broadcast video synchronization signal, 14, 20...Signal selection circuit, 15...
・Synchronization separation circuit, 16... Vertical/horizontal synchronization signal, 1
7... Vertical/horizontal deflection circuit, 18... Color signal reproducing circuit, 21... CFtTM path, 22... Signal control circuit. In each figure, the same reference numerals indicate the same or equivalent parts.

Claims (2)

[Claims] (1) In a system in which an image processing device using a microprocessor or the like and an image display device are connected by a cable, after the image processing device sets the first screen data, a control signal from the image processing device An initial display control method characterized in that the mode of a display device is switched from a mode for displaying internal image data to a mode for displaying image data input from the image processing device. (2) A television receiver is used as the image display device, and the image processing device stores the first screen data in a video RAM.
2. The initial display control method according to claim 1, wherein the mode of the television receiver is switched by changing the AV control signal and the Ys signal from a low level to a high level.