JPS61263267A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS61263267A
JPS61263267A JP60105330A JP10533085A JPS61263267A JP S61263267 A JPS61263267 A JP S61263267A JP 60105330 A JP60105330 A JP 60105330A JP 10533085 A JP10533085 A JP 10533085A JP S61263267 A JPS61263267 A JP S61263267A
Authority
JP
Japan
Prior art keywords
film
light
integrated circuit
semiconductor integrated
arsenic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP60105330A
Other languages
Japanese (ja)
Inventor
Akinori Shimizu
了典 清水
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP60105330A priority Critical patent/JPS61263267A/en
Publication of JPS61263267A publication Critical patent/JPS61263267A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation

Abstract

PURPOSE:To prevent the operation of a signal processor from being disturbed by forming a light shielding film made of a polycrystalline silicon which contains a large quantity of arsenic directly above a signal processor in a semiconductor integrated circuit which has a photodetector. CONSTITUTION:A P-N junction photodiode 2, an MOS transistor 3 and a capacitor 4 are formed on the surface of an N-type silicon substrate 1. A light shielding film 9 is coated on a plasma nitride film 8 on a CVD oxide film 7 to coat on a light signal processor. The film 9 is formed of a polycrystalline silicon film which contains a large quantity of arsenic. The film 9 is provided to almost shield the light of a shorter wave length side from 1,100nm, a light is not almost incident to the processor to prevent the operation from being disturbed.

Description

【発明の詳細な説明】 〔発明の属する技術分野〕 本発明は光検知素子を含む半導体集積回路における回路
構成素子の光による動作の劣化を防止する方法に関する
DETAILED DESCRIPTION OF THE INVENTION [Technical Field to which the Invention Pertains] The present invention relates to a method for preventing deterioration of the operation of circuit components due to light in a semiconductor integrated circuit including a photodetecting element.

〔従来技術とその問題点〕[Prior art and its problems]

従来光検知素子を応用した装置は多く実用化されており
、それらはいずれも光検知部と信号処理回路部とが別々
の容器に納められていたが、最近はシステムのコンパク
ト化、信号処理速度の向上等装置の性能を改善するため
に、光検知部と信号処理回路部とを同一の基返上に作り
込んだ半導体集積回路装置として用いられるようになっ
ている。
Conventionally, many devices that apply photodetection elements have been put into practical use, and in all of them, the photodetection section and the signal processing circuit section were housed in separate containers, but recently, systems have become more compact and signal processing speeds have increased. In order to improve the performance of the device, such as improving the performance of the device, it has come to be used as a semiconductor integrated circuit device in which a photodetection section and a signal processing circuit section are built into the same substrate.

その場合問題となるのは元が光検知素子以外の集積回路
構成素子に入射したとき、半導体内で本来は不必要な電
子−正孔対を励起し、そのため素子のリーク電流が増工
する等の好ましくない現象が生ずることである。上記の
現象は、ファクシミリ用元検知器アレー、固体化撮像装
置、光学式測距装置等光検知素子以外に走査回路等の周
辺回路を含むような場合は、集積回、路の動作を制限す
る大きな要素となる。−例として走査回路についてみれ
ば、走査回路は一般に高集積密度が可能であり、歩留り
の高いMOSシフトレジスタが使用され、走査パルスの
シフトにはMOSトランジスタのゲート容量が一時的な
情報記憶として利用される場合が多い。ところがこの部
分に元が入射すると接合領域に発生する不必要な電子−
正孔対によりリーク電流が流れ、記憶時間を着しく短か
くすることになる。
In that case, the problem is that when the source is incident on an integrated circuit component other than the photodetector, it excites unnecessary electron-hole pairs in the semiconductor, which increases the leakage current of the device, etc. Unfavorable phenomena occur. The above phenomenon may limit the operation of integrated circuits and circuits in cases where peripheral circuits such as scanning circuits are included in addition to light detection elements, such as facsimile source detector arrays, solid-state imaging devices, and optical distance measuring devices. This is a big factor. - Taking scanning circuits as an example, scanning circuits are generally capable of high integration density, use high-yield MOS shift registers, and use the gate capacitance of MOS transistors as temporary information storage to shift scanning pulses. It is often done. However, when a source enters this part, unnecessary electrons are generated in the junction area.
A leakage current flows due to the hole pairs, significantly shortening the storage time.

上述の問題の対策として、たとえば特公昭昭−2687
6号に開示されているように、光検知素子以外の半導体
素子を含む領域上に導電性物質を絶縁膜を介して設ける
方法がある。この方法によって、不必要な電子−正孔対
によるリーク電流等の問題を解決することができるが、
新たに次のような重大な欠点が生ずる。すなわち、導電
性物質を半導体素子を含む広い領域上に形成すると、導
電性物質を通して半導体素子間に短絡事故が起こる可能
性が発生することである。この短絡現象は、導電性物質
と半導体素子との層間絶縁を果す絶縁膜として用いる二
酸化シリコン、窒化シリコンなどの無機膜もしくはポリ
イミドなどの有機膜が、いずれも耐クラ、り性が低く、
またピンホールが発生しやすい等の欠陥をもっているこ
とに起因している。従りてこれらの膜上の広範囲に導電
性物質を形成すると、導電性物質と半導体素子に関係す
る配線間が導通し、広範囲の半導体素子間に短絡事故が
生ずる確率がかなり高く、装置の製造歩留りを着るしく
低下させるという問題が起る。
As a countermeasure to the above-mentioned problem, for example,
As disclosed in No. 6, there is a method in which a conductive material is provided via an insulating film on a region including a semiconductor element other than a photodetecting element. This method can solve problems such as leakage current due to unnecessary electron-hole pairs, but
The following new serious drawbacks arise. That is, if a conductive material is formed over a large area including semiconductor devices, a short circuit may occur between the semiconductor devices through the conductive material. This short circuit phenomenon is caused by the fact that inorganic films such as silicon dioxide and silicon nitride, or organic films such as polyimide, which are used as insulating films to provide interlayer insulation between conductive substances and semiconductor elements, have low cracking and scratch resistance.
This is also due to the fact that they have defects such as the tendency to generate pinholes. Therefore, if a conductive substance is formed over a wide area on these films, there is a high probability that conduction will occur between the conductive substance and the wiring related to the semiconductor element, and a short circuit will occur between the semiconductor elements over a wide area, making it difficult to manufacture the device. A problem arises in that the yield is seriously reduced.

〔発明の目的〕[Purpose of the invention]

本発明は上述の問題点を除去するためになされたもので
あり、光検知素子を含む半導体集積回路を光による雑音
から保護し、その特性を充分に発揮することができる半
導体集積回路装置を提供することを目的とする。
The present invention has been made in order to eliminate the above-mentioned problems, and provides a semiconductor integrated circuit device that can protect a semiconductor integrated circuit including a photodetecting element from noise caused by light and fully exhibit its characteristics. The purpose is to

〔発明の要点〕[Key points of the invention]

本発明は、信号処理回路部を遮光することにより光検知
素子を含む半導体集積回路を元による雑音から保護する
ために、通常の製造方法で作り込んだ半導体集積回路上
に絶縁膜な被着した後、光検知素子以外の部分を砒素を
多量に含む単結晶もしくは多結晶シリコンからなる薄膜
にて覆い、光が光検知素子以外の部分に入射しないよう
にしたものである。
The present invention provides an insulating film deposited on a semiconductor integrated circuit fabricated using a normal manufacturing method in order to protect a semiconductor integrated circuit including a photodetecting element from noise caused by the source by shielding a signal processing circuit section from light. Thereafter, the parts other than the photodetecting element are covered with a thin film made of single crystal or polycrystalline silicon containing a large amount of arsenic to prevent light from entering the parts other than the photodetecting element.

〔発゛萌の実施例〕[Example of origination]

第1図は本発明の一実施例を説明するための光信号熟埋
用半導体集積回路の要部構造断面図であり、光検知部以
外の領域に遮光膜を設けた例である。第1図において2
.3および4はそれぞれN型シリコン基板1の表面に形
成されたP、N接合フォトダイオード、MOS)ランジ
スタ、キャパシタであり、9はCVD酸化膜7上のプラ
ズマ窒化膜8に被着され元信号処理部を覆う遮光膜であ
る。
FIG. 1 is a cross-sectional view of the structure of a main part of a semiconductor integrated circuit for embedding optical signals to explain one embodiment of the present invention, and is an example in which a light-shielding film is provided in an area other than a photodetecting section. In Figure 1, 2
.. 3 and 4 are P, N-junction photodiodes, MOS) transistors, and capacitors formed on the surface of the N-type silicon substrate 1, respectively, and 9 is deposited on the plasma nitride film 8 on the CVD oxide film 7 for original signal processing. This is a light-shielding film that covers the area.

5は熱酸化膜、6はアルミニウム配線である。上記遮光
膜9の製作法の1例を以下に記す。まず光検知素子2の
形成および回路配線6の被着を完了した後、光検知部は
CVD酸化膜7のみで保護し、信号処理回路部はこのC
VD酸化膜7とプラズマ値化膜8との二層で保護するよ
うにそれぞれこの順に被着する。光検知部をCVD酸化
膜7のみの保護にとどめたのは、窒化膜8の屈折率が2
.0と太き(、屈折率1.45の酸化膜7との界面での
全反射による光の損失を押えるためである。次にプラズ
マ窒化膜8の上に遮光膜9を被着するが、その際下層の
アルミニウム配線6に損傷を与えないためには、500
℃以下の低温プロセスが必要である。本発明では上記遮
光膜9として砒素を多量に含むシリコン薄膜を用いるが
、以下のプロセスにより充分低温にて形成することがで
きる。まず窒化膜8の被着を終了した基板をチャンバー
の中で平行平板電極間の温度200℃のステージ上に設
置し、チャンバー内を10Torrの圧力に保ちながら
水素ベースの5%モノシランガスを10(PF=+ (
D R量でチャンバー内に供給する。この状態で両電極
間にパワー0.1”/♂のRF電力を印加すると微結晶
シリコンが200λルの割合いでこの基板の上面に堆積
し、1時間の反応で1μmの膜厚が得られる。次いで砒
素を加速電圧100keV、  ドーズ量5XIQim
  の条件でイオン注入した後、出力1.3J/cat
のQスイ、チルビーレーザ(パルス@20nsec)で
レーザアニール処理を施こす。その後光検知部にのみ窓
の開いたレジストパターンをマスクとして、プラズマエ
ツチングにより光検知部上のシリコン膜を除去し、遮光
膜9を形成する。かくして形成した膜は砒素を5X10
  crn 以上含有している。
5 is a thermal oxide film, and 6 is an aluminum wiring. An example of a method for manufacturing the light shielding film 9 will be described below. First, after completing the formation of the photodetector element 2 and the adhesion of the circuit wiring 6, the photodetection part is protected only with the CVD oxide film 7, and the signal processing circuit part is protected by the CVD oxide film 7.
Two layers, the VD oxide film 7 and the plasma-enhanced film 8, are deposited in this order so as to protect them. The reason why the light detection part is protected only by the CVD oxide film 7 is that the refractive index of the nitride film 8 is 2.
.. This is to suppress the loss of light due to total reflection at the interface with the oxide film 7 with a refractive index of 1.45.Next, a light shielding film 9 is deposited on the plasma nitride film 8. At this time, in order not to damage the lower layer aluminum wiring 6, 500
A low temperature process below ℃ is required. In the present invention, a silicon thin film containing a large amount of arsenic is used as the light shielding film 9, but it can be formed at a sufficiently low temperature by the following process. First, the substrate on which the nitride film 8 has been deposited is placed on a stage at a temperature of 200°C between parallel plate electrodes in a chamber, and hydrogen-based 5% monosilane gas is heated at 10 (PF) while maintaining the chamber pressure at 10 Torr. =+ (
DR amount is supplied into the chamber. In this state, when an RF power of 0.1''/♂ is applied between both electrodes, microcrystalline silicon is deposited on the upper surface of the substrate at a rate of 200λ, and a film thickness of 1 μm is obtained in 1 hour of reaction. Next, arsenic was applied at an accelerating voltage of 100 keV and a dose of 5XIQim.
After ion implantation under the following conditions, the output was 1.3 J/cat.
Laser annealing is performed using QSUI and Chilby laser (pulse @ 20nsec). Thereafter, using a resist pattern with a window open only in the photodetection area as a mask, the silicon film on the photodetection area is removed by plasma etching to form a light shielding film 9. The film thus formed contains 5×10 arsenic
Contains more than crn.

第2図は以上の方法により得られた遮光[9の光吸収ス
ペクトルを示した線図である。第2図かられかるように
、1l100f1より短波長側の元はほとんど遮ぎられ
てしまい、信号処理回路部には実質的に光は入射しない
ことになる。しかも遮光膜9は集積回路上に密着して設
けられるため、反射、回折等による迷光もなく、光検知
素子以外の部分に元が入射することを確実に避けること
ができる。
FIG. 2 is a diagram showing the light absorption spectrum of the shading [9] obtained by the above method. As can be seen from FIG. 2, most of the light on the wavelength side shorter than 1l100f1 is blocked, and substantially no light enters the signal processing circuit section. Moreover, since the light-shielding film 9 is provided in close contact with the integrated circuit, there is no stray light due to reflection, diffraction, etc., and it is possible to reliably prevent light from entering parts other than the photodetecting element.

なお、上記実施例では、光検知素子を含んだ半導体集積
回路を対象Iこ説明したが、もちろん本発明の趣旨を逸
脱しない範囲で、他の種々の集積回路に利用することが
できる。たとえば元により消去可能な半導体メモリにお
いて、そのアドレス部は1本発明の方法で遮蔽するなど
である。
In the above embodiment, a semiconductor integrated circuit including a photodetecting element was described as an object, but the present invention can of course be applied to various other integrated circuits without departing from the spirit of the present invention. For example, in an originally erasable semiconductor memory, its address portion may be shielded using the method of the present invention.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、光検知素子を含む半導体集積回路にお
ける信号処理回路部直上に、砒素を多量に含む多結晶シ
リコン膜から成る遮′/を膜を設けることにより、信号
処理回路部の動作を妨害することのない光検知素子を含
む半導体集積回路を実用に供することが可能となった。
According to the present invention, a shield made of a polycrystalline silicon film containing a large amount of arsenic is provided directly above the signal processing circuit section of a semiconductor integrated circuit including a photodetecting element, thereby controlling the operation of the signal processing circuit section. It has become possible to put into practical use a semiconductor integrated circuit that includes a photodetector element that does not cause interference.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例である光信号処理用半導体集
積回路の要部構造断面図、第2図は多結晶シリコン膜の
光吸収スペクトルを表わす線図である。 1・・・N槃シリコン基板、2・−PN接合フォトダイ
オード、3・・、MOS )ランジスタ、4・・・キャ
パシタ、5・・・熱酸化膜、6・・・アルミニウム配線
、7・・・CVD酸化膜、8・・・CVD窒化膜、9・
・・遮光膜。 第1図 第2図 第3図 手続補正書(9鋤 昭和60年6月18日 1、事件の表示   特願昭10−〆り一&、3−90
3、補正をする者 事件との関係       出願人 4、代 理 人 第2図
FIG. 1 is a cross-sectional view of a main part structure of a semiconductor integrated circuit for optical signal processing which is an embodiment of the present invention, and FIG. 2 is a diagram showing a light absorption spectrum of a polycrystalline silicon film. DESCRIPTION OF SYMBOLS 1... N-type silicon substrate, 2... PN junction photodiode, 3..., MOS) transistor, 4... Capacitor, 5... Thermal oxide film, 6... Aluminum wiring, 7... CVD oxide film, 8...CVD nitride film, 9.
...Light-shielding film. Figure 1 Figure 2 Figure 3 Procedural amendment (9 plows) June 18, 1985 1, Indication of the case Patent application 1989-〆Riichi&, 3-90
3. Relationship with the case of the person making the amendment Applicant 4, Agent Figure 2

Claims (1)

【特許請求の範囲】 1)同一基板上に製作した多数の半導体素子の一部が光
検知素子である半導体集積回路装置において、上記光検
知素子以外の半導体素子を含む領域上に砒素を多量に含
む単結晶もしくは多結晶シリコンからなる遮光膜を備え
たことを特徴とする半導体集積回路装置。 2)特許請求の範囲第1項記載の装置において、シリコ
ンからなる遮光膜中の砒素の含有量を5×10^2^0
cm^−^3以上とすることを特徴とする半導体集積回
路装置。
[Scope of Claims] 1) In a semiconductor integrated circuit device in which a part of a large number of semiconductor elements manufactured on the same substrate is a photodetector, a large amount of arsenic is applied to a region containing semiconductor elements other than the photodetector. 1. A semiconductor integrated circuit device comprising a light shielding film made of monocrystalline or polycrystalline silicon. 2) In the device according to claim 1, the arsenic content in the light shielding film made of silicon is 5×10^2^0.
A semiconductor integrated circuit device characterized by having a diameter of cm^-^3 or more.
JP60105330A 1985-05-17 1985-05-17 Semiconductor integrated circuit device Pending JPS61263267A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60105330A JPS61263267A (en) 1985-05-17 1985-05-17 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60105330A JPS61263267A (en) 1985-05-17 1985-05-17 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS61263267A true JPS61263267A (en) 1986-11-21

Family

ID=14404711

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60105330A Pending JPS61263267A (en) 1985-05-17 1985-05-17 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS61263267A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03268359A (en) * 1990-03-16 1991-11-29 Nec Corp Solid-state image pickup device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03268359A (en) * 1990-03-16 1991-11-29 Nec Corp Solid-state image pickup device

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