JPS61260242A - Formation of resist pattern - Google Patents

Formation of resist pattern

Info

Publication number
JPS61260242A
JPS61260242A JP10294285A JP10294285A JPS61260242A JP S61260242 A JPS61260242 A JP S61260242A JP 10294285 A JP10294285 A JP 10294285A JP 10294285 A JP10294285 A JP 10294285A JP S61260242 A JPS61260242 A JP S61260242A
Authority
JP
Japan
Prior art keywords
resist
pmss
layer resist
pattern
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10294285A
Other languages
Japanese (ja)
Inventor
Masashi Miyagawa
昌士 宮川
Yasuhiro Yoneda
泰博 米田
Shunichi Fukuyama
俊一 福山
Kota Nishii
耕太 西井
Azuma Matsuura
東 松浦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10294285A priority Critical patent/JPS61260242A/en
Publication of JPS61260242A publication Critical patent/JPS61260242A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/30Imagewise removal using liquid means
    • G03F7/32Liquid compositions therefor, e.g. developers
    • G03F7/325Non-aqueous compositions

Abstract

PURPOSE:To eliminate swelling and to execute a developing process without the generation of scum by adding a poor solvent to a good solvent of polymethylsilsesquioxane (PMSS) at the highest possible ratio within a range where the development residues are not formed. CONSTITUTION:After a lower layer resist is provided on an Si substrate, a 4-methyl-2-pentanone soln. of PMSS is coated thereon and is prebaked to form an upper layer resist. A pattern is drawn thereon and thereafter the substrate is immersed in a soln. mixture composed of 4-methyl-2-pentanone and ethanol and is developed, then the substrate is immersed in isopropanol and is subjected to a rinse treatment. The upper layer resist is thereby developed and the PMSS pattern having no scum is formed on the lower layer resist at 0.3mum line and space.

Description

【発明の詳細な説明】 〔概要〕 電子線リソグラフィの二層構造レジストにおいて上層レ
ジストとして使用するポリメチルシルセスキオキサンは
現像に際して膨潤してスカムが発生し易い。
DETAILED DESCRIPTION OF THE INVENTION [Summary] Polymethylsilsesquioxane used as an upper layer resist in a two-layer resist for electron beam lithography swells during development and tends to generate scum.

本発明は良溶媒と貧溶媒の混合液を使用して現像するこ
とよりスカムの発生をなくし、高精度のレジストパター
ンを得るものである。
The present invention eliminates the generation of scum and obtains a highly accurate resist pattern by performing development using a mixed solution of a good solvent and a poor solvent.

〔産業上の利用分野〕[Industrial application field]

本発明は二層構造用上層レジストの現像液組成に関する
The present invention relates to a developer composition for an upper layer resist for a two-layer structure.

半導体素子は高集積化が進んでおりICよりLSIへ、
またLSIよりVLSIへと大、容量化されているが、
これは薄膜形成技術と写真食刻技術(ホ) IJソグラ
フィ)の進歩により実現されている。
Semiconductor devices are becoming more highly integrated, from ICs to LSIs.
Also, although the capacity has increased from LSI to VLSI,
This has been realized through advances in thin film formation technology and photolithography (IJ lithography).

ここで写、真食刻技術は被処理基板の上にスピンコード
法などの方法でレジストを被覆し、これにマスクを通し
て紫外線の照射を行って感光させるもので、露光部が現
像液に対して溶解度の差を生ずるのを利用してレジスト
パターンの形成を行っている。
Photo etching technology involves coating a resist on the substrate to be processed using a method such as a spin code method, and exposing it to ultraviolet rays through a mask, so that the exposed area is exposed to the developer. A resist pattern is formed by taking advantage of the difference in solubility.

ここでパターン形成の型として光鱈光部が現像液に不溶
となるネガタイプと可溶となるポジタイプとがある。
Here, there are two types of pattern forming molds: a negative type in which the light part is insoluble in the developer, and a positive type in which the light part is soluble.

さて、従来の紫外線露光によるパターン形成法では波長
による制限から微細パターンの形成は最小で0.7 μ
mラインアンドスペースに限られ、実質的に1μm以下
の線幅のパターン形成は困難である。
Now, in the conventional pattern formation method using ultraviolet light exposure, the minimum pattern formation is 0.7μ due to wavelength limitations.
It is limited to m lines and spaces, and it is difficult to form a pattern with a line width of substantially 1 μm or less.

然し、LSI −PVLSIのパターン形成にはサブミ
クロン幅のパターン形成が必要であり、この形成技術の
実用化が要望されている。
However, pattern formation of LSI-PVLSI requires pattern formation of submicron width, and there is a demand for practical application of this formation technology.

一方、電子線の波長は加速電圧により異なるが0.1人
程度であり、光の波長に較べて4桁以上も小さいために
大きな解像力が期待でき、0.1μ蒙幅のパターン形成
も可能となる。
On the other hand, the wavelength of an electron beam varies depending on the accelerating voltage, but is about 0.1 nm, which is more than 4 orders of magnitude smaller than the wavelength of light, so it can be expected to have great resolution, and it is also possible to form patterns with a width of 0.1 μm. Become.

そのためサブミクロンパターンの形成には従来の紫外線
リソグラフィに代わって電子線リソグラフィが使用され
ている。
Therefore, electron beam lithography is used instead of conventional ultraviolet lithography to form submicron patterns.

〔従来の技術〕[Conventional technology]

電子線リソグラフィに使用するネガ型レジストとしてク
ロロメチル化ポリスチレンや環化ポリイソプレンなどが
あり、被処理基板の上にスピンコード法などにより約1
μmの厚さに被覆し、これに電子線を走査して微細パタ
ーンを描画し、現像してレジストパターンを形成してい
る。
Negative resists used in electron beam lithography include chloromethylated polystyrene and cyclized polyisoprene.
A resist pattern is formed by coating the film with a thickness of μm, scanning it with an electron beam to draw a fine pattern, and developing it.

然し、このような一層レジストではパターンを描画する
際に電子がシリコン(Si)からなる被処理基板(以下
略してSi基板)で反射し、散乱するため微細パターン
が描画できない。
However, with such a single-layer resist, when a pattern is drawn, electrons are reflected and scattered by a substrate to be processed (hereinafter referred to as a Si substrate) made of silicon (Si), so that fine patterns cannot be drawn.

そこで電子の散乱の影響を受けにくい二層構造のレジス
トが開発された。
Therefore, a resist with a two-layer structure that is less susceptible to electron scattering was developed.

ここで二層構造を形成する下層レジストは熱硬化処理が
終わった後では耐溶剤性が優れ、またハロゲンプラズマ
に対して耐ドライエツチング性が優れていることが必要
条件であって、例えばノボラック樹脂とエポキシ樹脂と
の共重合体が挙げられる。
The lower resist forming the two-layer structure must have excellent solvent resistance after the heat curing process and dry etching resistance against halogen plasma, such as novolak resin. and epoxy resin copolymers.

一方上層しシストは電子線に対して感度が良く、解像性
が優れており、酸素(02)プラズマに対して耐ドライ
エツチング性が優れていることが必要である。
On the other hand, the upper cyst layer must have good sensitivity to electron beams, excellent resolution, and excellent dry etching resistance to oxygen (02) plasma.

すなわち二層レジストを用いる電子線リソグラフィは電
子線の走査によって感光し重合した部分を除いて上層レ
ジストをケミカルエツチングにより除去した後、上層レ
ジストパターンをマスクとして酸素プラズマにより下層
レジストの窓開けを行い、次ぎに上層レジストと下層レ
ジストからなる二層レジストパターンをマスクとして2
、ロゲンプラズマを用いてSi基板のドライエツチング
を行うものである。
In other words, in electron beam lithography using a two-layer resist, the upper resist is removed by chemical etching except for the portions exposed and polymerized by electron beam scanning, and then the lower resist is opened using oxygen plasma using the upper resist pattern as a mask. Next, a two-layer resist pattern consisting of an upper layer resist and a lower layer resist is used as a mask.
, which performs dry etching of a Si substrate using logen plasma.

かかる観点からすると一層しシストとして用いられてい
る前記のクロロメチル化ポリスチレンや環化ポリイソプ
レンなどを上層レジストとして使用することは耐ドライ
エツチング性が劣ることから不適であり、発明者等は上
層レジストとしてポリメチルシルセスキオキサン(以下
略称PMSS)の使用を提案している。
From this point of view, it is inappropriate to use the above-mentioned chloromethylated polystyrene, cyclized polyisoprene, etc., which are used as a layer resist, as an upper layer resist because of poor dry etching resistance. The authors propose the use of polymethylsilsesquioxane (hereinafter abbreviated as PMSS).

然し、PMSSのようなシリコーン系のレジストは現像
後においてレジストパターンの周りにスカムを発生゛し
、解像性を損なうと云う問題があり、この対策が必要で
あった。
However, silicone resists such as PMSS have the problem of generating scum around the resist pattern after development, impairing resolution, and countermeasures have been required.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

以上説明したように電子線リソグラフィに使用する二層
レジストの上層レジストとして、 PMSSを用いる場
合に現像処理が終わった後、レジストパターンにスカム
が発生し易く、解像性を損なうことが問題である。
As explained above, when PMSS is used as the upper layer resist of a two-layer resist used in electron beam lithography, scum tends to form on the resist pattern after the development process is completed, which causes a problem in resolution. .

〔問題点を解決するための手段〕[Means for solving problems]

上記の問題は電子線リソグラフィの二層構造レジストに
使用するPMSS現像液が該PMSSの良溶媒と貧溶媒
との組合せよりなることを特徴とするレジストパターン
の形成方法をとることにより解決することができる。
The above problem can be solved by adopting a resist pattern forming method characterized in that the PMSS developer used for the two-layer structure resist of electron beam lithography consists of a combination of a good solvent and a poor solvent for the PMSS. can.

〔作用〕[Effect]

二層レジストの上層レジストとしてPMSSを用いる場
合に現像後にスカムが発生し易い理由は現像処理におい
て膨潤が起るためである。
The reason why scum is likely to occur after development when PMSS is used as the upper layer resist of a two-layer resist is that swelling occurs during the development process.

そこで本発明はPMSSの良溶媒に貧溶媒を現像残渣が
生じない範囲でできるだけ多量に添加する方法をとるこ
とにより膨潤を無くし、スカムの発生のない現像処理を
行うものである。
Therefore, the present invention aims to eliminate swelling and perform a development process without generating scum by adding a poor solvent to the good solvent of PMSS in an amount as large as possible without producing development residue.

ここでPMSSの良溶媒は、 4−メチル−2−ペンタノン、2−ブタノン、酢酸イソ
アミール、   酢酸エチル、1.4−ジオキサン、 などを挙げることができ、 また、貧溶媒としては、 シクロヘキサノン、    アセトン、イソプロパツー
ル、   エタノール、メタノール、      アセ
トニトリル、ベンジルアルコール、 などを挙げることができる。
Here, good solvents for PMSS include 4-methyl-2-pentanone, 2-butanone, isoamyl acetate, ethyl acetate, 1,4-dioxane, etc., and poor solvents include cyclohexanone, acetone, Examples include isopropanol, ethanol, methanol, acetonitrile, benzyl alcohol, etc.

図は良溶媒として4−メチル−2−ペンタノンを用いた
場合、貧溶媒との最適な混合範囲を示すもので、例をイ
ソプロパツールにとると4−メチル−2−ペンタノンの
混合比が20〜100容量%の場合はPMSSの現像は
できるが、4−メチル−2−ペンタノンの混合比が増す
に従って膨潤するようになり、一方20容量%以下の場
合は現像ができない。
The figure shows the optimal mixing range with a poor solvent when 4-methyl-2-pentanone is used as a good solvent. Taking isopropanol as an example, the mixing ratio of 4-methyl-2-pentanone is 20 If the amount is 100% by volume or less, development of PMSS is possible, but as the mixing ratio of 4-methyl-2-pentanone increases, swelling will occur, while if it is less than 20% by volume, development cannot be performed.

そこでスカムを生じない最適な現像液は4−メチル−2
−ペンタノンとイソプロパツールの混合比力20 : 
80容量%の場合が最適となる。
Therefore, the optimal developer that does not produce scum is 4-methyl-2
-Mixing specific strength of pentanone and isopropanol: 20:
The optimum case is 80% by volume.

〔実施例〕〔Example〕

Si基板上にポジ型ホトレジス) 0FPR−800(
東京応化社製)をスピンコード法により約2μmの厚さ
に塗布し、200℃で1時間に互って加熱して硬化させ
下層レジストとした。
Positive photoresist on Si substrate) 0FPR-800 (
(manufactured by Tokyo Ohka Co., Ltd.) was coated to a thickness of about 2 μm by a spin code method, and heated and cured at 200° C. for 1 hour to form a lower resist.

次ぎにこの上にPMSS (重量平均分子量が3300
0゜分散度1.36)の4−メチル−2−ペンタノン溶
液をスピンコード法を用いて0.2μmの厚さに塗布し
、N2気流中で80℃で20分プリベークして上層レジ
ストを形成した。
Next, add PMSS (weight average molecular weight is 3300
A 4-methyl-2-pentanone solution with a 0° dispersion degree of 1.36) was applied to a thickness of 0.2 μm using a spin code method, and prebaked at 80°C for 20 minutes in a N2 stream to form an upper resist layer. did.

かかる試料に加速電圧が20KVの電子線でパターンの
描画を行った後、4−メチル−2−ペンタノンとエタノ
ールの混合液(容量比1:1)に30秒浸漬して現像し
た後、イソプロパツールに30秒浸漬してリンス処理を
行った。
After drawing a pattern on the sample using an electron beam with an accelerating voltage of 20 KV, it was developed by immersing it in a mixture of 4-methyl-2-pentanone and ethanol (volume ratio 1:1) for 30 seconds, and then isopropyl A rinsing treatment was performed by immersing the tool in the tool for 30 seconds.

以上の処理により上層レジストは現像され、下層レジス
トの上に0.3μmラインアンドスペースでスカムのな
いPMSSパターンを形成することができた。
Through the above process, the upper resist layer was developed, and a scum-free PMSS pattern with 0.3 μm line and space could be formed on the lower resist layer.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明の実施によって膨潤がなく、
従ってスカムの発生のないPMSSの現像を行うことが
可能となる。
As explained above, by carrying out the present invention, there is no swelling,
Therefore, it is possible to perform PMSS development without generating scum.

【図面の簡単な説明】[Brief explanation of the drawing]

図は良溶媒として4−メチル−2−ペンタノンを用いる
場合の現像可能範囲を示す説明図である。 ユ
The figure is an explanatory diagram showing the developable range when 4-methyl-2-pentanone is used as a good solvent. Yu

Claims (1)

【特許請求の範囲】[Claims] 電子線リソグラフィの二層構造上層レジストに使用する
ポリメチルシルセスキオキサンの現像液が該ポリメチル
シルセスキオキサンの良溶媒と貧溶媒との混合液よりな
ることを特徴とするレジストパターンの形成方法。
Formation of a resist pattern characterized in that a polymethylsilsesquioxane developer used for a two-layer structure upper layer resist in electron beam lithography is a mixture of a good solvent and a poor solvent for the polymethylsilsesquioxane. Method.
JP10294285A 1985-05-15 1985-05-15 Formation of resist pattern Pending JPS61260242A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10294285A JPS61260242A (en) 1985-05-15 1985-05-15 Formation of resist pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10294285A JPS61260242A (en) 1985-05-15 1985-05-15 Formation of resist pattern

Publications (1)

Publication Number Publication Date
JPS61260242A true JPS61260242A (en) 1986-11-18

Family

ID=14340881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10294285A Pending JPS61260242A (en) 1985-05-15 1985-05-15 Formation of resist pattern

Country Status (1)

Country Link
JP (1) JPS61260242A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03179453A (en) * 1989-12-08 1991-08-05 Oki Electric Ind Co Ltd Pattern forming method
US8864898B2 (en) 2011-05-31 2014-10-21 Honeywell International Inc. Coating formulations for optical elements
US8992806B2 (en) 2003-11-18 2015-03-31 Honeywell International Inc. Antireflective coatings for via fill and photolithography applications and methods of preparation thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03179453A (en) * 1989-12-08 1991-08-05 Oki Electric Ind Co Ltd Pattern forming method
US8992806B2 (en) 2003-11-18 2015-03-31 Honeywell International Inc. Antireflective coatings for via fill and photolithography applications and methods of preparation thereof
US8864898B2 (en) 2011-05-31 2014-10-21 Honeywell International Inc. Coating formulations for optical elements

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