JPS6123490A - Ntsc digital color demodulation circuit - Google Patents

Abstract

PURPOSE:To attain ease of digital RGB matrix by decreasing the period of demodulation of orthogonal two components of a color signal. CONSTITUTION:A comosite video signal from an input terminal is subjected to A/D conversion by a clock pulse C4 at an A/D converter 2. A color signal separating circuit 3 separates a sampled decoding video signal into a luminance signal and a chrominance signal and only the sampling series of the chrominance signal is given to a code inverter 10. The sampling series from the inverter 10 is given to a digital filter comprising delay circuits 11-14, adders 15-17 and operating circuits 18-21. The circuits 11-14 have a delay time equal to the sampling period and the circuits 18-21 apply operation halving the given signal. As a result, a switch circuit 22 responds to the clock pulse F2, switches a signal given to both inputs 23, 24 and two orthogonal components of the chrominance signal are outputted separately from both the outputs 25, 26.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a color demodulation circuit that digitally separates two orthogonal color signal components directly from an NTSC composite video signal.

[Prior art 1] FIG. 1 is a schematic block diagram showing a conventional and generally considered digital color demodulation circuit for an NTSC composite video signal. In the figure, the composite video signal is applied to terminal 1. The A/D converter 612 converts the composite iron signal from analog to digital under the control of the clock pulse C1 from the clock pulse generating circuit 8. The digitized composite video signal is separated into an llf signal and a color signal in a color signal separation circuit 3. The color signal separation circuit 3 generally uses a comb filter. The separated color signals are provided to buffers 4 and 5. Buffer 4 is
In response to the clock signal C2 from the clock pulse generation circuit 8, a color signal is applied to the output terminal 6. On the other hand, buffer 5
is the clock signal C3 from the clock pulse generation circuit 8
In response to this, a color signal is applied to the output terminal 7.

The clock pulse C1 has a repetition frequency four times that of the color subcarrier, and is phase-controlled so that the rising and falling edges coincide at the zero phase of the color burst. The clock pulse C2 has a repetition frequency equal to that of the color printing carrier wave, and is phase-controlled so that its rise coincides with the 1800th position of the color paste. Further, the clock pulse C3 has the same repetition frequency as the clock pulse C2, and is phase-controlled so that it lags the clock pulse C2 by 90'' in phase. Figure 2 shows the color burst and these clock pulses C1. , C2 and C3. Under the control of these clock pulses, two orthogonal components of the color signal are transmitted to terminals 6 and 7 in FIG. is output.

In operation, the composite video signal applied to terminal 1 is A
, /D converter 2 converts the analog signal into a digital signal at 1ltvI when the clock pulse C1 rises. Next, the color signal components separated in the color signal separation circuit 3 are supplied to buffers 4 and 5. As described above, the clock pulse C1 is phase-controlled so that the pulse rises at the zero phase of the color burst, so the color signal component output from the color signal separation circuit 3 is as follows.
At the instant when clock pulses C2 and C3 rise, these are the two orthogonal components of the color signal. buffer 4
and 5 output color signals to output terminals 6 and 7 at the instant of rising of clock pulses C2 and C3, respectively, so that two orthogonal components of the color signal are obtained at output terminals 6 and 7 as digital signals.

Since the conventional digital color AM circuit is configured as described above, only the value of the orthogonal component of the color signal for each period of the color subcarrier is detected. As described above, the conventionally considered digital color demodulation circuit has the disadvantage that the demodulation cycle is long, and therefore it is difficult to perform digital RGB matrixing.

[Summary of the Invention] Therefore, an object of the present invention is to provide a color signal separation circuit that can easily perform digital RGB matrixing by shortening the period of demodulation of two orthogonal components of a color signal. That's true.

According to this invention, NTSC? ! The two combined video signals have a repetition frequency four times that of the color subcarrier and have a repetition frequency of 4 times the color subcarrier and the color burst at zero phase, at 90'' phase, at 1806 phase, and at 27'' phase.
Sampling is performed at a phase-controlled sampling frequency such that a sampling point position exists corresponding to the 0° phase. A color signal is separated from the sampled composite video signal to provide a sample value sequence of color values. Among the sample value series, the signs of the sample values corresponding to the 180' phase and the 270° phase of the color burst are inverted. The partially sign-inverted sample value series is fed to a digital filter, where appropriate calculations are performed, and only the low-frequency components of the sample value series are supplied. The output of the digital filter is switched at the sampling frequency,
Thereby, two orthogonal components of the color signal are separated.

[Embodiment of the invention] FIG. 3 shows an NTSC system according to a preferred embodiment of the invention.
FIG. 2 is a schematic block diagram illustrating a digital color *S* circuit.

In the figure, the NTSC composite video signal applied to input terminal 1 is A y' D 11 j! It is supplied to J unit 2. The A/D converter 2 responds to the clock pulse C4 from the clock pulse generation circuit 8 and converts the applied NT8G composite video signal from an analog signal to a digital signal. The composite video signal sampled in this manner is provided to the color signal separation circuit 3. The chrominance signal separation circuit 3 separates the sampled composite video signal into a luminance signal and a chrominance signal, and supplies only the sample value series of the chrominance signal to the sign inverter 10. For example, a comb filter may be used in the color signal separation circuit 3. The sign inverter 10 inverts the sign of the sampled value in the sampled value series of the color signal in response to the clock pulse F1 from the clock pulse generation circuit 8.

The color signal sample value series from the sign inverter 10 is sent to delay circuits 11 to 14, adders 15 to 17, and arithmetic circuits 18 to 14.
21 to a digital filter. Delay circuits 11 to 14 have a delay time equal to one sampling period. Arithmetic circuits 18 to 21 perform arithmetic operations that divide the applied signals by 1/2. This arithmetic circuit can be configured with a shift register, for example.

The color signal sample value sequence from the sign inverter 10 is provided to a delay circuit 11 and an arithmetic circuit 18.

The output of the delay circuit 11 is sent to the delay circuit 12 and the adder 16.
is given to one input. The output of the arithmetic circuit 18 is given to one input of the adder 15. The output of delay circuit 12 is applied to the other input of adder 15 and delay circuit 13 . The output of delay circuit 13 is applied to the other input of adder 16 and delay circuit 14 . The output of the delay circuit 14 is
It is applied to one input of the adder 17 via the arithmetic circuit 19. The output of the adder 15 is given to the other input of the adder 17 . The output of the adder 17 is given to one of the switches 23 of the switch circuit 22 via the arithmetic circuit 20 . Further, the output of the adder 16 is given to the other human power 24 of the switch circuit 22 via the arithmetic circuit 21 . In response to the clock pulse F2 from the clock pulse generation circuit 8, the switch circuit 22 switches the signals (two orthogonal components of the color signal) given to the Ryokawa forces 23 and 24, thereby causing the signals from the Ryokawa forces 25 and 26 to Two orthogonal components of the color signal are separated and output. The two orthogonal components of the color signal separated in this way are taken out from output terminals 6 and 7.

FIG. 4 is a timing diagram showing the timing of clock pulses C4, Fl, and F2 generated in the clock pulse generating circuit 8 with respect to the color burst. A/
The clock pulse C4 applied to the DI converter 2 has a repetition frequency four times that of the color subcarrier, and is phase-controlled so that its rising edge coincides with the zero phase of the color burst. The clock pulse F1 given to the sign inverter 10 is
It has a repetition frequency equal to the color subcarrier and is phase controlled to have a logic value of 1 at the zero and 90'' phases of the color burst and a logic value of O at the 180' and 2706 phases of the color burst. The clock pulse F2 applied to the switch circuit 22 has a repetition frequency twice that of the color subcarrier, has a logic value of 1 at the zero phase of the color burst, and has a logic value of 1 at the zero phase of the color burst. The phase is controlled to have a logical value of 0 at the phase.

Next, the operation of the NTSC digital color II tone circuit shown in FIG. 3 will be explained. The composite video signal applied to the input terminal 1 is converted from an analog signal to a digital signal in the A/D converter 2 at the instant when the clock pulse C4 rises. The composite video signal sampled in this manner is applied to the color signal separation circuit 3, where the color signal components are separated and a sample value sequence of the color signal is obtained. Since the clock pulse C4 is phase-controlled so that the rising edge coincides with the clear phase, 906 phase, 1800 phase, and 270' phase of the color burst, the digital color signal extracted by the above operation has a sign. If we ignore , it is a return of two orthogonal components. That is, in the A/D converter 2, the color signal sampled at the zero phase of the color burst is "-(red difference signal)", and the color signal sampled at the zero phase of the color burst is "-(red difference signal)", and
@The color signal sampled during phase is “-(blue difference signal)”
The color signal sampled at 180" phase of the color burst is the "red difference signal", and the color signal sampled at 180" phase of the color burst is the "red difference signal",
The color signal sampled at the 700 phase is a "blue color difference signal."

The sample value sequence of the color signal output from the color signal separation circuit 3 is processed by the sign inverter 10 when the clock pulse F1 is 11.
”, the sign is inverted only when As mentioned above, since the clock pulse F1 has the logical value 'I at the zero phase and the 90'' phase of the color burst, the sample value series of the color signal output from the sign inverter 10 is twice as large as the color subcarrier, respectively. It consists of digital values of a "red difference signal" and a "blue difference signal" that are repeated alternately at a frequency determined by the frequency of the signal.

This color signal sample value sequence is supplied to the input portions of the delay circuit 11 and the arithmetic circuit 18, respectively.

Delay circuits 11 to 14, adders 15 to 17, and calculation circuits 18 to 21 constitute a digital filter, and perform the following calculations on a sample value series of a given color signal. That is, one input section 23 of the switch circuit 22 has
From the sample value SO, the sample value S2 from two samples before, and the sample INS from four samples before, the direct value calculated by the following equation (1) is supplied. In addition, the other input section 24 of the switch circuit 22 is supplied with a value calculated by the following formula % formula % (2) from the sample ms of one sample before this HMA and the sample IS three samples before full. be done.

In equation (1), sample value So,84 and sample value S2 have a phase difference of 1806 degrees, and in equation (2), sample value S1 and sample value S have a phase difference of 180°, so their respective In the equation, high frequency components are canceled out and removed. In other words, one input section 23 of the switch circuit 22 receives a "red difference signal" from which high frequency components have been removed.
and 1 blue difference signal are alternately supplied at a period determined by twice the frequency of the middle subcarrier, and the other input section 24 of the switch circuit 22 receives a signal interpolated from the preceding and succeeding values.
The "blue difference signal" and the "red difference signal" are alternately supplied at the above-mentioned period.

The switch circuit 22 connects the output sections 25 and 26 to the input sections 23 and 24 respectively when the clock pulse F2 is "1", and connects the output sections 25 and 26 to the input sections 23 and 24 when the clock pulse F2 is "10".
．． 26 to input sections 24 and 23, respectively. Therefore, the "red difference signal" is always output to the output section 25 of the switch circuit 22, and the "blue difference signal" is always output to the output section 26.
is output. In this way, each of the two orthogonal components of the color signal, the "red difference signal" and the "blue difference signal", is transmitted from output terminals 6 and 7 at a period determined by four times the frequency of the color subcarrier. Separated and taken out.

Note that in the above description, for the sake of simplicity, time delays in signal propagation occurring in the color signal separation circuit 3 and the like have been ignored.

Further, in the above embodiment, the digital filter is composed of delay circuits 11 to 14, adders 15 to 17, and arithmetic circuits 18 to 21, but if it can function as a low-pass filter, the illustrated It is not limited to circuits. In addition, even if the interpolation calculation function is not provided, it is possible to extract two orthogonal components of the color signal at twice the period of the conventional method, but by providing the interpolation calculation function, the It becomes possible to extract two orthogonal components of the color signal with a period of .

[Effects of the Invention] As described above, according to the present invention, two orthogonal color signals
Since the component detection cycle becomes shorter, digital RG
B matrix can be easily performed. At the same time, since high-frequency components of the signal are removed, high-frequency noise is removed, and a smooth demodulated output can be obtained.

[Brief explanation of drawings]

FIG. 1 is a block diagram (not showing) of a conventional NTSC digital color one-tone circuit, FIG. 2 is a timing diagram of clock pulses used in the circuit of FIG. 1, and FIG. 3 is a preferred embodiment of the present invention. FIG. 4 is a block diagram showing the NTSC digital color #M11 circuit, and FIG. 4 shows a timing diagram of clock pulses used in the circuit of FIG. 3, respectively. In the figure, 1 is a composite video signal input terminal, 2 is an A/DI
Converter, 3 is color signal separation circuit, 4.5 is buffer, 6.7
is an output terminal, 8 is a clock pulse generation circuit, 10 is a sign inverter, 11 to 14 are delay circuits, 15 to 17 are adders,
18 to 21 are arithmetic circuits, and 22 is a switch circuit, respectively. Agent Masu Oiwa! '
+73- U U (J procedural amendment (voluntary) Showa 5% November 298 2. Name of the invention NTSC digital color demodulation circuit 3, relationship to the person making the amendment case Patent applicant address 2-chome Marunouchi, Chiyoda-ku, Tokyo No. 2 No. 3 Name (601) Mitsubishi Electric Corporation Representative Hitoshi Katayama Department 5, Claims column and Detailed explanation of the invention column 6 of the specification to be amended, Contents of the amendment (1) Specification The scope of claims of the patent application is amended as shown in the attached sheet. (2) “Given” in line 4 of page 7 of the specification is amended to “given.” Above 2, Scope of Claims (1) NTSC A color*ai circuit that receives a composite video signal and digitally extracts two orthogonal components of a color signal from the composite video signal, which has a repetition frequency four times that of the color subcarrier and has a color burst zero. means for sampling the composite video signal at a sampling frequency that is phase-controlled so that sample point position values exist corresponding to the phase, 90'' phase, 180@phase, and 270''phase; means for separating a color signal from the converted composite video signal and providing a sample value sequence of the color signal; means for inverting the sign of the sample value corresponding to the 900 phase; and performing appropriate deduction on the partially sign-inverted sample value series of the color signal, thereby supplying only the low-frequency components of the sample value series; and means for separating two orthogonal components of the color signal by switching the output of the digital filter at the sampling frequency.An NTSC digital color I111 circuit. (2) The digital filter is an NTSC digital color I111 circuit. , for each of the two orthogonal components in the sample value series of the color signal, an interpolation operation is performed using sample values before and after each constant period determined by a repetition frequency twice the color subcarrier. NTSC digital as claimed in claim 1, wherein the digital filter outputs each of the two orthogonal components of the color signal for each cycle determined by the sampling frequency. Color W circuit. -ζF

Claims (2)

[Claims] (1) A color demodulation circuit that receives an NASC composite video signal and digitally extracts two orthogonal components of a color signal from the composite video signal, which has a repetition frequency four times that of the color subcarrier, and has a color means for sampling the composite video signal at a sampling frequency whose phase is controlled so that sample point positions exist corresponding to the zero phase, 90° phase, 180° phase, and 270° phase of the burst; means for separating a color signal from the sampled composite video signal and providing a sample value series of the color signal; and means for receiving the sample value series of the color signal, and a means for receiving the sample value series of the color signal and detecting the zero phase of the color burst in the sample value series. means for inverting the signs of the sample values corresponding to the time and the 90° phase; and performing an appropriate operation on the partially sign-inverted sample value series of the color signal, so that only the low-frequency components of the sample value series are an NTSC digital color demodulation circuit, comprising: a digital filter that supplies: and means for separating two orthogonal components of the color signal by switching the output of the digital filter at the sampling frequency. (2) For each of the two orthogonal components in the sample value series of the color signal, the digital filter extracts the sample values before and after each constant period determined by a repetition frequency twice the color subcarrier. The color signal includes means for performing an interpolation operation using the digital filter, whereby each of the two orthogonal components of the color signal is outputted from the digital filter for each period determined by the sampling frequency. NTSC digital color demodulation circuit according to scope 1.