JPS61230678A - Recording and reproducing device for pcm signal - Google Patents

Abstract

PURPOSE:To record PCM signals having different numbers of quantized bits and different frequencies for each prescribed number of words with exchange of the order of data. CONSTITUTION:In a recording mode the PCM signals of (n) channels having the quantized bit number m2 and sampling frequency f2 is divided for each number of bits of 2n times as much as the least common multiple (i) between m1 and m2. Then the data are exchanged by a conversion circuit 7 for each number of bits equal to the greatest common measure (j) between m1 and m2 so as to obtain coincidence between the data on even- and odd-number words of each channel and the positions of even- and odd-number words of each channel of the PCM signal of the bit number m1 and frequency f1 respectively within the data of iX2n bits. Then these data are recorded. While in a reproducing mode the exchange of data done in the recording mode is reversed by a conversion circuit 13.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a PCM signal recording and reproducing device, and in particular to a PCM signal suitable for recording and reproducing an audio PCM signal on a digital audio tape recorder (DAT). The present invention relates to a recording/reproducing device.

[Background of the invention]

D converts audio into PCM signals and records them on magnetic tape
AT has the advantage of excellent sound quality and no deterioration in quality due to recording and playback.

Regarding DAT, the rotating head type and fixed head type described in the document entitled ``Activities of the DAT Council'' written by Ryuji Iwashita in the magazine ``Electronic'' Vol. 10 (1982) are considered. It is being This DAT records two-channel signals with a sampling frequency of 48 KHz and a quantization bit count of 16 bits. However, by reducing the information content of the PCM signal, for example by setting the sampling frequency to 32 KHz and the number of quantization bits to 12 bits, the recording time can be doubled.

FIG. 2 shows a recording pattern on a magnetic tape of a rotary head type DAT. Ten azimuth tracks 34 and -azimuth tracks 35 are alternately recorded on the magnetic tape 33. Each track has 128 blocks of P.
CM signals are recorded.

3 and 4 show the structure of PCM data of a rotary head type DAT. Figure 6 shows the data of ten azimuth tracks, Figure 4 shows the data of one azimuth track, 36 shows the data of 1 symbol (=8 bits), 37
is the first error correction code, and 38 is the second error correction code. Rotating head method 1) In the AT, a PCM signal of 16 bits in one word of two channels is divided into symbols of 8 bits and recorded. One block is composed of 32 symbols, and 128 blocks of data are recorded on one track. The data is distributed so that even if a large burst error occurs, it can be corrected. In other words, the even numbered data of the L channel is placed in the first half of the ten azimuth track, and the odd numbered data is placed in the -
The data is recorded in the latter half of the azimuth track, and even-numbered data of the R channel is recorded in the first half of one azimuth track, and odd-numbered data is recorded in the second half of ten azimuth tracks. Note that in R-DAT, the sampling link frequency is 48
Since the frequency is KHz and the cylinder rotation speed is 2000 ypm, data of 5760 symbols can be recorded in 2 tracks.

In this way, in the rotating head type DAT, the data structure is determined to be optimal for recording two channels of PCM signals with a 16-bit quantization bit number, and it is possible to record PCM signals with different sampling frequencies and quantization bit numbers. It does not take into account the case where the data is recorded.

, 3.

[Purpose of the invention]

An object of the present invention is to provide a PCM signal recording and reproducing apparatus that can record PCM signals having different numbers of quantization bits and sampling frequencies.

[Summary of the invention]

The present invention records a PCM signal with a quantization bit count of 12 bits and a sampling frequency of 32 KHz by changing the order of the data in units of 16 words.
This allows recording without changing the Hz-compatible signal processing circuit.

[Embodiments of the invention]

An embodiment of the present invention will be explained below with reference to FIG.

FIG. 1 shows the configuration of a rotating head type PCM signal recording and reproducing apparatus.

During recording, two H channels of analog signals are input from input terminal 1. The input signal is amplified to a predetermined level by an amplifier circuit 2, band-limited by a filter 3, and then sampled by a sample hold circuit 4. The sampled input signals are sequentially input to an A/D converter 6 by a switching circuit 5 and converted into a PCM signal. The PCM signal converted by the A/D converter 6 is rearranged in the data conversion circuit 7 and written into the RAM 15 through the pass line 14. and,
Address generation circuits 17 to 19 and address switching circuit 16
The addresses of the RAM 15 are controlled by , and PCM signals are arranged and error correction codes are added according to the formats shown in FIGS. 6 and 4. Note that the addition of the error correction code is performed using the error correction circuit 20. After the pcM signal is arranged and the error correction code is added, each data is read out from the RAM 15 in block units and modulated by the modulation circuit 23. Then, control signals such as a synchronization signal and the like are added by the control signal U and the switching circuit 25, amplified to a predetermined level by the recording amplifier 26, and recorded on the magnetic tape 33 by the rotary disk 32.

The switching circuit 31 switches between recording and reproduction. Further, the timing generation circuit 21 is a circuit that generates a timing signal that controls the entire system using a clock generated by the oscillation circuit 22.

During reproduction, the switching circuit 31 is switched to the reproduction side, and the signal reproduced by the rotary head 32 is input to the reproduction amplifier 30, where it is amplified and waveform equalized. After the data is converted into a digital signal by the data strobe circuit 29, the demodulation circuit 27 demodulates the data and the synchronization detection circuit 28 detects a synchronization signal. The detected synchronization signal is used as a reference for data reproduction.

The data demodulated by the demodulation circuit 27 is stored in the RAM 1
5, the data is rearranged and error correction is performed by the error correction circuit 20. And pass line 14
The signal is input to the data conversion circuit I3 through. The data conversion circuit 13 performs the reverse replacement of the replacement performed by the data conversion circuit 7. The PCM signals rearranged in chronological order are sequentially converted into analog signals by a D/A converter 12, and resampled for each channel by a sample and hold circuit 1. Analog signals resampled in each channel are output from an output terminal 8 through a filter 10 and an amplifier circuit 9.

A portion 39 indicated by a broken line in FIG. 1 has a conventional quantum □ conversion bit number of 16 bits and a sampling frequency of 48 -fIz.

It has the same configuration as a DAT that records 12 channels of PCM signals. In the present invention, the data conversion circuit 7
By adding 13 and 13, it is possible to record a 2-channel PCM signal with a quantization bit count of 12 bits, a sampling frequency of 32 KHz, and 2 channels.

Note that the number of data bits per time is 1/2,
By reducing the number of rotations of the rotary head to 1/2, the recording capacity per track is kept the same.

FIG. 5 shows a conventional PC97 with R2 channel.

It shows the order of output data of the A/D converter when recording an M signal. The subscript indicates the chronological order of each data. The RAM 15 arranges the PCM signals input in this order so that the even-numbered data and odd-numbered data of each channel are separated as shown in FIGS. 3 and 4. There is.

On the other hand, when recording a PCM signal with a quantization bit count of 12 bits, the order of output data of the A/D converter is 6th.
The result will be as shown in figure (α). Quantization bit number 16 bits, sampling frequency 46 KHz, 2 channels and quantization bit number 12 bits, sampling frequency 32 KHz
Hz, 2 channels, the number of data per hour is 1/
2, it is also possible to record as is by reducing the number of rotations to 1/2.

However, in this case, the even and odd numbers of each channel do not correspond to the even and odd numbers of R as shown in FIG. 5, so even and odd data cannot be arranged separately. Therefore, data is exchanged as shown in FIG. 6 in the data conversion circuit.

In other words, data of 12 bits per word is stored in Figure 6 (h
) into 4-bit units. And Figure 6 F
Like C+, the even and odd data of each channel in units of 16 words corresponds to the position of the even and odd data of each channel of a PCM signal with a conventional quantization bit number of 16 bits and a sampling frequency of 48 KHz. Reorder the data so that it is placed in For example, LoA.

Let 16 bits of LoB, LoC, and L2A be Lt,
Figure 5 Glue.

Place it in the position L, #, L2C, L, A, L,
16 bits of E 1. / and place it at position L2 in Fig. 5, L, C.

16 bits of LoA, L6E, L, C,
/ and place it at position 14 in FIG.

FIGS. 7 and 8 show the structure of data when a PCM signal with a quantization bit count of 12 bits and a sampling frequency of 32 KHz is recorded using the conversion shown in FIG. 6. FIG. 7 shows a +azimuth track, and FIG. 8 shows a -azimuth track. As in the case of FIGS. 6 and 4, the even-numbered data and odd-numbered data of each channel are placed two tracks apart, so there may be a continuous error of one track or one track that spans two tracks. Even if a /2 continuous error occurs, the data that is continuous in time series will not become an error, and the error can be corrected by interpolation.

In this way, if the conversion shown in FIG. 6 is used, the number of quantization bits can be 12 bits with just a simple conversion.

PCM signals with a sampling frequency of 32 KEz can be recorded, and the data structure can be optimized even against burst errors. Incidentally, at the time of reproduction, the conversion from (c) in FIG. 6 to fbl may be performed.

FIG. 9 shows an example of the configuration of the data conversion circuits 7 and 13.

59 is a RAM, 60 is an address switching circuit, 61 is an addition circuit, 62 is a counter, and 63 is an offset generation circuit.

Data input manually through the input terminal 56 is written into the RAM. Then, it is read out from the RAM and output from the output terminal 57. Data conversion is performed by controlling the address at the time of reading. The capacity of the RAM is 4 bits and 19 words. The counter 62 is a hexadecimal counter, and counts up sequentially based on the clock input from the input terminal 48. RAM 59 writing/
The value of the counter 62 is used as the read address. The counter 47 is a 48-decimal counter and indicates the number of input data. The counter 47 has an input terminal 49
It is reset at the beginning of conversion by a reset signal input from the converter. The read address is controlled by adding the offset value output from the offset generation circuit 63 according to the value of the counter 47 and the value of the counter 62 by an adder circuit 6. The input terminal 58 is a RAM
This is the input terminal for the data write control signal.

FIG. 10 is a timing chart of input/output signals. When the clock signal 48 is '1', the address switching circuit 6
0 is switched to the counter 62 side, and at the same time, a RAM data write signal is input and data is written.

0'', the address switching circuit 60 is switched to the addition circuit 61 side, and data is read.

In the circuit shown in FIG. 9, by changing the contents of the address generation circuit 63, both the data conversion shown in FIG. 6 and the reverse data conversion can be performed.

RA of data conversion during recording in data conversion circuit 7
Table 1 shows the input/output data and address status of M59. Table 2 shows the input/output data and address states of the RAM 590 during data conversion in the data conversion circuit 13 during reproduction. The write address is the value of the counter 62, and the read address is obtained by adding an offset value to this value. Note that the addition of the write address and the offset value in the adder circuit 61 is an addition modulo 19.

, 12 Table 1 Table 2 , 15 As mentioned above, the number of quantization bits is 16 bits.

By simply adding a simple conversion circuit to a DAT that records and plays back PC and M signals with a sunfling frequency of 48 KHz, the number of quantization bits is 12 bits.

With a sampling frequency of 32 KITz, a 2-channel PCM signal can be recorded so as to have an optimal data structure against burst errors.

In this embodiment, a rotating head type DAT was described, but
A similar conversion can also be applied to a fixed head type DAT. Further, even if the input/output signal is a digital signal, there is no problem if the input/output signal is configured as in the 6th N-).

〔Effect of the invention〕

According to the present invention, by simply adding a simple conversion circuit to a DAT that records two channels of PCM signals, PCM signals with different quantization bit numbers and sampling frequencies can be configured in an optimal data structure against burst errors. It can be recorded as follows. That is, even if a continuous data error occurs in one track or a continuous data error in up to 1/2 track across several tracks occurs, the data of each channel will not become a continuous error in time series.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the PCM signal recording/reproducing apparatus of the present invention, FIG. 2 is a diagram of recording patterns on a magnetic tape, FIGS. 3 and 4 are block diagrams of conventional recorded data, and FIG. A configuration diagram of input/output data, FIG. 6 is a diagram showing conversion of input/output data according to the present invention, FIGS. 7 and 8 are configuration diagrams of recorded data according to the present invention, and FIG. 9 is a configuration diagram of a data conversion circuit. , FIG. 10 is a timing chart diagram of the circuit of FIG. 9. 4.1]...Sample/hold circuit 5...Switching circuit 6...A/D converter 7.
13...Data conversion circuit 12...D/A converter 60
...Switching circuit 47.62...Counter 6
3...Address generation circuit 59...RAM61...
・Addition circuit

Claims (1)

[Claims] 1. Number of quantization bits m_1, sampling frequency f_1
In a PCM signal recording and reproducing device that records and reproduces n-channel PCM signals, the number of quantization bits m_
2. N-channel PCM with sampling frequency f_2
The signal is divided into bit units of 2n times the least common multiple i of m_1 and m_2, and within the i×2n bit data, the data of the even and odd words of each channel are respectively the quantized bit number m_1, Data is swapped in units of the greatest common divisor j bits of m_1 and m_2 so that they match the even and odd word positions of each channel of the PCM signal with sampling frequency f_1, and during playback, the data at the time of recording is swapped. A PC characterized in that it is equipped with a data conversion circuit that performs reverse swapping of
M signal recording and reproducing device. 2. In the PCM signal recording and reproducing device according to claim 1, m_1 is 16 bits and f_1 is 48 KHz.
, m_2 are 12 bits, f_2 is 32 KHz, and n is 2.