JPS61216030A - Control system for microprogram - Google Patents

Abstract

PURPOSE:To omit the timing control circuit of a save register by saving an address from an address register to the same register only when a microinstruction from a control storage is set in an instruction register. CONSTITUTION:When the contents of an address (n) of the control storage 1 are read out through a gate (a), the contents of the address register 2 and increased by one by a stepping circuit 4 through the same gate (a) to obtain (n+1), which is set in the register 2 and save register 5. When the contents of the storage 1 set in the instruction register 3, i.e. microinstruction A is an instruction for accessing the storage 1, an address (m) specified by the operand of the instruction is set in the register 2 with a gate signal (b). The contents of the storage specified by this address (m) are read out to a buffer register 6 with a gate signal (c) and the contents (n+1) of the save register 5 are returned to the register 2 at the same time. In this case, the contents of the storage 1 are not set in the instruction register 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram processing device for an information processing device, and relates to an improvement in a microprogram control method for accessing control storage.

As the performance of information processing devices improves, their control functions become more complex, and improvements in software and hardware are being made using microprogram-based control means.

In order to cope with the increase in hardware, especially
It is necessary to aim at simplifying the hardware of the microprogram processing device itself.

[Conventional technology]

General resistance As a control method for accessing the contents of control storage, when a micro instruction is read from control storage to the instruction register, if it is identified that the micro instruction is an instruction that accesses control storage, it is stored in the save register. The natrace of the next microinstruction in the address register is saved, the address of the control storage indicated by the microinstruction is stored in the address register, the control storage is accessed via the buffer register, and the next microinstruction is saved from the save register. The address is returned to the address register, and the next microinstruction is executed from the returned address.

FIG. 3 is a diagram showing the timing of accessing control storage by microinstructions.

Each register when the contents of address m specified by instruction A (access instruction) stored at address n is read out to the control storage or the Lahaffa register in clock cycles 1 to 4, that is, the address register;
It shows the progress of the contents of the save register, instruction register, and buffer register.

In order to perform such processing, a circuit is provided to control each of the registers at respective timings.

[Problem that the invention seeks to solve]

Conventionally, for the process of accessing the control storage, timing control as shown in FIG. 3 has been performed, and the circuits that perform each of these controls have been complicated circuits.

In other words, it determines whether data read from control storage should be set in the instruction register or buffer register, whether the value of the address register should be saved in the save register, whether the contents of the save register should be returned to the address register, etc. Depending on the contents of the instruction register,
Each had its own control circuit.

Therefore, in order to improve the performance of microprogram processing devices, it is necessary to simplify these hardware.

[Means for solving problems]

The above problem is that the save register timing control circuit can be omitted by controlling the save register so that the address is saved from the address register to the save register only when a microinstruction is set in the instruction register from control storage. This problem is solved by the microprogram control method of the present invention.

[Effect]

According to the present invention, the timing at which an address is saved to the save register is the same as the timing at which a microinstruction is read from the control storage to the instruction register, and the microinstruction is operated by the same control circuit.

Therefore, a control circuit for controlling the save register becomes unnecessary and can be omitted, which simplifies the hardware accordingly.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a diagram explaining timing control of the present invention. In addition, a
, b, and c are gate signals instructing data cent of each register.

The contents of address n indicated by address register 2 are read from control storage 1 and set in instruction register 3 by gate signal a.

On the other hand, when reading the contents of address n of control storage 1, the contents of address register 2 are incremented by 1 in step circuit 4 by the same gate signal a, and the contents become n+1. 2 and is set in save register 5.

The contents of the control storage l set in the instruction register 3, that is, if the microinstruction A is an instruction to access the control storage 1, the address m specified by the operand of the instruction is set in the address register 2 by the gate signal. Ru.

The contents of control storage 1 specified by address m set in address register 2 are gate signal C
At the same time, the contents n+1 of the save register 5 are returned to the address register 2.

In this case, since the contents of the control storage 1 are not set to the instruction register 3, the gate signal a is not generated and the contents of the address register 2 are not saved to the save register 5.

In the next cycle, the contents of address n+1 indicated by address register 2 are read from control storage 1,
It is set in the instruction register by gate signal a.

Thereafter, similar operations are repeated to progress microinstruction processing.

In the above explanation, the microinstruction is an instruction to read the contents from the control storage 1, but even if the instruction is to write to the control storage 1, the output of the buffer register 6 may be connected to the write input of the control storage 1. The connections are indicated by dotted lines in the figure.

〔Effect of the invention〕

As explained above, according to the present invention, when a microinstruction is read out to the instruction register, the contents of the address register are saved to the save register by the gate signal a, and when the data is read out to the buffer register, the contents of the address register are saved by the gate signal C. By returning the contents of the save register to the address register, the control circuit for the save register can be omitted and can be used as the control circuit for the read register, thus simplifying the hardware that makes up the microprogram processing device. can do.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the microprogram control method of the present invention, FIG. 2 is a timing diagram of FIG. 1, and FIG. 3 is a timing diagram of a conventional microprogram control method. In the figure, 1 is a control storage, 2 is an address register, 3 is an instruction register, 4 is a sidewalk circuit, 5 is a save register, 6 is a buffer register, and 7 is an instruction control section. Figure 1 Figure 2 Figure 3

Claims (1)

[Claims] In a microprogram processing device having means for accessing the contents of a control storage by a microinstruction, only when the contents of the control storage are read into an instruction register, 1 is added to the contents of an address register of the control storage and saved. A microprogram control system featuring a save register.