JPS61210563A - Waveform shaping circuit - Google Patents

Abstract

PURPOSE:To attain data separation where error rates are possibly decreased by forming a reference slice level signal from a reproducing signal and controlling the level of the slice signal with a delay output of a slice output. CONSTITUTION:A slice level signal when a reproducing signal is sliced by a comparator 21 as a slice means is detected and produced from the reproducing signal. In this case, diodes Di-1, Di-2 and capacitors C1, C2 hold positive and negative levels +Vref, -Vref and the nearly center level is used as the slice level Vref'. This is conducted by analog switches SW-1, SW-2 as the slice level control means and the control of the SW-1, SW-2 is executed by the output of a D-FF 22 as a delay synchronization extracting means. Even when an eye pattern to each positive/negative peak is deviated from the center, the slide level Vref' is controlled to be the center of the eye pattern.

Description

[Detailed Description of the Invention] This invention is applicable to, for example, a VTR (video tape recorder!).
The present invention relates to an improvement in a waveform shaping circuit suitable for use in PCM (or e-code modulation) type magnetic recording and reproducing systems.

Recently, in order to achieve the highest possible fidelity playback, audio signals are converted to PCM (digital code) and recorded on a VTR over a television signal, and the recorded signal is played back to prevent dropouts, etc. A so-called PCM type magnetic recording/reproducing system has been developed which, after correcting the data, returns it to an analog signal and outputs it.

In such a system, when reading data from a recorded signal in the playback section, reading errors that occur mainly at high recording density due to the frequency characteristics of the transmission path, S/N, jitter, etc. are a problem. It has become.

This is because, unlike the analog recording and reproducing method, in general, in a digital recording/reproducing method, the quality of the entire system is determined by the code error rate during reading.

However, since such code error rate values depend on differences in modulation/demodulation methods and circuit configurations, as well as on the characteristics of the waveform equalizer used, evaluation thereof is not easy and is still being done through trial and error. However, one method is to observe the recorded waveform with a CRT (cathode ray tube) and calculate the margin around the detection point. There are known cases where people make judgments.

In other words, this is what is called an eye pattern, as shown in Figure 1 (a), (b), and ←→. The ratio (b/a) of the inner wave height value (b) to a) is called the eye opening ratio. In each figure, the part marked with (a) is the detection point, (a) shows the eye pattern when the bit transmission rate is low, (b) shows the eye pattern when the same rate is high, and C→ In particular, it shows an eye pattern when passing through a non-linear transmission path.

Correct reading (separation) can be achieved by detecting at the center of such an eye turn, but in order to do so, it is necessary to take into account the following conditions.

(1) Control of detection timing with respect to time axis (2) Appropriate control of detection level Among these conditions, (1) is controlled using a clock signal for synchronization, so recent control technology It is relatively easy to achieve high precision. Regarding (2), currently efforts are being made to improve the eye aperture ratio, for example, methods have been adopted in which the frequency characteristics are reversed to the transmission path, but the eye aperture ratio of the same value is Even when taking the ratio, the conditions are different between (b) and ←→ in FIG. 1, so it is necessary to perform control corresponding to these conditions.

Figure 2 shows a conventional data separation circuit that has been adopted to improve the eye aperture ratio in consideration of these points, and shows a waveform shaping circuit. For the comparator 11 that compares the reproduced signal such as (,) with a reference voltage in order to slice it, the reference voltage VB!
By manually adjusting tF using the variable resistor 12,
The reference voltage v0. which gives a slice level with a low error rate as a result. /.

In this case, the output of the comparator 11 as shown in FIG. 3(b) is dart-controlled by the D-type flip-flop 13 by the clock signal R-CK as shown in FIG. 3(C), and is output to the output terminal 0U.
At T1, separated data 9 as shown in FIG. 3(d) is provided for deriving a waveform shaped output.

However, in such conventional waveform shaping circuits, it is difficult to automatically control the slice level in response to differences in individual eye pattern conditions, so manual adjustment is required. However, the disadvantage was that the operation was too complicated.

Furthermore, instead of manually varying the slice level of the reference voltage knob of the comparator as shown in FIG. 2, it is also possible to rectify the reproduced input signal and generate a slice signal according to the reproduced input signal. However, in this case, as shown in FIG. 1(C), there is a problem in that if the eye pattern is deviated from the center of the input, it cannot simply be detected as the correct level.

Therefore, the present invention was made in view of the above points, and is a data separation device that can automatically control with a simple configuration and reduce the error rate as much as possible. It is an object of the present invention to provide an extremely good waveform shaping circuit that makes it possible to perform waveform shaping.

First, to briefly explain the principle of this invention, the level of an input signal is detected to generate a reference slice level signal, and the slice output from this slice signal is
By setting the clock delay amount and controlling the level of the slice signal with the output of this one clock delay amount, the result shown in Fig. 1 (
Even if a signal that takes the eye pattern shown in a), (b), ←→ or any other eye pattern is input,
Accurate data separation with low error rate, that is, waveform shaping, can be automatically performed.

Hereinafter, one embodiment of the present invention will be described in detail with reference to the drawings.

That is, in FIG. 4, IN□□ is an input terminal to which a digitally recorded reproduction signal is applied in, for example, a PCM type magnetic recording and reproduction system.

This input terminal IN1. is comparator 2 as a slicing means
The slice level control means is connected to the positive phase input terminal (G) of 1, and corresponds to the diodes Di-1 or DI-2 of opposite polarity as shown, which constitute the reference slice level detection means. first and second as
It is connected to each drain of a field effect transistor Qlt or Q, which becomes an analog switch 5W-1 or 5W-2.

Here, each source of the field effect transistor Qsl or Q is connected to a capacitor C1 or C which constitutes a reference slice level detection means together with the diodes Di-1 and Di-2.
3 and are respectively grounded via resistors R
1 or R2 correspondingly to the negative phase input terminal of the comparator 21.

A D-type flip-flop 22 as a delay synchronization extraction means whose input end is connected to the output end of the comparator 21
, whose clock input terminal CK is connected to the clock signal input terminal R
-CK, and its positive phase output terminal Q is connected to output terminal 0.
UT1. connected to. Further, the negative phase output terminal (■) and the positive phase output terminal Q of this D-type flip 70 tube 22 are connected to the field effect transistors Q1 and Q*, which become the first and second analog switches 5W-1 and SW-2. connected accordingly.

In the above configuration, the outline of its operation is as follows: the reproduction (
The input) signal is compared (
A reference (slice) level signal for comparison when performing slicing is detected and generated from the reproduced (input) signal, but in this case, diodes (DI-1), (DI-2) and capacitors C, . C, and the positive and negative levels (+vref)' (-vr.f
) is held, and its approximate center level is set as the reference (slice) level (vrsf'). This is actually done through analog switches 5W-1 and 5W-2 as slice level control means, and the analog switches 8W-1 and 5W-2 are controlled by D-type flip-flops as delay synchronization extraction means. 22 outputs.

The specific operation for the above is shown in the eye pattern shown in Fig. 5(,). Figure 5 shows the waveform (
This can be explained based on the timing charts of b), (,), and (d). That is, the above positive level (+V,
. ) for detecting the positive component of the input signal (see FIG. 5a), the positive phase output terminal Q of the D-type flip-flop 22 is "0".
Similarly, the negative level "r@f) is detected when the positive phase output terminal Q of the D-type flip-flop 22 is "1".
It's time.

This output "O# or '1" is the output of the comparator 21 delayed by 91 clocks by the D-type flip 70 tube 22, so when the detection point is used as a reference, the output one clock earlier is given. It turns out.

Therefore, a positive charge A on capacitor C1t or C,
Or negative charge B (see Figure 5a) is set so that the playback (input) signal is stopped at the peak value of the correct eye pattern.
Therefore, even if the mark turn is offset from the center with respect to the positive peak and negative peak of the reproduced (input) signal, the comparison reference (slice) level (vref') of the comparator 21
) is controlled so as to be at the center of the eye pattern.

As a result, even if a signal that takes the desired turn shown in Figure 1 (a), (b), or p→ is input, the signal will always be automatically activated regardless of the differences in their individual conditions. It becomes possible to obtain a waveform-shaped output that can be separated data with a low error rate.

In the embodiment shown in FIG. 4, a reference (slice) level signal for comparison is generated as a peak detection type, but it is also possible to add some time constant to this as necessary. It goes without saying that various other modifications may be made without departing from the gist of the present invention.

Although the present invention is suitable for waveform shaping of digital signals that have passed through a transmission line with poor characteristics in a PCM magnetic recording/reproducing system, it is not limited to this system but can be widely applied to digital signal transmission systems in general. Of course.

Therefore, as described in detail above, according to the present invention, the level of an input signal is detected to generate a reference slice level signal, and the slice output by this slice signal is delayed by one clock. By controlling the level of the slice signal using the periodic output, data separation can be automatically controlled with a simple configuration, and the error rate can be reduced as much as possible to perform waveform shaping. It becomes possible to provide an extremely good waveform shaping circuit with

[Brief explanation of the drawing]

Figures 1 (a), (b), and (c) are diagrams illustrating Fickturns under different conditions for evaluating code error rates;
Figures (a), (b), (c), and (d) are block diagrams showing a conventional waveform shaping circuit and timing charts showing its operation; (c) and (d) are a configuration diagram showing an embodiment of the waveform shaping circuit according to the present invention and a timing chart showing its operation. IN□□...Input terminal, 21...Comparator, Di-1
, Di-2...diode, 5W-1, 5W-2...
・Analog switch, Ql + Ql...Field effect transistor, C1°C8...Capacitor, R,,R
,...Resistance, 22...D type flip-flop, 0U
T1□...Output terminal. Applicant's agent Patent attorney Takehiko Suzue (Shun)
(b) (8) Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] slicing means for slicing an input signal; reference slice level detection means for detecting the level of the input signal and generating a reference slice level signal to be supplied to the slicing means; and converting the output from the slicing means into a predetermined clock signal. A waveform shaping circuit comprising: delayed synchronization extraction means for extracting data in synchronization with a delay of one clock; and slice level control means for controlling the level of the reference slice level signal according to the output of the delayed synchronization extraction means.