JPS61196676A - Picture reader - Google Patents

Abstract

PURPOSE:To prevent the generation of a vertical stripe pattern, due to an output level difference between an even picture element and an odd picture element, by installing an output level adjustment section to add the correction of the output after A/D conversion applied to the output picture signal of a solid-state image sensor. CONSTITUTION:A selector circuit 10 in an output level adjustment section 9 passes the picture signals from an A/D converter respectively to the addition average circuits 11 and 12 depending on the fact that an odd picture element read signal 21 is of logical 'H' or 'L', when a black reference read signal 20 is of logical 'H', and passes the said picture signals to an adder 19 irrespective of the logic of a signal 21 when the signal 20 is of logical 'L'. For this reason, when the signal 20 scans a black reference at 'H', the addition average circuits 11 and 12 calculate the addition average of the picture signals of the odd and even picture elements. Then, the difference of the latch data 24 and 25 is calculated by a differentiator 15. Then, when the signal 20 changes to 'L', the calculation result of the differentiator 15 is latched to a latch circuit 16. In a selector 17, an input terminal 18 of the same number of bits as differencial data 27 is grounded, and the differential data 27 and the data 'theta' are alternately outputted as a correcting signal 29.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image reading device such as a facsimile or scanner device that scans a document, and particularly to an image reading device using a solid-state image sensor such as a COD.

Conventional technology When scanning and reading a document using a solid-state image sensor such as a COD, an image reading device consists of uniformly illuminating the document, forming an image of the reflected light on the solid-state image sensor, and photoelectrically converting the image. (For example, Japanese Patent Application Laid-Open No. 56-120
265, etc.).

A conventional image reading device will be described below with reference to FIG.

A light source 1 uniformly illuminates a document 2, and the reflected light is applied to a solid-state image sensor 4 such as a CCD through a condensing lens 3, photoelectrically converted and sent out as an image signal, and an amplifier 6 converts it into an appropriate amplitude. amplified. The A/D converter 6 converts the analog image signal amplified by the amplifier 6 into a digital image signal in synchronization with a clock pulse given from the pulse generation circuit 7. Thereafter, the image signal is subjected to processing such as binarization 9 and edge enhancement in a digital signal processor 8, and is output to an external device or a memory. However, in an image reading device with multi-gradation output, binarization processing is not performed. This is done by moving the sensor.

Problems to be Solved by the Invention When a COD having a COD shift register for odd-numbered pixels and a COD shift register for even-numbered pixels is used as a solid-state image sensor, the difference in the characteristics of the two COD shift registers makes it difficult to There may be a difference in the output level between a pixel and an even-numbered pixel.

The difference is only a few percent compared to the average output level, so it is not a problem when processing image signals with binary values or a low number of gradations. When the signal is processed, a vertical striped pattern appears in the read image, which significantly reduces the image quality. This vertical striped pattern becomes particularly noticeable in minute-level image signals (black originals).

The present invention solves the above-mentioned longevity problem of the prior art, and aims to provide an image reading device in which a vertical striped pattern is noticeable due to the output level difference between even and odd pixels.

Means for Solving the Problems The present invention solves the above problems by providing an output level adjustment section that corrects the output level after A/D conversion for the output image signal of the solid-state image sensor.
The present invention achieves the above object by providing the above output level adjustment section.
/D After the conversion, the output levels of the odd-numbered pixels and even-numbered pixels of the solid-state image sensor are compared, and a correction signal is calculated based on the comparison result with the output image signal from the solid-state image sensor.

5 < Embodiment FIG. 1 is a block diagram showing an embodiment of an image reading apparatus of the present invention.

In FIG. 1, 1 is a light source, 2 is a document, 3 is a condenser lens, 4 is a solid-state image sensor such as COD, 4 is an amplifier, and 6
is an A/D converter, 8 is a digital signal processor,
These, together with the sub-scanning method, are the same as in the prior art. Reference numeral 9 denotes an output level adjustment unit that compares the output levels of odd-numbered pixels and even-numbered pixels of the solid-state image sensor 4, and calculates a correction signal according to the comparison result with the output image signal from the solid-state image sensor. 7 is an A/D converter 6 and an output level adjustment section 9
This is a pulse generation circuit that supplies timing pulses to the

Although not shown, a black reference with a constant density is installed on the document table on which the original 2 is set, and the black reference is scanned before the original 2 is scanned.

Since the detailed configurations are different, detailed examples will be explained below.

6 < FIG. 2 is a block diagram showing the detailed configuration of the output level adjustment section 9 in the first embodiment. In Figure 2,
1o is a selector circuit that selects the output light of the digital image signal from the A/D converter 6; 11 is an averaging circuit that calculates the average of image signals over a lifetime of scanning of odd-numbered pixels of the solid-state image sensor 4; and 12 is a solid-state circuit. Image sensor 4
13 is a latch circuit that latches the average value of the image signal over the lifetime scanning of even-numbered pixels; 14 is a latch circuit that latches the average value of the image signal over the lifetime scanning of the even-numbered pixels. 16 is a difference circuit that calculates the difference between the signals latched in the latch circuits 13 and 14, 16 is a latch circuit that latches the calculation result of the difference circuit 15, 17 is a selector, and 19 is an adder.

The operation of the above configuration will be explained below with reference to the timing chart shown in FIG. First, the selector circuit 10 detects that the black reference read signal 20 is a logic "H" (Hi
gh)” and the odd-numbered pixel readout signal 21 is logic “H”
° When the image signal from the A/D converter 6 is passed through the averaging circuit 11, the black reference read signal 20 becomes logic "H".
And the odd-numbered pixel readout signal 21 is logic "L" (Low
) ”, the image signal from the A/D converter 6 is passed to the averaging circuit 12, and the black reference read signal 2o is set to logic.
When the logic is "L", the image signal from the A/D converter 6 is passed to the adder 19 regardless of the logic of the odd-numbered pixel read signal 21.Now, the black reference read signal 20 is logic "H" and the black reference is scanned. Assuming that the averaging circuits 11 and 12 clear the calculation results with the clear pulse 22 after each main scan, they clear the image signals of odd-numbered pixels and the image signals of even-numbered pixels over one main scan of the solid-state image sensor 4. Calculate the additive average for each. As a result of the calculation, the average of the image signals of odd-numbered pixels is latched by the latch circuit 13, and the average of the image signals of even-numbered pixels is latched by the latch circuit 14, respectively. A latched in the latch circuit 13
Latch data 24 and B latched in latch circuit 14
The difference between the latch data 26 is calculated by the subtractor 15.

In the above operation, the black reference read signal 2o is logic "H"
It is carried out repeatedly for a certain period of time.

Next, when the black reference reading signal 2o changes to logic "L" and the original 2 is scanned, the calculation result of the subtractor 15 is latched into the latch circuit 16 by the differential latch pulse 26 synchronized with the change. Since the black reference reading signal changes once per scan, the output data of the latch circuit 16, that is, the difference data 27, remains unchanged while the original 2 is being scanned.

In the selector 17, an input terminal 18 having the same number of bits as the differential data 27 is grounded. That is, the difference data 27
and data 1θ゛ input is missing, both inputs are corrected signal 2
9, it is output alternately in synchronization with the data switching signal 28. Tsumashi, the difference device 15 to the A latch data 24
If the configuration is such that the B latte data 26 is subtracted from When the logic becomes "L" and the image signals of even-numbered pixels are read out, the difference data 27 is output. Conversely, the difference unit 15 is changed from the B latch data 26 to 9<-
When the configuration is such that the 2A latch data 24 is subtracted, the data switching signal 28 becomes logic t+H++ and the difference data 27 is output when reading out the image signal of an odd numbered pixel, and the data switching signal 28 becomes logic t+H++. When the image signal of an even-numbered pixel is read out, the data ``θ°'' is output. Since the black reference read signal 20 is now at the logic ``L'' level, the output from the A/D converter 6 is The image signal is input to an adder 19 and is added to a correction signal 29.

As a result, image signals with the same output level can be obtained for odd-numbered pixels and even-numbered pixels.

As described above, according to this embodiment, since the output levels of odd-numbered pixels and even-numbered pixels are compared using the average of the image signals taken out from the solid-state image sensor over the main scanning, it is not affected by bit-to-bit variations in the output of the solid-state image sensor. Since accurate comparison can be made, it is possible to realize an image reading device in which no vertical striped pattern appears over the entire area of the read image.

Next, a second embodiment of the present invention will be described.

1o・＼-.

FIG. 4 is a block diagram of an output level adjustment section showing a second embodiment of the present invention.

In FIG. 4, 17 is a selector, 19 is an adder, and 32
is a DC voltage power supply, 33 and 34 are resistors, and 35 is a D/A converter 536 that converts digital signals into analog signals.
is an image monitor. 3o is a dip switch for setting a correction signal to be added to the image signal read from the odd-numbered pixels of the solid-state image sensor 4, and 31 is a dip switch for setting a correction signal to be added to the image signal read from the even-numbered pixels of the solid-state image sensor 4. Yes, both dip switches are connected to each bit, one terminal is grounded, the other terminal is connected to select 19, and at the same time resistor 33.34
It is connected to a DC voltage power supply 32 through. Therefore, the correction signal can be set as a digital value by combining shorting and opening for each bit.

I will clarify. First, the selector 17 reads the image signals of the odd pixels as 11 when the odd pixel readout signal 21 becomes logic "H".
・−.

When reading, the correction signal set to the dip switch 3o is output, and the odd-numbered pixel readout signal 21 is set to logic "L".
” When reading out image signals of even-numbered pixels, the correction signal set in the dip switch 31 is output.

Adder 19 adds the output signal of selector 17 and the image signal from A/D converter 6. If the output image signal of the adder 19 is converted into an analog image signal by the D/A converter 35 and reproduced on the image monitor 36, the read image can be checked with the human eye. Therefore, by adjusting the setting values of the dip switches 30 and 31 while checking the image on the image monitor 36 for vertical striped patterns, image signals with the same output level can be obtained for odd-numbered pixels and even-numbered pixels.

As described above, according to this embodiment, the correction signal to be added to the image signal is set by the DIP switch, and the reproduced image on the image monitor is referred to during the setting.

In this embodiment, an image monitor is also included as a component, but this is not necessarily required for each image reading device according to the present invention, and it is sufficient if several monitors are provided at the production site. Further, it is not always necessary to provide a black reference on the document table, and while scanning a black document with uniform density, the DIP switch 30.
may be set.

Further, as another embodiment of the present invention, there is a method of comparing the output levels of odd-numbered pixels and even-numbered pixels of a solid-state image sensor using image signals of a set of adjacent pixels.

There is also a method of correcting using correction data stored in a memory.

Effects of the Invention As described above, according to the present invention, for example, a COD having a COD shift register for odd-numbered pixels and a shift register for even-numbered pixels is used as a solid-state image sensor.
Even when an image reading device is configured to process image signals with multiple gradations such as 28 gradations, the difference in output level between odd-numbered pixels and even-numbered pixels is 13,<,-.

Accordingly, it is possible to realize an image reading device in which the vertical striped pattern does not appear.

[Brief explanation of drawings]

Fig. 1 is a block wiring diagram of an image reading device according to an embodiment of the present invention, Fig. 2 is a detailed block wiring diagram of the output level adjustment section, Fig. 3 is a timing chart of the main parts, and Fig. 4 is the output level A block wiring diagram of the second embodiment of the adjustment section, and FIG. 5 is a block wiring diagram of a conventional image reading device. 4...Solid image sensor, 6...A
/D converter, 7...Pulse generation circuit, 9...
...Output level adjustment section, 11.12...Additional averaging circuit, 15...Differentiator, 17...
・Selector, 19...Adder, 30゜31...
····DIP switch.

Claims (3)

[Claims] (1) an A/D converter that converts the output image signal of the solid-state image sensor into a digital signal; and an output level adjustment unit that corrects the output level of the output image signal of the solid-state image sensor after A/D conversion; , an image reading device comprising a pulse generation circuit that supplies timing pulses to the A/D converter and the output level adjustment section. (2) The output level adjustment unit includes an output level comparison unit that calculates the difference between the output levels of odd-numbered pixels and even-numbered pixels of the solid-state image sensor, and determines a correction amount from the comparison result of the output level comparison unit, and applies a correction signal to the image. The image reading device according to claim 1, further comprising output level correction means for calculating the signal. (3) The image reading device according to claim 1, wherein the output level adjustment section includes means for calculating an average of image signals of a plurality of pixels.