JPS6118788B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a rounding operation control method in a small electronic calculator. Conventionally, when rounding display data is processed,
For example, along with the RND key (rounding operation specification key),
A small electronic calculator that uses a numeric keypad to specify the number of significant digits for rounding operations has been put into practical use. However, if you mistakenly specify the digit when performing rounding operations on this type of small electronic calculator,
For example, for the calculation result data "12.3456"

[Formula] □5 (5 significant figures) and where to operate

If you operate [Formula] □4 (4 significant figures), the result will be The result is "12.35" and continues

[Formula] Even if you operate with □5, the rounding operation will be performed based on the previous result data "12.35", so the result will be "12.350"
Therefore, it was not possible to obtain the correct data (in this case "12.346"). Therefore, in order to obtain a correct result, it is necessary to perform the same arithmetic process again, specify the significant digits correctly, and perform rounding arithmetic processing, which has the disadvantage of being complicated and completely inefficient. This invention was made in view of the above points,
The purpose is to protect display data by transferring it to a data protection storage means, even if rounding operations are performed inadvertently.
It is an object of the present invention to provide a rounding operation control system that allows correcting erroneous data to be easily and efficiently corrected by subsequently specifying correct significant digits and executing rounding operations. Hereinafter, the present invention will be explained in detail based on one embodiment shown in the drawings. In FIG. 1, reference numeral 1 is a key input unit of a small electronic calculator, and this key input unit 1 has a numeric keypad 2, various function keys 3 such as four arithmetic operation keys, an equal key, and the above-mentioned RNDD key 4, respectively. It is arranged. From this key input unit 1, numerical data (including data specifying significant digits for rounding operations) is sent via the input processing circuit 5.
An RND key 4 operation signal and a key data signal specifying the type of operated key are output, respectively. The numerical data is written into a RAM (random access memory) 6, transferred to a display section 7 for display, and also sent to an arithmetic circuit 8 for predetermined arithmetic processing. The RAM 6 includes an X register 6-1 which also serves as a display register, an A register 6-2 which inputs the contents of this X register 6-1 via an arithmetic circuit 8, and protects the memory, as well as a plurality of arithmetic registers. . In addition, the effective digit designation data for the above rounding operation and the RND key 4 operation signal are RND
The RND key 4 operation signal is applied to the (rounding) discrimination circuit 9, and furthermore, the RND key 4 operation signal is also applied to one input terminal of AND circuits 10 and 11. And this AND circuit 1
Timing signals a and c supplied from the control unit 12 are applied to the other input terminals of the flip-flops 0 and 11, respectively, to perform open control, and the outputs thereof are applied to the R-S type flip-flop circuits 14 (FF1) and 15 (FF2). It is supplied to the set side input terminal S. Incidentally, timing signals b and d are supplied from the control section 12 to the reset side input terminals R of the flip-flop circuits 14 and 15. And this flip-flop circuit 14,1
The set side output Q of No. 5 is given to the control section 12 together with the valid digit designation output from the RND discrimination circuit 9 and the operation key data signal from the input processing circuit 5, and causes the control section 12 to output various control signals.
That is, in addition to the above-mentioned timing signals a to d, the control section 12 outputs an address designation signal AD for designating the address of the RAM 6, a code designation signal CODE for controlling the output of a predetermined code signal from the code signal generation section 13, and A control signal and the like for controlling the arithmetic circuit 8 to perform predetermined arithmetic processing are output. Next, the operation of this embodiment will be explained. FIG. 2 shows a flowchart when various key operations are performed on the key input section 1, and the case where the key operations are performed as shown in FIG. 3 will be described below. That is, now operate the □= key (equal key) _as shown in FIG.
_B2 causes the arithmetic circuit 8 to execute a predetermined arithmetic processing and input the result data of "12.3456" into the X register 6-1, and causes the control section 12 to output a timing signal d, thereby setting the flip-flop circuit 15 to a reset state. do. Note that the registers such as the X register 6-1 and the A register 6-2 in the RAM 6 are used for the data storage section of the 1st to 8th digits and the decimal point specification section of the 0th digit (P), as shown in Figure 3. It has a total storage capacity of 9 digits. Then, this result data "12.3456" is rounded to four significant digits as shown in FIG. 3, 2 and 3. First, operate RND key 4 and step
Run C ₁ . That is, in step _C1 , the input processing circuit 5 outputs the RND key operation signal, and at the same time, the control section 12 outputs the timing signal a, thereby opening the AND circuit 10 and setting the flip-flop circuit 14. After completing step _C1 , step _C2 is executed. As mentioned above, since the flip-flop circuit 15 is already in the reset state, its output Q is "0", and a negative determination is made at step _C2 , so that step _C3 is selected as the next step. This step
_C3 is a step in which the contents of the X register 6-1 (in this case "12.3456") are transferred to the A register 6-2 for protection storage, and the transfer is performed via the arithmetic circuit 8. Then, in the next step _C4, AND circuit 11 is activated in preparation for the subsequent operation of RND key 4.
Supply timing signal C to open the RND
The key 4 operation signal is input to the set side input terminal S of the flip-flop circuit 15 to bring it into the set state. After completing this step _C4 , the program proceeds to process F and displays the result data "12.3456" on the display section 7. Next, when the key □4 is operated as shown in FIG. 8, the process advances to step _A1 . In step _A1 , it is checked whether the flip-flop circuit 14 is in the set state. If the flip-flop circuit 14 is in the reset state, step A ₂ and processing A ₃ are sequentially executed to bring the flip-flop circuit 15 into the reset state, and then normal number processing is performed. However, in this case, the flip-flop circuit 14 is in the set state as described above, so in step _A1 ,
A YES judgment is made and the process proceeds to step _D1 . In step _D1 , the flip-flop circuit 14 is reset in the same manner as described above. Next, processing _D2 is executed to perform rounding calculation processing. That is, the contents of the X register 6-1 are sent to the arithmetic circuit 8, and under the control of the RND discriminator circuit 9, the code signal "5" output from the code signal generator 13 is placed in the rounding designated digit (second digit in this case). is added, and if a carry is output, a "+1" operation is performed on the higher digits, and if a carry is not output, only the data within the specified significant digits will be displayed as is. Carry down processing is executed as shown below. After completion of this process _D2 , the process proceeds to process F, where the obtained result (in this case "12.3456") is displayed on the display section 7. If, for example, the operator realizes that he has erroneously rounded off to 4 digits instead of 5 effective digits, he will continue to perform key operations as shown in FIG. 3, 4 and 5, to correct the error. That is, operate the RND key 4 again and operate the flip-flop circuit 1 in the same manner as above.
4 is set state. And this step
After completing _C1 , execute step _C2 . This time, since the flip-flop circuit 15 is in the set state at step _C2 , the determination result is YES, and step E is executed next. In this step E, the contents of A register 6-2 ("12.3456") are
The data is transferred to the register 6-1 and displayed on the display unit 7 in process F. Next, operate the key □5 to input the significant digit designation data for the rounding operation to the RND discrimination circuit 9 in the same manner as above.
According to this data, rounding calculation processing is performed in step _D2 after completing steps _A1 and _D1 . That is, X
A rounding operation is performed based on the content "12.3456" of the register 6-1, and as a result "12.3456" is obtained as shown in FIG. 3 and displayed on the display section 7. In the above embodiment, the rounding calculation process is performed by rounding off to the nearest whole number, but other methods such as rounding down, rounding up, etc. may be used. Furthermore, data such as rounding calculations may be displayed in an exponential format. Furthermore, in the above embodiment, the RND discriminating circuit 9, flip-flop circuits 14, 15, etc. are provided in addition to the arithmetic circuit 8 and RAM 6, but the same operation is possible.
It is also possible to perform flag determination processing using a predetermined register in the RAM 6 and the arithmetic circuit 8. In addition, various modifications and applications are possible without departing from the gist of the invention. As described in detail above, this invention transfers the original data to be rounded to another register and protects it when performing rounding operations on display data, so that even when rounding operations are performed continuously, the above data is always By executing the rounding operation based on the original operation result data that is protected and stored in the register, even if you mistakenly specify the effective digits during the rounding operation, you can re-enter the correct effective digit specification data to achieve the desired result. This method has excellent effects such as rounding calculation processing, and therefore, simple operation and efficient correction. Further, since the present invention performs rounding operations on the operation registers, the rounded result data can be used as operation data as is, and the calculation processing can be executed efficiently.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing one embodiment of the present invention, FIG. 2 is a flow chart for explaining its operation, and FIG. FIG. 1...Key input section, 4...RND key (rounding operation specification key), 6...RAM, 6-1...X register, 6-
2...A register, 9...RND (rounding) discrimination circuit,
10, 11...AND circuit, 12...control unit, 13...
Code signal generator, 14, 15...flip-flop circuit.

Claims (1)

[Scope of Claims] 1. A small electronic calculator that is equipped with a numeric keypad and a function key and that executes at least four arithmetic operations, comprising: a predetermined key for instructing a rounding operation; and a predetermined key that instructs rounding operations; a first storage means to be displayed; a calculation means for using the data stored in the first storage means for calculations; a second storage means in which the data stored in the first storage means is stored; and the predetermined key. a third storage means for storing whether the operation is the first time or the second or subsequent time; and the data stored in the third storage means is determined according to the operation of the predetermined key, and the contents thereof are determined. protection means for transferring the stored data of the first storage means to the second storage means for protected storage when indicating a first operation; a transfer means for determining the stored data in the second storage means and transferring the stored data in the second storage means to the first storage means when the content thereof indicates a second or subsequent operation; and rounding operation means for performing a predetermined rounding operation on the data stored in the first storage means, the result of the rounding operation can be used for calculations, and the same data can be used for different digit designations. A rounding operation control method characterized in that when rounding operations are continuously instructed, rounding operations are always performed on the original data.