JPS6117650Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a video signal resynthesis circuit that obtains a resynthesized video signal containing a regular synchronization signal from an original video signal containing a pseudo synchronization signal of a sinusoidal waveform, and particularly relates to a VTR, VSR, It is ideal for use in video signal recording and reproducing devices such as EVR.

Record the video signal on a recording medium and play it back
In recording and reproducing devices such as VTRs, noise may be superimposed on the recording and reproducing transmission system, resulting in the reproduction of erroneous synchronization signals. Furthermore, there is a risk that the level of the reproduced signal may drop (drop out) due to clogged magnetic heads or the like, and a normal synchronizing signal may not be reproduced. Also, since the synchronization signal is a square wave,
The rising and falling portions of the synchronization signal have high frequency components, and therefore, the rising and falling portions of the synchronizing signal are susceptible to distortion in recording and reproducing transmission systems. In this case, since the rising or falling portion of the synchronization signal serves as the reference for horizontal and vertical synchronization of the receiver, there is a risk that the reproduced image based on the video signal whose synchronization signal has been distorted may become unstable.

The present invention has been developed in view of the above-mentioned problems, and is based on a pseudo synchronization signal to form an accurate synchronization signal that is unaffected by noise in the transmission system, fluctuations in the output signal level of the transmission system, etc., and is stable. In addition, by narrowing the pulse width of the pseudo synchronization signal, it is possible to insert information other than video into the synchronization signal section.

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of the recording and reproducing system of a VTR to which the present invention is applied. Also, Figure 2 is a waveform diagram showing the waveforms of each part of the recording system in Figure 1, and Figure 3 is a waveform diagram showing the waveforms of each part of the recording system in Figure 1.
3 is a wave diagram showing waveforms of various parts of the reproduction system shown in the figure. FIG.

In Figure 1, a video signal a is input from input terminal 1.
(FIG. 2a) is supplied to the synchronization separation circuit 2, where the synchronization signal s is separated. This synchronizing signal s is supplied to a gate pulse forming circuit 3, where a gate pulse b shown in FIG. 2b is formed. Note that this gate pulse b is formed with a delay of approximately one horizontal period from the synchronizing signal s, and as shown in FIG. is also getting bigger.

This gate pulse b is supplied to the gate circuit 5. A video signal a is separately supplied to this gate circuit 5, and a synchronization signal is extracted from the video signal a by the gate pulse b. The video signal a' from which the synchronizing signal has been extracted is then supplied to an adder 6.

On the other hand, the synchronization signal s separated in the synchronization separation circuit 2 is supplied to an insertion pulse forming circuit 4, where an insertion pulse c as a pseudo synchronization signal is formed. This insertion pulse c is a sine wave with one period of a predetermined frequency as shown in FIG. , and is formed in the front porch portion of the synchronizing signal s.
This insertion pulse c is supplied to the above-mentioned adder 6,
As described above, the synchronizing signal is added to the already extracted video signal a' in this adder 6. As a result, as shown in FIG. 2d, a video signal d can be obtained in which the insertion pulse c is inserted as a pseudo synchronization signal into the front porch of the original synchronization signal.

In this case, in FIG. 2d, the insertion pulse c
The flat part between the color burst signal r and the color burst signal r contains a digital code signal for tape classification, a line address signal representing the address of the scanning line, and an audio PCM signal.
Signals etc. can be inserted as necessary.

This video signal d is frequency modulated in the FM modulator 7, and then passes through the recording amplifier 11 and the recording side contact 8a of the changeover switch 8 to the rotating magnetic head 10.
a and 10b are recorded on the magnetic tape 9.

Next, during reproduction, the frequency modulated signal recorded on the magnetic tape 9 is reproduced by the magnetic heads 10a and 10b in FIG. This reproduction signal is supplied to the FM demodulator 12 via the reproduction side contact 8a of the changeover switch 8 and the reproduction amplifier 23, where a video signal d substantially the same as that shown in FIG. 2d is demodulated. This video signal d is supplied to a bandpass filter 13, where only the frequency component of the insertion pulse c inserted into the video signal as a pseudo synchronization signal is separated, and signal components and noise components in other frequency bands are removed. be done. Note that this bandpass filter 13 has an insertion pulse c
It may be composed of a band amplification circuit and an automatic gain control circuit whose tuning frequency is the frequency of . With this configuration, even if the level of the reproduction signal decreases due to clogging, wear, etc. of the magnetic heads 10a, 10b, it is possible to always obtain the reproduction insertion pulse _c1 of the same amplitude.

Note that FIG. 3 c ₁ is an enlarged view of the reproduction insertion pulse c ₁ , and since the reproduction insertion pulse c ₁ is a sine wave of a predetermined frequency, the FM modulator 7 → recording amplifier 11
→Magnetic head 10a, 10b→Magnetic tape 9→Magnetic head 10a, 10b→Reproduction amplifier 23→FM
Almost no distortion occurs in the regenerated insertion pulse c ₁ obtained through the transmission system of the demodulator 12 path.

The reproduction insertion pulse c ₁ is supplied to the determination circuit 24,
Here, the waveform of the reproduction insertion pulse _c1 is recognized. That is, the regenerated insertion pulse _c1 is at the point Pa in Fig. 3 _c1 ,
It is determined whether or not the signal has a waveform passing through Pb and Pc (the same waveform as the insertion pulse c of the recording system) to distinguish it from other signals or noise that have passed through the bandpass filter 13. ing. This determination circuit 24 includes delay lines 14, 15, window comparators 16a, 16b, 16c, and an AND circuit 17.
It consists of The window comparator 16c is directly supplied with the reproduction insertion pulse _c1 , and the window comparator 16b is supplied with the reproduction signal delayed by the time _t1 from point _Pb to point Pc in FIG. Insertion pulse c ₂ (Fig. 3
c ₂ ) is supplied. Furthermore, the window comparator 16a is connected to the point Pa of _c1 in FIG. 3 by the delay line 15.
A regenerative insertion pulse c ₃ (c 3 in FIG. ₃ ) delayed by the time t ₂ from Pc to Pc is supplied.

These window comparators 16a to 16c
is a comparison circuit whose output becomes high level only for inputs between two preset levels. That is, the window comparator 16c is as shown in FIG.
The output becomes high level only for the input between the levels Hc and Lc of c ₁ , and similarly for the window comparators 16b and 16a, as shown in FIG.
Between levels Hb and Lb of c ₂ and c ₃ and between levels Ha and La
The output will be high level only for the input between. Therefore, each window comparator 16c,
From the outputs of 16b and 16a, output pulses shown at e ₁ , e ₂ and e ₃ in FIG. 3 are obtained. These output pulses
e ₁ , e ₂ , and e ₃ are supplied to an AND circuit 17 .

From the output of the AND circuit 17, a pulse f shown in FIG. 3f is obtained. Therefore, when this pulse f is obtained, the reproduction pulse c ₁ is transmitted to each point Pa, Pb,
A specific waveform passing through Pc (inserted pulse c inserted into the video signal as a pseudo synchronization signal during recording)
A determination is made that . This judgment is
This is a determination that the frequencies, levels, and waveforms of the signals are the same. This pulse f is the synchronizing signal forming circuit 1
8, and the synchronization signal g (FIG. 3g) at a predetermined timing is reconfigured. This synchronization signal g is supplied to an adder 21. Also, based on this synchronizing signal g, a gate pulse h (h in FIG. 3) is formed in the gate pulse forming circuit 19 with a delay of approximately one horizontal period from the synchronizing signal g. This gate pulse h is supplied to the gate circuit 20. Therefore,
The insertion pulse c into which the video signal d demodulated in the FM demodulator 12 is inserted is the gate circuit 2.
It is extracted at 0. The output signal of this gate circuit 20 is supplied to an adder 21, where a synchronizing signal g is added to the video signal d to form a reproduced video signal i that is substantially the same as the original video signal a shown in FIG. 2a. The signal is then supplied to a reproduction means such as a television receiver via an output terminal 22.

Note that the synchronizing signal g may be added to the inserted pulse c without extracting it from the video signal, and the synchronizing signal g may be supplied to the receiver as the video signal. Furthermore, in the recording system, the insertion pulse c may be inserted into the synchronization signal portion of the video signal from which the synchronization signal has been extracted. In this case, in the reproduction system, if the adder 21 for adding the reconstructed synchronization signal to the video signal d is saturated near the low level of the synchronization signal g, the gate pulse forming circuit 19
And, the insertion pulse c can be deleted in this adder 21 without using the gate circuit 20.

Further, in the above embodiment, the three points Pa, Pb, and Pc of the insertion pulse c are compared, but a larger number of points may be compared. It is also possible to compare two points of the insertion pulse c, and in this case, it is sufficient to compare two pulses: the insertion pulse c and a pulse delayed by a predetermined amount.

Since the present invention is configured as described above, it is possible to supply an original video signal including a pseudo sync signal which reduces the risk of distortion during transmission to a transmission system such as a recording/reproducing device.

Further, after transmission, at least two first and second comparison signals including temporally shifted pseudo synchronization signals are formed, and predetermined first and second comparison signals of the first and second comparison signals are formed. A pulse is formed at a position corresponding to the second level, coincidence of this pulse is detected, and a synchronization signal formed based on this detection signal is inserted into the original video signal to form a re-synthesized video signal. did. Therefore, even with a relatively simple circuit configuration, it is possible to easily determine the frequency, level, waveform, etc. of the pseudo synchronization signal contained in the output signal of the transmission system, and it is possible to form a regular synchronization signal based on the results. can. Therefore, it is possible to form an accurate video signal that is not affected by noise superimposition in the transmission system, fluctuations in the output signal level, etc. Furthermore, since the pulse width of the pseudo synchronization signal can be made narrower than that of the regular synchronization signal, it is possible to insert information other than video into the synchronization signal section of the video signal.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the recording and reproducing system of a VTR to which the present invention is applied, Fig. 2 is a waveform diagram showing waveforms of each part of the recording system of Fig. 1, and Fig. 3 is a waveform diagram of each part of the reproducing system of Fig. 1. FIG. In addition, in the symbols used in the drawings, 13
is a bandpass filter, 14 and 15 are delay lines,
16a, 16b, and 16c are window comparators, 17 is an AND circuit, and 18 is a synchronization signal forming circuit.

Claims (1)

[Claims for Utility Model Registration] In a video signal resynthesizing circuit configured to obtain a resynthesized video signal containing a regular synchronization signal from an original video signal containing a pseudo synchronization signal having a sinusoidal waveform, (a) a delay circuit for generating at least one delayed comparison signal by delaying the original video signal for a predetermined time in order to obtain at least two first and second comparison signals each containing a shifted pseudo synchronization signal; b) a first level comparison circuit that generates a pulse at a position corresponding to a predetermined first level of the first comparison signal; (c) a first level comparison circuit that generates a pulse at a position corresponding to a predetermined second level of the second comparison signal; a second level comparator circuit that generates a pulse at the position; (d) a detection circuit that detects coincidence of the output signals of the first and second level comparator circuits; (e) a horizontal A video signal resynthesis circuit comprising: a synchronization signal forming circuit for forming a synchronization signal, and configured to insert the horizontal synchronization signal into an original video signal to form a resynthesized video signal.