JPS61163778A - Two-picture television receiver - Google Patents

Two-picture television receiver

Info

Publication number
JPS61163778A
JPS61163778A JP427685A JP427685A JPS61163778A JP S61163778 A JPS61163778 A JP S61163778A JP 427685 A JP427685 A JP 427685A JP 427685 A JP427685 A JP 427685A JP S61163778 A JPS61163778 A JP S61163778A
Authority
JP
Japan
Prior art keywords
horizontal scanning
data
screen
sampling
scanning period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP427685A
Other languages
Japanese (ja)
Other versions
JPH0544872B2 (en
Inventor
Makoto Ishida
誠 石田
Kiyoshi Imai
今井 浄
Kazumi Kawashima
河島 和美
Junichiro Masaki
正木 淳一郎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP427685A priority Critical patent/JPS61163778A/en
Publication of JPS61163778A publication Critical patent/JPS61163778A/en
Publication of JPH0544872B2 publication Critical patent/JPH0544872B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To reduce an omission of information by incorporating the information of a three horizontal scanning line portion of an original picture of a slave picture, by constituting a title television receiver so that a luminance signal of a one horizontal scanning period portion of the slave picture is obtained by weighting and adding a luminance signal of three horizontal scanning periods. CONSTITUTION:A title television receiver is provided with an N-stage shift register 10 for storing temporarily a data which has sampled a luminance signal converted to a digital signal by an A/D converter 2, N times in one horizontal scanning period, a sampling data of an original picture horizontal scanning period of the (3n-2)-th slave picture (n is a slave picture horizontal scanning line number) is stored in a register 10 in order of sampling, and subsequently, a data which has multiplied by 2 a sampling data of an original picture horizontal scanning period of the (3n-1)-th slave picture, and the data stored in the shift register 10 are added by an adding circuit 8 in order of sampling and stored in the register 10, and subsequently, a sam pling data of an original picture horizontal scanning period of the 3n-th slave picture, and the data stored in the register 10 are added by the adding circuit 8, and the added data is multiplied by 1/4 and the level is matched, and it becomes a luminance signal of the slave picture.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、親画面の一部に他チャ/ネルの面像やVTR
の面像、あるいはビデオカメラの画像を子画面として映
出する2画面テレビジョン受像機に関する〇 従来の技術 近年、テレビジョン受像機の有効利用をはかるために、
本来のテレビ画像の一部に細画像を縮少して映出するい
わゆる2画面テレビジョン受像機が発売されている。(
日経エレクトロニクス1980年4月14日 第67〜
62頁など)。
[Detailed Description of the Invention] Industrial Field of Application The present invention provides a method for displaying images of other channels and VTRs on a part of the main screen.
Background of the Invention In recent years, in order to make effective use of television receivers, in order to make effective use of television receivers,
2. Description of the Related Art So-called two-screen television receivers are on the market, which display a reduced-sized fine image as part of the original television image. (
Nikkei Electronics April 14, 1980 67th ~
(page 62, etc.)

以下、この子画面表示のための映像信号サンプリング方
式の考え方を、第3図、第4図により簡単に述べる。第
3図は映像信号サンプリング回路の回路図、第4図は第
3図に於ける各部のタイミングチャートである。
The concept of the video signal sampling method for displaying this small screen will be briefly described below with reference to FIGS. 3 and 4. FIG. 3 is a circuit diagram of the video signal sampling circuit, and FIG. 4 is a timing chart of each part in FIG. 3.

子画面を原画面の垂直方向1/3に縮少するには、3本
の水平走査線につき1本を選び、これを子画面の水平走
査線とする。第3図で、水平同期信号30から3分周回
路29を通して3本の水平走査線のうち1本の水平走査
期間(ここでは第4図への期間)のみ高レベルとなる制
御信号28を作り、ゲート回′路26により上記制御信
号28が高レベルの期間のみクロック27を出力してサ
ンプリングクロック24とし、入力信号22をA/D変
換器23によりサンプリングしてデジタルデータ25 
(25a〜26e)を得る。
To reduce the size of the child screen to 1/3 of the original screen in the vertical direction, select one out of three horizontal scanning lines and use this as the horizontal scanning line of the child screen. In FIG. 3, a control signal 28 is generated from the horizontal synchronizing signal 30 through a divide-by-3 circuit 29 to be at a high level only during the horizontal scanning period of one of the three horizontal scanning lines (here, the period to FIG. 4). , the gate circuit 26 outputs the clock 27 only during the period when the control signal 28 is at a high level as the sampling clock 24, and the input signal 22 is sampled by the A/D converter 23 to generate digital data 25.
(25a-26e) are obtained.

発明が解決しようとする問題点 ところが、この方式では、3本の水平走査線につき1本
を選び、これを子画面の水平走査線とす水平走査線分の
情報が欠落してしまうという工部本発明の2画面テレビ
ジョン受像機においては、3本の水平走査期間の輝度信
号に重み付けをして加算することによって子画面の1水
平走査期間分の輝度信号を得るようにすることにより、
子画面の原画面の3本の水平走査線分の情報を盛り込み
情報の欠落を低減するようにしたものである。
Problems to be Solved by the Invention However, in this method, one of the three horizontal scanning lines is selected and this is set as the horizontal scanning line of the sub-screen, and the information for the horizontal scanning line is lost. In the two-screen television receiver of the present invention, the luminance signals for one horizontal scanning period of the child screen are obtained by weighting and adding the luminance signals for three horizontal scanning periods.
The information of three horizontal scanning lines of the original screen of the child screen is included to reduce the loss of information.

作  用 本発明の2画面テレビジョン受像機では、3本の水平走
査期間の輝度信号を、走査線順に重み付けをおこない、
3本のうちの第1の水平走査期間のサンプリングデータ
をサンプリング順に記憶素子に記憶しておき、第2の水
平走査期間のサンプリングデータと記憶素子に記憶して
いるデータを順次加算しかつ再度記憶素子にその加算結
果を記憶し、第3の水平走査期間のす/グリフグデータ
と記憶素子に記憶しているデータと加算し、かつ加算結
果をもとの振幅レベルにもどすことにより原画面の輝度
信号レベルとす/プリフグ後のレベルをあわせる。
Function: In the two-screen television receiver of the present invention, the luminance signals of three horizontal scanning periods are weighted in the order of the scanning lines,
The sampling data of the first horizontal scanning period among the three is stored in the storage element in the sampling order, and the sampling data of the second horizontal scanning period and the data stored in the storage element are sequentially added and stored again. The addition result is stored in the element, the glyph data of the third horizontal scanning period is added to the data stored in the storage element, and the addition result is returned to the original amplitude level to reproduce the original screen. Match the brightness signal level/prefume level.

実施例 以下、本発明の一実施例の2画面テレビジョン受像機に
ついて、図面を参照して説明する。  、第1図は本発
明の輝度信号サンプリング回路部分の回路図、第2図は
第1図中の各部のタイミングチャートである。
Embodiment Hereinafter, a two-screen television receiver according to an embodiment of the present invention will be described with reference to the drawings. , FIG. 1 is a circuit diagram of a luminance signal sampling circuit portion of the present invention, and FIG. 2 is a timing chart of each part in FIG. 1.

第1図において、水平同期信号21を3分周回路2oに
より分周して、(3n−2)水平走査期間ではセレクタ
制御信号16が高レベル、(3n−1)水平走査期間で
はビットシフト制御信号6が高レベル、(3n)水平走
査期間はデータ出力制御信号18が高レベル、にそれぞ
れなる3相制御信号を得る。(ここで、nは子画面水平
走査線番号を示す。)これらの制御信号は、各々セレク
タ回路14.ビットシフト回路6.データ出力ゲート1
70制御信号として加えられる。
In FIG. 1, the horizontal synchronization signal 21 is frequency-divided by a 3-frequency divider circuit 2o, the selector control signal 16 is at a high level during the (3n-2) horizontal scanning period, and the bit shift control signal is controlled during the (3n-1) horizontal scanning period. Three-phase control signals are obtained in which the signal 6 is at a high level and the data output control signal 18 is at a high level during the (3n) horizontal scanning period. (Here, n indicates the sub-screen horizontal scanning line number.) These control signals are sent to each selector circuit 14. Bit shift circuit 6. Data output gate 1
70 control signal.

輝度入力信号1はA/D変換器2でサンプリングクロッ
ク3によりデジタルデータ4a〜4eに変換される。
A luminance input signal 1 is converted into digital data 4a to 4e by an A/D converter 2 using a sampling clock 3.

(3n−2)水平走査期間に於いては、ビットシフト制
御信号6は低レベルであり、ビットシフト回路6のデー
タ出カフb〜7f(7aは低レベル)が加算回路8のへ
入力側に加えられる。このとき、セレクタ制御信号16
は高レベルであり、セレクタ回路140B側入力信号1
3a〜13q(低レベル)がセレクタ回路14の出力信
号16a〜16gとなり加算回路8のB個入力に加えら
れ、その加算結果紘が8段シフトレジスタ10にシフト
クロック11のタイミングで記憶される。
(3n-2) During the horizontal scanning period, the bit shift control signal 6 is at a low level, and the data output cuffs b to 7f (7a is at a low level) of the bit shift circuit 6 are input to the adder circuit 8. Added. At this time, selector control signal 16
is at a high level, and the selector circuit 140B side input signal 1
3a to 13q (low level) become output signals 16a to 16g of the selector circuit 14 and are added to B inputs of the adder circuit 8, and the addition results are stored in the eight-stage shift register 10 at the timing of the shift clock 11.

次に、(3n−1)水平走査期間に於いては、ビットシ
フト制御信号6は高レベルであシ、デジタルデータ4a
〜4eは上位に1ピツトシフトされ、ビットシフト回路
6のデータ出力信号7a〜7・(7fは低レベル)が加
算回路8のへ入力側に加えられる。この間、セレクタ制
御信号16は低レベルであり、セレクタ回路14におい
てはN段シフトレジスタ1oの出力信号12a〜12g
がセレクトされ、加算回路8のB入力信号13として加
えられ、その加算結果は再び8段シフトレジスタ10に
記憶される。
Next, during the (3n-1) horizontal scanning period, the bit shift control signal 6 is at a high level, and the digital data 4a
.about.4e are shifted upward by one pit, and data output signals 7a to 7.multidot.(7f is low level) of the bit shift circuit 6 are applied to the input side of the adder circuit 8. During this time, the selector control signal 16 is at a low level, and in the selector circuit 14, the output signals 12a to 12g of the N-stage shift register 1o are
is selected and added as the B input signal 13 of the adder circuit 8, and the addition result is stored in the eight-stage shift register 10 again.

さらに(3n)水平走査期間では、ビットシフト制御信
号6は低レベルになり、またセレクタ制御信号16も低
レベルになるため、ビットシフト回路6の出力信号7b
〜yf (7aは低レベル)が加算回路8のへ入力側に
加えられ、8段シフトレジスタ10の出力信号12a〜
12(iが加算回路8のB入力側に加えられて加算され
る。
Furthermore, in the (3n) horizontal scanning period, the bit shift control signal 6 becomes low level and the selector control signal 16 also becomes low level, so the output signal 7b of the bit shift circuit 6
~yf (7a is a low level) is added to the input side of the adder circuit 8, and the output signal 12a~ of the 8-stage shift register 10
12(i is added to the B input side of the adder circuit 8 and added.

また、この(3n)水平走査期間のみデータ出力制御信
号18は高レベルになり、加算結果がデータ出力ゲート
17から出力される。
Further, the data output control signal 18 becomes high level only during this (3n) horizontal scanning period, and the addition result is output from the data output gate 17.

このように、3本の水平走査線期間のサンプリングデー
タを1:2:1の重み付けで加算するため、加算結果は
輝度信号人力1の4倍にデジタル的に増巾され、本実施
例では6ビツトのサンプリングデータが7ビツトになる
In this way, since the sampling data of three horizontal scanning line periods are added with a weighting ratio of 1:2:1, the addition result is digitally amplified by 4 times the luminance signal human power 1, and in this embodiment, the amplification is 6 times. Bit sampling data becomes 7 bits.

このためデータ出力ゲート17では上位6ビツトをデー
タ出力信号19a〜19eとして取り出し加算結果を1
/4倍してレベルを合わせるようにしている。なお、N
段シフトレジスタ1oの段数は1水平走査期間のサンプ
リング数8個と同じ数である。
Therefore, the data output gate 17 extracts the higher six bits as data output signals 19a to 19e and outputs the addition result as 1.
/I try to match the level by multiplying by 4. In addition, N
The number of stages of the stage shift register 1o is the same as the number of samplings in one horizontal scanning period, which is eight.

発明の効果 以上のように、本発明の2画面テレビジョン受像機によ
れば、3本の水平走査期間の輝度信号の相関をとるよう
にしたことにより、子画面の原画面を垂直方向に1/3
縮少しても輝度情報の欠落を低減させることができ、子
画面の画質を向上させるに実用上きわめて有利なもので
ある。
Effects of the Invention As described above, according to the two-screen television receiver of the present invention, by correlating the luminance signals of three horizontal scanning periods, the original screen of the sub-screen can be /3
Even if it is reduced, the loss of brightness information can be reduced, which is extremely advantageous in practice for improving the image quality of the sub-screen.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例における2画面テレビジョン
受像機の要部の回路図、第2図はその各部のタイミング
チャート、第3図は従来の映像信号サンプリング回路の
回路図、第4図はその各部のタイミングチャートである
。 1・・・・・・輝度入力信号、2・・・・・−A/D変
栖器、3・・・・・・サンプリングクロック、4・・・
・−・デジタルデータ、5・・・・・・ピットシフト回
路、6・・・・・・ビットシフト制御信号、7・・・・
・・ピットシフト回路のデータ出力信号、8・・・・・
・加算回路、9・・・・・・加算出力信号、1o・・・
・・・シフトレジスタ、11・・・・・・シフトクロッ
ク、12・・・・・・シフトレジスタの出力信号、13
・・・・・・セレクタ回路のB個入力信号、14・・・
・・−セレクタ回路、16・−・・・・セレクタ制御信
号、16・・・・・・セレクタ口締の出力信号、17・
・・・・−データ出力ゲート、18・・・・・・データ
出力制御信号、19・・・・・・データ出力信号、20
・・・・・・3分周回路、21・・・・・・水平同期信
号。 代理人の氏名 弁理士 中 尾 敏 男 ほか1名26
・・・り′−ト話^路 2q・−・3番尾廿港 フQ
Fig. 1 is a circuit diagram of the main parts of a two-screen television receiver according to an embodiment of the present invention, Fig. 2 is a timing chart of each part thereof, Fig. 3 is a circuit diagram of a conventional video signal sampling circuit, and Fig. 4 is a circuit diagram of a conventional video signal sampling circuit. The figure is a timing chart of each part. 1...Brightness input signal, 2...-A/D transformer, 3...Sampling clock, 4...
- Digital data, 5... Pit shift circuit, 6... Bit shift control signal, 7...
...Data output signal of pit shift circuit, 8...
・Addition circuit, 9... Addition output signal, 1o...
...Shift register, 11...Shift clock, 12...Output signal of shift register, 13
...B input signals of the selector circuit, 14...
...-Selector circuit, 16...Selector control signal, 16...Selector closing output signal, 17.
......-data output gate, 18...data output control signal, 19...data output signal, 20
...3 frequency divider circuit, 21 ... horizontal synchronization signal. Name of agent: Patent attorney Toshio Nakao and 1 other person26
...Ri'-to story^Route 2q--3rd tail port Q

Claims (2)

【特許請求の範囲】[Claims] (1)子画面に映出すべきテレビジョン信号の3水平走
査期間の輝度信号を、第1、第2、第3の水平走査期間
の各々の輝度信号に重み付けをおこなって加算すること
により3水平走査期間の輝度信号の相関をとった輝度信
号を得、その加算結果の輝度信号により子画面を映出す
ることを特徴とする2画面テレビジョン受像機。
(1) By weighting and adding the luminance signals of the 3 horizontal scanning periods of the television signal to be displayed on the sub screen to the luminance signals of each of the first, second, and third horizontal scanning periods, A two-screen television receiver characterized in that a luminance signal is obtained by correlating luminance signals during a scanning period, and a sub-screen is displayed using the luminance signal as a result of the addition.
(2)A/D変換器によりデジタル信号に変換された輝
度信号を1水平走査期間でN回サンプリングしたサンプ
リングデータを一時記憶する記憶手段と、(3n−2)
(nは子画面水平走査線番号)番目の子画面の原画面水
平走査期間のサンプリングデータをサンプリング順に上
記記憶手段に記憶する手段と、(3n−1)番目の子画
面の原画面水平走査期間のサンプリングデータを2倍に
する手段と、この2倍にしたデータと上記記憶手段に記
憶したデータとをサンプリング順に加算しかつ上記記憶
手段に記憶する手段と、3n番目の子画面の原画面水平
走査期間のサンプリングデータと上記記憶手段に記憶し
たデータとを加算し、加算したデータを1/4倍にする
手段とを有し、子画面の原画面の3水平走査期間の相関
をとったデータを縮少した子画面の輝度信号とすること
を特徴とする特許請求の範囲第1項記載の2画面テレビ
ジョン受像機。
(2) storage means for temporarily storing sampling data obtained by sampling the luminance signal converted into a digital signal by the A/D converter N times in one horizontal scanning period;
means for storing sampling data of the original screen horizontal scanning period of the (n is the child screen horizontal scanning line number)-th child screen in the storage means in the sampling order, and the original screen horizontal scanning period of the (3n-1)th child screen; means for doubling the sampling data of the 3nth child screen; means for adding the doubled data and the data stored in the storage means in the sampling order and storing the data in the storage means; The data includes means for adding the sampling data of the scanning period and the data stored in the storage means and multiplying the added data by 1/4, and correlating the three horizontal scanning periods of the original screen of the child screen. A two-screen television receiver according to claim 1, characterized in that the luminance signal of the sub-screen is reduced.
JP427685A 1985-01-14 1985-01-14 Two-picture television receiver Granted JPS61163778A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP427685A JPS61163778A (en) 1985-01-14 1985-01-14 Two-picture television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP427685A JPS61163778A (en) 1985-01-14 1985-01-14 Two-picture television receiver

Publications (2)

Publication Number Publication Date
JPS61163778A true JPS61163778A (en) 1986-07-24
JPH0544872B2 JPH0544872B2 (en) 1993-07-07

Family

ID=11580015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP427685A Granted JPS61163778A (en) 1985-01-14 1985-01-14 Two-picture television receiver

Country Status (1)

Country Link
JP (1) JPS61163778A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63104582A (en) * 1986-10-10 1988-05-10 アールシーエー トムソン ライセンシング コーポレーシヨン Television signal processing system
JPH0250682A (en) * 1988-08-12 1990-02-20 Sanyo Electric Co Ltd Dual screen display control circuit and video equipment provided with same circuit
JPH0737408A (en) * 1982-05-10 1995-02-07 Corning Inc Illumination device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5574280A (en) * 1978-11-30 1980-06-04 Nec Home Electronics Ltd Small screen color method for double display color receiver
JPS5580968U (en) * 1978-11-29 1980-06-04
JPS60249483A (en) * 1984-05-24 1985-12-10 Mitsubishi Electric Corp Television receiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5580968U (en) * 1978-11-29 1980-06-04
JPS5574280A (en) * 1978-11-30 1980-06-04 Nec Home Electronics Ltd Small screen color method for double display color receiver
JPS60249483A (en) * 1984-05-24 1985-12-10 Mitsubishi Electric Corp Television receiver

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0737408A (en) * 1982-05-10 1995-02-07 Corning Inc Illumination device
JPS63104582A (en) * 1986-10-10 1988-05-10 アールシーエー トムソン ライセンシング コーポレーシヨン Television signal processing system
JP2852743B2 (en) * 1986-10-10 1999-02-03 アールシーエー トムソン ライセンシング コーポレーシヨン Television signal processing circuit
JPH0250682A (en) * 1988-08-12 1990-02-20 Sanyo Electric Co Ltd Dual screen display control circuit and video equipment provided with same circuit

Also Published As

Publication number Publication date
JPH0544872B2 (en) 1993-07-07

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