JPS61156107A - Liquid crystal display device - Google Patents

Liquid crystal display device

Info

Publication number
JPS61156107A
JPS61156107A JP59274830A JP27483084A JPS61156107A JP S61156107 A JPS61156107 A JP S61156107A JP 59274830 A JP59274830 A JP 59274830A JP 27483084 A JP27483084 A JP 27483084A JP S61156107 A JPS61156107 A JP S61156107A
Authority
JP
Japan
Prior art keywords
liquid crystal
crystal display
circuit
display device
scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59274830A
Other languages
Japanese (ja)
Other versions
JPH0535408B2 (en
Inventor
Yuji Inoue
裕司 井上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP59274830A priority Critical patent/JPS61156107A/en
Publication of JPS61156107A publication Critical patent/JPS61156107A/en
Publication of JPH0535408B2 publication Critical patent/JPH0535408B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/13338—Input devices, e.g. touch panels

Abstract

PURPOSE:To give a position detecting function to a liquid crystal display panel without making any special works, by providing a circuit for detecting the electric charge quantity moved the liquid crystal between an upper and lower base plates and display driving circuit to the outside of the display panel and successivley scanning by driving circuit to the outside of the display panel and successively scanning by switching. CONSTITUTION:A quantity obtained by multiplying the value of an integrator output Vout after T/2 (correctly, just before a reset pulse) by a capacitor value for integration becomes the total electric charge quantity when liquid crystal cells are moved within the T/2 time. By setting scanning lines other than the (i)-th one to high-impedance conditions and impressing a square wave for test upon the (i)-th data line with an integration circuit and setting data lines other than the (j)-th one to high-impedance conditions, the CLC at the i-j intersecting point is measured. The CLC is measured for one line by successively increasing the (j) and this operation is performed one time per one vertical scanning period, for example, 1/32sec and, at the next vertical scanning period, the (S1+1)-th scanning line is selected and measurement is performed. Therefore, the total Q-variation and positional information of a depressed part can be obtained.

Description

【発明の詳細な説明】 ［産業上の利用分野］ 本発明は、液晶表示パネルに特に手を加えることなく、
外部回路に駆動用回路と容量検出用回路とを用意し、適
当に切替えて走査することで該パネル上を押圧した位置
を検出する機能をもたせた液晶表示装置に関するもので
ある。[Detailed Description of the Invention] [Industrial Application Field] The present invention can be used without any special modifications to the liquid crystal display panel.
The present invention relates to a liquid crystal display device which has a function of detecting a pressed position on the panel by providing a driving circuit and a capacitance detection circuit in an external circuit and scanning the panel with appropriate switching.

［従来の技術］及び ［発明が解決しようとする問題点］ 表示部を直接押圧することで位置検出する方法としてＣ
ＲＴなどでは（１）ライトペンを用いる方法や、（２）
管面に透明導電膜をマトリクス状に配置した２枚の透明
フィルムを一定間隙に保ち、抑圧箇所の上下間ショート
を利用する方法などがあるが、液晶表示パネルに対して
は、（１）の方法は表示原理や駆動方法が異なるため使
用できない。[Prior art] and [Problems to be solved by the invention] C is a method of detecting a position by directly pressing the display part.
For RT etc., there are (1) methods using a light pen, and (2)
There are methods such as keeping two transparent films with transparent conductive films arranged in a matrix on the tube surface with a constant gap and utilizing the short between the upper and lower parts of the suppressed area, but (1) is not suitable for liquid crystal display panels. This method cannot be used because the display principle and driving method are different.

又、（２）の方法は、表示パネル外に機械的接点による
位置検出パネルを設けるため部品点数の増大に伴うコス
ト高という問題があった。又、別の位置検出法として、
（３）表示パネル外前面に第７図に示す透明電極スイッ
チパネルを重ねた容量検出型のものがあるが、この方法
も表示パネル外部品（パネル）を用いるため、コスト高
である。さらに、（４）液晶セル自身の容量変化を用い
る方法が提案されている。英国アールニスアールイー、
エレクトロニクス　し　タ　−　ス　（英国Ｒ９ＲＥ。Furthermore, method (2) requires a position detection panel using mechanical contacts to be provided outside the display panel, resulting in an increase in cost due to an increase in the number of parts. In addition, as another position detection method,
(3) There is a capacitive detection type in which a transparent electrode switch panel shown in FIG. 7 is superimposed on the outside front of the display panel, but this method also uses parts (panels) outside the display panel, so it is expensive. Furthermore, (4) a method using a change in capacitance of the liquid crystal cell itself has been proposed. UK ARNIS R.E.,
Electronics station (UK R9RE)

Ｅｌｅｃｔｒｏｎｉｃｓ　Ｌｅｔｔｅｒｓ　）　　１９
８２年、１２　月　９日。Electronics Letters) 19
December 9, 1982.

Ｐ、１１０Ｂ　〜１１０８．　ＮＯ，２５／２１３．　
ｖｏｌ、１８１；。P, 110B to 1108. NO, 25/213.
vol, 181;.

しかしながら、第８図から明らかな様に電極パターンを
［夫してブリッジ回路を構成しなくてはならず、ｒｉ純
ドツトマトリクスパターンによる液晶表示パネルは用い
ることが出来なかった。However, as is clear from FIG. 8, a bridge circuit had to be constructed by changing the electrode pattern, and a liquid crystal display panel with a pure RI dot matrix pattern could not be used.

本発明は、ヒ記従来技術の問題点に鑑みなされたもので
、液晶表示パネルには特に−Ｌを加えることな（Ｑｔ純
ドツトマトリクスパネルディスプレイに位置検出機能を
付加させることを目的としたものである。The present invention was made in view of the problems of the prior art described in (h), and is intended to add a position detection function to a Qt pure dot matrix panel display without adding -L in particular to a liquid crystal display panel. It is.

［問題点を解決するための手段］及び［作用］第１図は
、液晶表示パネルの一画素の等両回路と容埴検ｉｌｌ用
積分回路を表わす。[Means for Solving the Problems] and [Operation] FIG. 1 shows an equal circuit for one pixel of a liquid crystal display panel and an integration circuit for capacitance detection.

第２図は第１図のＶｉｎの信号とＡ点を流れる電流、及
びリセットパルスとＶ。、ｔの関係を表わす。Figure 2 shows the Vin signal in Figure 1, the current flowing through point A, and the reset pulse and V. , t.

第１図においてＣＬＣ（液晶セル容量分）を移動した電
荷ｈｔをＱｌ　とし、Ｒｔｃ（液晶セル抵抗分）を移動
した電荷量をＱ２とするとΔｔにＡ点を通る全電荷量Ｑ
ｌ−９ｈは Ｑ）　ｒｒｈ＝Ｑ＋　＋Ｑ２　　　　　　　・・・（１
）・・・（６） 積分器出力ＶｏｕｔのＴ／２後（正確にはリセットパル
ス直前）の値に積分用コンデンサー値を乗じたものがＴ
／２時間に液晶セルを移動した全電荷量になる なお、リセットパルスは、積分器コンデンサーにチャー
ジされたＱ）−９ｋをキャンセルし、次のＴ／２　での
Ｑ）９＆を見るためのものである。In Fig. 1, if the charge ht transferred by CLC (liquid crystal cell capacity) is Ql, and the amount of charge transferred by Rtc (liquid crystal cell resistance) is Q2, then the total charge passing through point A at Δt is Q.
l-9h is Q) rrh=Q+ +Q2...(1
)...(6) The value of the integrator output Vout after T/2 (precisely, just before the reset pulse) multiplied by the integrating capacitor value is T.
/2 hours The reset pulse is used to cancel Q)-9k charged in the integrator capacitor and to see Q)9& at the next T/2. It is.

［実施例］ 以下、実施例とともに本発明の詳細を更に具体的に説明
する。[Example] Hereinafter, the details of the present invention will be explained in more detail with reference to Examples.

実ｃのＸ−Ｙマトリクスパネルでの位置検出方法の一例
を第３図に示す。図中、Ｓｌ、１・Ｓｌ・Ｓｌ、１は走
査線、ｄ、−１・ｄｊ　’ｄｊ　、ｌはデータ線を示す
。FIG. 3 shows an example of a method for detecting a position on an actual X-Y matrix panel. In the figure, Sl, 1·Sl·Sl, 1 represents a scanning line, and d, −1·dj 'dj, l represents a data line.

ｉ　Ｍ　ｔ、ｌの走査線以外をハイインピーダンス状態
とし、１番目にＩ　ＫＨｚ以上のテスト用矩形波を一水
１１走査期間印加し、ｊ番目のデータ線を積分回路と接
続し、他をハイインピーダンス状態としてｉ−ｊ交点の
Ｃ１，Ｃを測定し、順次ｊを増加して一列のＣｔＣを測
定し、このことを−垂直走査期間、例えばｌ／３２秒に
一回行ない、次の垂直走査期間で次の５１．１番目の走
査線を選択して測定を行なうことで押圧された箇所のＱ
ト−ｙｋ変化とその位置情報を得ることが出来る。今、
押圧される前のセルギャップをｄとし、抑圧によるギヤ
ツブ変動中をΔｄとし液晶の体積抵抗ρ　・ＣＩ＋比誘
電率を（とすると、抑圧前・後のセル容量、ＣＬＣす、
Ｃ１，ＣＩ、セル内抵抗ＲＬＣ中、　Ｒｃａ”＋　は次
式で表わせる。i M Put all scanning lines other than t, l into a high-impedance state, first apply a test rectangular wave of I KHz or higher for 11 scanning periods, connect the j-th data line to the integrating circuit, and set the others to high-impedance. Measure C1, C at the i-j intersection as the impedance state, measure CtC in a row by increasing j sequentially, and do this - once every vertical scanning period, e.g. 1/32 seconds, until the next vertical scanning. By selecting the next 51.1st scanning line in the period and performing measurement, the Q of the pressed part is calculated.
It is possible to obtain toyk change and its position information. now,
Let d be the cell gap before being pressed, Δd be the period during the gear shift due to suppression, and let the liquid crystal volume resistance ρ ・CI + dielectric constant be (, then the cell capacitance before and after suppression, CLC,
Among C1, CI, and internal cell resistance RLC, Rca''+ can be expressed by the following formula.

ε。：真空誘電率８．８５Ｘ　１０−１［Ｆ−ｃｍｌε
：液晶の比誘電率 Ｓ：上下間交差電極面積［Ｃ履２１ ｄ：押圧前セルギャップ［ｃｍｌ Δｄ：抑圧によるセルギヤツブ変動巾［ｃｍｌρ［ｃ：
液晶０比抵抗【・ｃｍｌ ヨッテ、抑圧前（Ｖｏｕｔ　）　　・後（Ｖ　ｏ　ｕ　
Ｌ　ｌ　）　テ（７）Ｔ／２時間後のｖ　ｏｕｔは各々
次式となる。ε. :Vacuum permittivity 8.85X 10-1[F-cmlε
: Relative dielectric constant of liquid crystal S: Cross electrode area between upper and lower electrodes [C 21 d: Cell gap before pressing [cml Δd: Cell gear gap variation width due to suppression [cmlρ[c:
Liquid crystal 0 resistivity [・cml Before suppression (Vout) ・After (Vout
L l ) te (7) v out after T/2 hours are each expressed by the following formula.

・・・（８） 今、液晶に例えばＬｏｃｈｅ社製ＲＯ−ＴＮ−４０３（
ｐ１ｃ＝ｌＯＩ’ｌ　Ω・ｃｍ　　、　ｅ　＝２４）を
１１４　’／）、ｄ　　＝　　１０　　＃１．　ｍ　　
　、　　　Ｓ　　＝　　　ｌ　　ｍａ＋２　　　＝　　
１０−２ｃｍ２　　の　セ　ルとした時、抑圧１１１ビ
後でのＶ。、Ｌの変動率ｖａｔ１１／Ｖｏｕｔ　とΔｄ
の関係は式（７）、　（８）より式（９）が導かれ押圧
によるＶｏｕｔの変動ζよｄの変化のみで表わされる。...(8) Now, for example, Loche's RO-TN-403 (
p1c=lOI'l Ω·cm, e=24) to 114'/), d=10 #1. m
, S = l ma + 2 =
When the cell is 10-2 cm2, V after 111 bits of suppression. , the fluctuation rate of L vat11/Vout and Δd
Equation (9) is derived from Equations (7) and (8), and is expressed only by the variation ζ of Vout due to pressure and the change in d.

第４図に式（８）の関係を示す、この図から一１明らか
に押圧されることでＶ。ｕ’ｔは増大し、特にΔｄ／ｄ
　＞０．５　、即ちセルギャップが局より／ＪＸさくな
れば急激にＶ。ｕＬが増大する。このこと！ま確実に押
圧した箇所を容易に検出しうることを示している。FIG. 4 shows the relationship expressed by equation (8). From this figure, it is clear that V due to being pressed. u't increases, especially Δd/d
>0.5, that is, if the cell gap becomes /JX smaller than the station, V will suddenly increase. uL increases. this thing! This shows that the pressed area can be easily detected.

第１図において、例えばｖｌ。＝±５　Ｖ　、　３２Ｈ
ｚ矩形波を人力し、アナログスイッチにＣＭＯＳタイプ
もの（例えば東芝社製ＴＯ−４０６８）を用１．）た場
合、ＶｏｕＬを誤差１％以内で測定するには、アナログ
スイッチＯＦＦ時のリーク電流を抑える必要があり、次
式の関係を満足しなければならない。In FIG. 1, for example, vl. =±5V, 32H
1. Generate the Z square wave manually and use a CMOS type analog switch (for example, TO-4068 manufactured by Toshiba Corporation). ), in order to measure VouL within an error of 1%, it is necessary to suppress the leakage current when the analog switch is OFF, and the following relationship must be satisfied.

Ｒｏｆｆ：ＣＭＯＳスイッチｏｆｆ抵抗ＴＧ４０θ６で
はＲ６ｒｒ＝１８０ＭΩであるのでＣ≧１．７４Ｘ　１
０−８　［Ｆ］ でなければならない、ここではＣ＝　１．８　Ｘ　１０
−８［Ｆ］　を用いた。Roff: CMOS switch off resistance TG40θ6, R6rr=180MΩ, so C≧1.74X 1
Must be 0-8 [F], here C = 1.8 x 10
-8[F] was used.

ヨッテＶ　ｏｕｔはｄ　＝　１０ＪＬｍ　、　Ｓ　＝　
１０−２＋ｓｉ＋２ニオいて Ｖ　ｏｕｔ　＝１．８１Ｘ　１０−２［Ｖ］が得られる
。第４図から押圧によるＶ。ｕＬ変動は１０倍程度であ
るので増巾用ＯＰアンプを一段加え、れば、押圧による
ＶＯＵ、変動をＯＰアンプ動作電圧範囲で扱うことが出
来る。第５図にこの時の構成を示す。Yacht V out is d = 10JLm, S =
10-2+si+2, V out =1.81X 10-2 [V] is obtained. From Fig. 4, V due to pressure. Since the uL variation is about 10 times, by adding one stage of amplifier for amplification, the variation in VOU due to pressure can be handled within the operating voltage range of the OP amplifier. Figure 5 shows the configuration at this time.

第６図は本発明の電荷量測定用積分回路とパネル表示用
ドライバーの選択（切替）に注目したロジック部分であ
る。FIG. 6 shows a logic part focusing on the selection (switching) of the integrator circuit for measuring the amount of charge and the driver for panel display according to the present invention.

通常のデータ表示時には、セレクト信号が旧ｇｈ（“Ｈ
”）のＴｒ２がＯＮとなり、垂直ドライバーからの信壮
がパネルに供給される。この時電荷量測定用Ｔｒ＋　の
コントロール用シフトレジスターへは、プリセット信号
によって全ビット“Ｌ”にして丁ｒｌ　を１ｌｌＦＦに
し、積分回路をパネルから切離しておく０次に押圧箇所
検出時にはセレクト信号を“Ｌ”として垂直ドライバー
側Ｔｒ２　　とＯＦＦとしてパネルから切離し、電荷量
δ一定用Ｔｒｌ　コントロール用シフトレジスターをセ
レクトし、誤ってプリセットがかからない状態にしてお
いて順次ＧＬＫによってＴｒＩ　を選択して水ｑｔと垂
直交点液晶の■。ｕｔを測定していく。During normal data display, the select signal is
”) is turned on, and the signal from the vertical driver is supplied to the panel.At this time, all bits are set to “L” by a preset signal to the shift register for controlling the charge amount measurement Tr+, and the Tr2 is set to 1llFF. When detecting the 0th press point, set the select signal to "L" and turn off the vertical driver side Tr2 and disconnect it from the panel, select the shift register for controlling the Trl for constant charge amount δ, and With the preset not applied, TrI is sequentially selected using GLK, and the water qt and the vertical intersection of the liquid crystal (2).ut are measured.

水平側のパネル表示時とＶｏｕｔ測定時の選択方法は基
本的には垂直側精分回路を除いた部分を同様の構成で良
い、但しｌ水平選択期間内に垂直側は順次選択・測定し
なければならないことは言うまでもない。The selection method for horizontal panel display and Vout measurement can basically be the same configuration except for the vertical side refinement circuit, but the vertical side must be selected and measured sequentially within the horizontal selection period. It goes without saying that this is a must.

本発明で用いる液晶パネルとしては、ＴＮ配向させたネ
マチック液晶の他に、米国特許第４３８７９２４号公報
に開示された強誘電性液晶を用いることができる。この
強誘電性液晶としては、カイラルスメクティックＣ相、
Ｈ相、Ｊ相、Ｇ相、Ｋ相、Ｆ相などのカイラルスメクテ
ィック相の液晶を用いることができる。As the liquid crystal panel used in the present invention, in addition to TN-oriented nematic liquid crystal, ferroelectric liquid crystal disclosed in US Pat. No. 4,387,924 can be used. This ferroelectric liquid crystal includes chiral smectic C phase,
Liquid crystals having chiral smectic phases such as H phase, J phase, G phase, K phase, and F phase can be used.

［発明の効果］ 以上説明したように、本発明によれば、Ｘ−Ｙマトリク
ス液晶表示装置において液晶表示パネルに手を加えるこ
となく、外部回路構成のみによって液晶表示パネルを直
接押圧した位置検出をすることが出来、又、回路構成も
ＯＰアンプ、　Ｃ−ＭＯＳアナログスイッチ、コンデン
サー等の部品で組むことが出来るので、他の方法に比べ
安価に精度良く位置検出機能を付加することが出来る。[Effects of the Invention] As explained above, according to the present invention, it is possible to detect the position of an X-Y matrix liquid crystal display device by directly pressing the liquid crystal display panel using only the external circuit configuration without modifying the liquid crystal display panel. Moreover, since the circuit configuration can be assembled with parts such as an OP amplifier, a C-MOS analog switch, and a capacitor, it is possible to add a position detection function with high precision at a low cost compared to other methods.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は、押圧位置検出のための基本回路図、第２図は
、第３図に示す回路動作原理と入力、出力波形図、第３
図は、抑圧位置検出基本構成等価回路図、ｉ４図は、抑
圧位置検出時のギャップ変動と出力電圧の関係図、第５
図は、精分回路と増＋１Ｊ段の構成図、第６図は、信号
線側表示回路と位置検出回路の構成図、第７図は、透明
電極スイッチパネルを重ねた容量検出型位置検出の一例
を示す一部切欠き斜視図、第８図は、電極配置と等価回
路例を示す説明図である。 ＣＬ　Ｃ；液晶セル容量分、 Ｒｃｃ；液晶セル抵抗分、Figure 1 is a basic circuit diagram for detecting the pressed position, Figure 2 is the circuit operating principle shown in Figure 3, and input and output waveform diagrams.
The figure is an equivalent circuit diagram of the basic configuration for suppressing position detection.
The figure shows the configuration of the precision circuit and the +1J stage, Figure 6 shows the configuration of the signal line side display circuit and position detection circuit, and Figure 7 shows the configuration of the capacitive position detection circuit with overlapping transparent electrode switch panels. FIG. 8, a partially cutaway perspective view showing an example, is an explanatory diagram showing an example of electrode arrangement and an equivalent circuit. CL C: Liquid crystal cell capacity, Rcc: Liquid crystal cell resistance,

Claims (1)

【特許請求の範囲】 １）二枚の基板間に液晶物質を封入して成る液晶表示装
置において、表示パネル外に上下基板間液晶を移動した
電荷量を検出するための回路と、表示駆動用回路とを設
け、順次切替走査することを特徴とする液晶表示装置。 ２）上記電荷量検出回路に、積分器を用いることを特徴
とする特許請求の範囲第１項記載の液晶表示装置。 ３）上下基板上電極をマトリクス状に配置した上下基板
間に、液晶をＴＮ配向させ、走査電極信号に矩形波を用
い、データ表示の際にはデータ線側電極に表示用駆動回
路からの信号を用い、電荷量検出時には走査線の１本を
積分回路に接続し、他をハイインピーダンス状態にし、
データ線の１本にテスト用矩形波信号を印加し、他をハ
イインピーダンスとし一水平走査期間内に順次走査する
ことを特徴とする特許請求の範囲第一項記載の液晶表示
装置。 ４）水平走査期間内順次走査を垂直走査期間内に少なく
とも一回は行なうことを特徴とする特許請求の範囲第３
項記載の液晶表示装置。 ５）積分回路には水平走査期間内に少なくとも１回はリ
セットがかかる機能を有する特許請求の範囲第３項記載
の液晶表示装置。 ６）テスト用信号に走査線信号を兼用したことを特徴と
する特許請求の範囲第３項記載の液晶表示装置。 ７）積分回路出力段にゲイン１０〜２００の増巾段を設
けたことを特徴とする特許請求の範囲第３項記載の液晶
表示装置。[Claims] 1) In a liquid crystal display device in which a liquid crystal material is sealed between two substrates, a circuit for detecting the amount of charge transferred to the liquid crystal between the upper and lower substrates outside the display panel, and a circuit for driving the display. 1. A liquid crystal display device characterized by being provided with a circuit and sequentially switching and scanning. 2) The liquid crystal display device according to claim 1, wherein an integrator is used in the charge amount detection circuit. 3) The liquid crystal is TN-oriented between the upper and lower substrates where the electrodes are arranged in a matrix, a rectangular wave is used for the scanning electrode signal, and when data is displayed, a signal from the display drive circuit is sent to the data line side electrode. When detecting the amount of charge, connect one of the scanning lines to the integrating circuit, put the others in a high impedance state,
2. The liquid crystal display device according to claim 1, wherein a test rectangular wave signal is applied to one of the data lines, and the other data lines are set to high impedance and sequentially scanned within one horizontal scanning period. 4) Claim 3, characterized in that sequential scanning within the horizontal scanning period is performed at least once within the vertical scanning period.
The liquid crystal display device described in Section 1. 5) The liquid crystal display device according to claim 3, wherein the integrating circuit has a function of being reset at least once during a horizontal scanning period. 6) The liquid crystal display device according to claim 3, wherein a scanning line signal is also used as a test signal. 7) The liquid crystal display device according to claim 3, characterized in that an amplification stage with a gain of 10 to 200 is provided at the output stage of the integrating circuit.
JP59274830A 1984-12-28 1984-12-28 Liquid crystal display device Granted JPS61156107A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59274830A JPS61156107A (en) 1984-12-28 1984-12-28 Liquid crystal display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59274830A JPS61156107A (en) 1984-12-28 1984-12-28 Liquid crystal display device

Publications (2)

Publication Number Publication Date
JPS61156107A true JPS61156107A (en) 1986-07-15
JPH0535408B2 JPH0535408B2 (en) 1993-05-26

Family

ID=17547164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59274830A Granted JPS61156107A (en) 1984-12-28 1984-12-28 Liquid crystal display device

Country Status (1)

Country Link
JP (1) JPS61156107A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0773497A1 (en) * 1995-11-13 1997-05-14 Symbios Logic Inc. Electrically driven display and method
WO2004053576A1 (en) * 2002-12-12 2004-06-24 Koninklijke Philips Electronics N.V. Touch sensitive active matrix display and method for touch sensing
JP2015015039A (en) * 2014-09-04 2015-01-22 Ｎｌｔテクノロジー株式会社 Surface display device and electronic apparatus

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0773497A1 (en) * 1995-11-13 1997-05-14 Symbios Logic Inc. Electrically driven display and method
US5777596A (en) * 1995-11-13 1998-07-07 Symbios, Inc. Touch sensitive flat panel display
WO2004053576A1 (en) * 2002-12-12 2004-06-24 Koninklijke Philips Electronics N.V. Touch sensitive active matrix display and method for touch sensing
JP2015015039A (en) * 2014-09-04 2015-01-22 Ｎｌｔテクノロジー株式会社 Surface display device and electronic apparatus

Also Published As

Publication number Publication date
JPH0535408B2 (en) 1993-05-26

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