JPS61147386A - Ic card reader/writer - Google Patents

Ic card reader/writer

Info

Publication number
JPS61147386A
JPS61147386A JP59268256A JP26825684A JPS61147386A JP S61147386 A JPS61147386 A JP S61147386A JP 59268256 A JP59268256 A JP 59268256A JP 26825684 A JP26825684 A JP 26825684A JP S61147386 A JPS61147386 A JP S61147386A
Authority
JP
Japan
Prior art keywords
card
clock pulse
signal
writer
clock
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59268256A
Other languages
Japanese (ja)
Other versions
JPH0438030B2 (en
Inventor
Yoshio Shimamura
島村 宣雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Tatsuno Co Ltd
Original Assignee
Tokyo Tatsuno Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Tatsuno Co Ltd filed Critical Tokyo Tatsuno Co Ltd
Priority to JP59268256A priority Critical patent/JPS61147386A/en
Publication of JPS61147386A publication Critical patent/JPS61147386A/en
Publication of JPH0438030B2 publication Critical patent/JPH0438030B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To operate plural IC cards normally with one reader/writer by selecting plural clock pulses different in frequency. CONSTITUTION:When the contact of an IC card is connected to the terminal 26 of the reader/writer, a set signal is outputted from a set detector 8, and the IC card is connected electrically to the device. Then, the first clock pulse oscillating means 6a is connected to the terminal 26 through a switching means 6a, and the first clock pulse having a frequency f1 is first outputted from a clock pulse generating circuit 6, and next, a reset signal and a start signal are outputted by a reset signal generating means 9. If the first clock pulse coincides with the specification of the IC card, this card outputs a signal in a standard transmission speed, and it is read normally by the reader/writer. If the first clock pulse does not coincide with it, a control means 1 outputs a signal to a switching signal generating means 6c to operate the switching means 6d, and another clock is supplied from the second clock pulse oscillating means 6b.

Description

【発明の詳細な説明】 (技術分野) 本発明は、ICカードの読取り拳書込み装置に関する。[Detailed description of the invention] (Technical field) The present invention relates to an IC card reading and writing device.

(従来技術) 比較的大量の傭人情報の管理には、第5図に示したよう
にデータ格納用の電気的に書換え可能な不揮発性メモリ
(以下、EEFROMと呼ぶ)23と、これの動作を制
御する1チツプマイクロコンピユータ24をカード状に
パッケージし1表面に読取り番書込み装置と接続する接
点25゜25・・・・を設け、ICカード読取り・書込
み装置からクロックパルスの供給を受けて作動するIC
カードが利用されるようになってきた。
(Prior Art) In order to manage a relatively large amount of employee information, as shown in FIG. A one-chip microcomputer 24 to be controlled is packaged in the form of a card, and contacts 25, 25, etc. are provided on one surface for connection to a reading number writing device, and the card is operated by receiving clock pulses from the IC card reading/writing device. IC
Cards are starting to be used.

ところでこのICカードは、データ転送速度や接点の配
列形態が規格により統一されつつあるが、クロックパル
スの周波数についてまでは統一された規格が制定される
のは難しい情勢にある。
By the way, although the data transfer speed and the arrangement of contacts in IC cards are becoming standardized, it is difficult to establish a unified standard for the frequency of clock pulses.

このため、使用者は、ICカードの種類ごとに専用の読
取り・書込み装置を用意せねばならず、ICカードの普
及を阻害していた。
Therefore, users had to prepare dedicated reading/writing devices for each type of IC card, which hindered the spread of IC cards.

(目的) 本発明はこのような事情に鑑み、クロックパルス周波数
が異なるICカードを一台の装置で作動させることがで
きるICカード読取り拳書込み装置を提供することであ
る。
(Objective) In view of the above circumstances, it is an object of the present invention to provide an IC card reading/writing device that can operate IC cards having different clock pulse frequencies with a single device.

(構成) そこで、以下に本発明の詳細を図示した実施例に基づい
て説明する。
(Structure) Therefore, details of the present invention will be described below based on illustrated embodiments.

第3図は、本発明の一実施例を示す装置の外観であって
、図中符号12は、後述する読取り・書込み制御回路(
第1図)を内蔵した装置本体で、キイボード2やプリン
ター3を上面に、ディスプレイ4を背面に一体的に配設
する一方、前面下部にICカード装填口16を設けて構
成されている。
FIG. 3 shows an external appearance of a device showing an embodiment of the present invention, in which reference numeral 12 denotes a read/write control circuit (described later).
1), a keyboard 2 and a printer 3 are provided on the top surface, a display 4 is integrally provided on the back surface, and an IC card loading slot 16 is provided at the bottom of the front surface.

第4図は、上述したICカード装填機構の一例を示すも
ので、図中符号17は、少なくともICカードの一側及
び−面を規制しながらICカードを案内する搬送路18
を形成したフレームで、一端に形成した挿入口16の近
傍にICカードにの先端を検出して後述するICカード
移送機構19を駆動する第1のリミットスイッチ20を
設け、他端にICカードが規定の位置にセットされたこ
とを検出し、ICカード移送機構19の作動を停止させ
同時にコンタクトヘッド21を降下させるセット検出器
8が設けられている。19は、前述のICカード移送機
構で、移送方向に直交する軸により一端を可回動に支持
し、バネ19aにより搬送路18偏に付勢した押圧杆1
9bにより弾圧したケーシング19cに送り転子19d
を可回動に取付け、ベル)19eによりモータ19fに
接続されている。22は、コンタクトヘッド昇降機構で
、ソレノイド22aに作動杆22bを介してコンタクト
ヘッド21を取付け、常時はコイルバネ22cにより上
方に引上げた状態に保持するように構成されている。
FIG. 4 shows an example of the above-mentioned IC card loading mechanism, and reference numeral 17 in the figure indicates a transport path 18 that guides the IC card while regulating at least one side and the - side of the IC card.
A first limit switch 20 is provided near the insertion slot 16 formed at one end to detect the tip of the IC card and drive an IC card transfer mechanism 19, which will be described later. A set detector 8 is provided which detects that the IC card is set at a prescribed position, stops the operation of the IC card transfer mechanism 19, and simultaneously lowers the contact head 21. Reference numeral 19 denotes the above-mentioned IC card transfer mechanism, in which the pressing rod 1 is rotatably supported at one end by a shaft perpendicular to the transfer direction and biased toward the transfer path 18 by a spring 19a.
The feed trochanter 19d is applied to the casing 19c compressed by 9b.
is rotatably mounted and connected to the motor 19f by a bell) 19e. Reference numeral 22 denotes a contact head elevating mechanism, in which the contact head 21 is attached to a solenoid 22a via an operating rod 22b, and is normally held in an upwardly pulled state by a coil spring 22c.

第1図は、ICカード読取り・書込み装置の一実施例を
示すものであって、図中符号lは、読取り・書込み装置
の動作を統括する制御手段で、キイボード2かも入力し
たデータに基づいてプリンタ3.ディスプレイ4にデー
タを出力する一方、送受信手段5を介してICカードに
格納されたデータの読出しや、ICカードにデータを格
納するように構成されている。6は、本発明の特徴部分
をなすクロックパルス発振手段で、周波数f、、f2を
持つ、例えば水晶振動子を源振とするクロックパルス発
振手段6a、6b、切換信号発生器6C1切換手段6d
からなり、制御手段lからの信号に基づいていづれか一
方の周波数のクロックパルスを選択して出力するように
構成されている。8は、ICカードが装填口16から挿
入され読取り・書込み装置の所定位置に装填されたこと
を検出するセット検出器、9は、ICカードを作動させ
るリセット信号を発振するリセット信号発生手段、10
.11はデータ読取り手段、データ出力手段である。
FIG. 1 shows an embodiment of an IC card reading/writing device, and reference numeral l in the figure is a control means that controls the operation of the reading/writing device, and the keyboard 2 also controls the operation of the reading/writing device based on input data. Printer 3. While outputting data to the display 4, it is configured to read data stored in the IC card via the transmitting/receiving means 5, and to store data in the IC card. Reference numeral 6 denotes a clock pulse oscillation means which is a characteristic part of the present invention, and includes clock pulse oscillation means 6a, 6b having frequencies f, f2, for example, whose source oscillation is a crystal oscillator, and a switching signal generator 6C1 switching means 6d.
The clock pulses of one of the frequencies are selected and output based on the signal from the control means l. 8 is a set detector that detects that the IC card is inserted from the loading slot 16 and loaded in a predetermined position of the reading/writing device; 9 is a reset signal generating means that oscillates a reset signal to activate the IC card; 10
.. 11 is a data reading means and a data output means.

次に、このように構成した装置の動作を第2図に示した
フローチャートに基づいて説明する。
Next, the operation of the apparatus configured as described above will be explained based on the flowchart shown in FIG.

装置本体12のカード挿入口16からICカードKを挿
入し、ICカードKが所定位置にモー2トされると、接
点25.25・・・・は読取り・書込み装置の端子26
に接続される。
When the IC card K is inserted into the card insertion slot 16 of the main body 12 of the device and the IC card K is moved to a predetermined position, the contacts 25, 25, etc. are connected to the terminals 26 of the reading/writing device.
connected to.

この段階でセット検出器8からセット信号が出力し、I
Cカードには、装置と電気的に接続される。これにより
第1のクロックパルス発振手段6aが切換手段6dを介
して端子26に接続され、クロックパルス発生回路6か
ら先ず周波数f1を持った第1のクロックパルスが出力
され、続いてリセット信号発信手段によりリセット信号
と始動信号が出力する。この第1のクロックパルスがI
Cカードの規格と一致するときには、ICカードは、規
格の伝送速度、例えば9000ボーで信号を出力し、読
取り・書込み装置によって正常に読取りが行なわれる。
At this stage, a set signal is output from the set detector 8, and the I
The C card is electrically connected to the device. As a result, the first clock pulse generation means 6a is connected to the terminal 26 via the switching means 6d, and the clock pulse generation circuit 6 first outputs the first clock pulse having the frequency f1, and then the reset signal generation means The reset signal and start signal are output. This first clock pulse is I
When the IC card conforms to the standard of the IC card, the IC card outputs a signal at the standard transmission rate, for example, 9000 baud, and is normally read by the reading/writing device.

他方、第1のクロックパルス発振手段6aの周波数f1
がICカードの規格に合わない場合には、ICカードは
規格外れの伝送速度で信号を出力するか、もしくは全く
作動しない、これにより、制御手段1は、切換信号発生
手段6Cに信号を出力して切換手段6dを作動し、周波
数f2を持った第2のクロックパルス発振手段6bから
のクロックパルスが切換手段6dを介して端子26に出
力され、続いてリセット信号及び始動信号が出力されI
Cカードを再び駆動させる。この周波数f2のクロック
パルスがICカードの規格に合うと、ICカードは所定
の伝送速度でデータを出力する。これにより、制御手段
lは、正常な読取りが行なわれているものと判断し、I
Cカードからのデータの読取り、または書込みを継続す
る。
On the other hand, the frequency f1 of the first clock pulse oscillation means 6a
If the IC card does not meet the standard of the IC card, the IC card outputs a signal at a transmission rate outside the standard or does not operate at all.Thereby, the control means 1 outputs a signal to the switching signal generation means 6C. to actuate the switching means 6d, and a clock pulse from the second clock pulse oscillation means 6b having a frequency f2 is outputted to the terminal 26 via the switching means 6d, and then a reset signal and a start signal are outputted.
Drive the C card again. When this clock pulse of frequency f2 meets the IC card standard, the IC card outputs data at a predetermined transmission speed. As a result, the control means l determines that normal reading is being performed, and
Continue reading or writing data from the C card.

なお、この実施例においては、クロックパルスの周波数
が2種類の場合について説明したが、3種類以上のクロ
ックパルス周波数が存在する場合にも同様に適用できる
ことは云うまでもない。
In this embodiment, the case where there are two types of clock pulse frequencies has been described, but it goes without saying that the present invention can be similarly applied to a case where there are three or more types of clock pulse frequencies.

(効果) 以上、説明したように本発明によれば周波数が異なる複
数のクロックパルスを選択できるようにしたので、IC
カードのクロック周波数に拘りなく1台の読取り・書込
み装置によりICカードを正常に動作させることができ
る。
(Effects) As explained above, according to the present invention, it is possible to select a plurality of clock pulses with different frequencies.
An IC card can be operated normally with one reading/writing device regardless of the clock frequency of the card.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の一実施例を示す装置のブロック図、
第2図は、同上装置の動作を示すフローチャート、第3
図は、ICカード読取り・書込み装置の外観を示す斜視
図、第4図は、ICカード装填機構の一例を示す断面図
、及び第5図(イ)(ロ)は、それぞれICカードの一
例を示す斜視断面図、及びブロック図である。 2・・・・キイボード 3・・・・プリンタ6・・・・
クロックパルス発振手段 12・・・・読取り・書込み装置本体 16・・・・ICカード装填口 23・・・・不揮発性メモリ 24・・・・マイクロコンピュータ 出願人 株式会社 東 京 タ ツ ノ代理人 弁理士
  西 川 慶 治 同 木村勝彦 第1図 第3図 第4図 第5図 (ロ)
FIG. 1 is a block diagram of an apparatus showing an embodiment of the present invention;
FIG. 2 is a flowchart showing the operation of the same device;
The figure is a perspective view showing the external appearance of the IC card reading/writing device, FIG. 4 is a sectional view showing an example of the IC card loading mechanism, and FIGS. FIG. 2 is a perspective sectional view and a block diagram shown in FIG. 2... Keyboard 3... Printer 6...
Clock pulse oscillation means 12...Reading/writing device body 16...IC card loading slot 23...Non-volatile memory 24...Microcomputer Applicant Tokyo Co., Ltd. Tatsuno Attorney Patent Attorney Keiji Nishikawa Katsuhiko Kimura Figure 1 Figure 3 Figure 4 Figure 5 (b)

Claims (1)

【特許請求の範囲】[Claims] 複数のクロックパルス発振手段を切換手段を介してクロ
ックパルス出力端子に接続し、切換手段の切換えを切換
信号発生手段の出力により行なうICカード読取り・書
込み装置
An IC card reading/writing device in which a plurality of clock pulse oscillation means are connected to a clock pulse output terminal via a switching means, and the switching means are switched by the output of a switching signal generation means.
JP59268256A 1984-12-21 1984-12-21 Ic card reader/writer Granted JPS61147386A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59268256A JPS61147386A (en) 1984-12-21 1984-12-21 Ic card reader/writer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59268256A JPS61147386A (en) 1984-12-21 1984-12-21 Ic card reader/writer

Publications (2)

Publication Number Publication Date
JPS61147386A true JPS61147386A (en) 1986-07-05
JPH0438030B2 JPH0438030B2 (en) 1992-06-23

Family

ID=17456048

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59268256A Granted JPS61147386A (en) 1984-12-21 1984-12-21 Ic card reader/writer

Country Status (1)

Country Link
JP (1) JPS61147386A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373491A (en) * 1986-09-17 1988-04-04 Seiko Epson Corp Ic card reader/writer
JPH01150992A (en) * 1987-12-08 1989-06-13 Nippon Denso Co Ltd Ic card reader/writer
JPH01255991A (en) * 1988-04-06 1989-10-12 Hitachi Maxell Ltd Ic card control system
JPH0398186A (en) * 1989-09-11 1991-04-23 Toppan Printing Co Ltd Reader/writer for ic card
EP0617379A2 (en) * 1993-03-24 1994-09-28 Kabushiki Kaisha Toshiba Data transmission system
US5574271A (en) * 1993-09-14 1996-11-12 Societe D'applications D'electricite Et De Mecanique Sagem Electronic terminal with memory-card reader
US5728998A (en) * 1996-03-29 1998-03-17 Motorola, Inc. Secure smart card reader with virtual image display and pull-down options
US5763862A (en) * 1996-06-24 1998-06-09 Motorola, Inc. Dual card smart card reader
JP2005174337A (en) * 2003-12-11 2005-06-30 Samsung Electronics Co Ltd Memory system, and method for setting data transmission speed between host and memory card

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439538A (en) * 1977-04-20 1979-03-27 Int Computers Ltd Data processor
JPS5446447A (en) * 1977-08-26 1979-04-12 Cii Portable data carrier for storing and processing data
JPS54124611A (en) * 1978-03-20 1979-09-27 Mitsubishi Electric Corp Communication unit
US4223830A (en) * 1978-08-18 1980-09-23 Walton Charles A Identification system
JPS56132625A (en) * 1980-03-21 1981-10-17 Nec Corp Input and output controlling device
JPS5880176A (en) * 1981-11-05 1983-05-14 Dainippon Printing Co Ltd Data processing method for memory card
JPS5924352A (en) * 1982-07-31 1984-02-08 Fujitsu Ltd Recovery processing system for fault of clock system
JPS59107483A (en) * 1982-12-10 1984-06-21 Nippon Telegr & Teleph Corp <Ntt> Writing processing method to ic card

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5439538A (en) * 1977-04-20 1979-03-27 Int Computers Ltd Data processor
JPS5446447A (en) * 1977-08-26 1979-04-12 Cii Portable data carrier for storing and processing data
JPS54124611A (en) * 1978-03-20 1979-09-27 Mitsubishi Electric Corp Communication unit
US4223830A (en) * 1978-08-18 1980-09-23 Walton Charles A Identification system
JPS56132625A (en) * 1980-03-21 1981-10-17 Nec Corp Input and output controlling device
JPS5880176A (en) * 1981-11-05 1983-05-14 Dainippon Printing Co Ltd Data processing method for memory card
JPS5924352A (en) * 1982-07-31 1984-02-08 Fujitsu Ltd Recovery processing system for fault of clock system
JPS59107483A (en) * 1982-12-10 1984-06-21 Nippon Telegr & Teleph Corp <Ntt> Writing processing method to ic card

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373491A (en) * 1986-09-17 1988-04-04 Seiko Epson Corp Ic card reader/writer
JPH01150992A (en) * 1987-12-08 1989-06-13 Nippon Denso Co Ltd Ic card reader/writer
JPH01255991A (en) * 1988-04-06 1989-10-12 Hitachi Maxell Ltd Ic card control system
JPH0398186A (en) * 1989-09-11 1991-04-23 Toppan Printing Co Ltd Reader/writer for ic card
EP0617379A2 (en) * 1993-03-24 1994-09-28 Kabushiki Kaisha Toshiba Data transmission system
EP0617379A3 (en) * 1993-03-24 1995-06-14 Tokyo Shibaura Electric Co Data transmission system.
US5712881A (en) * 1993-03-24 1998-01-27 Kabushiki Kaisha Toshiba Data transmission apparatus selectively using two clock signals
US5574271A (en) * 1993-09-14 1996-11-12 Societe D'applications D'electricite Et De Mecanique Sagem Electronic terminal with memory-card reader
US5728998A (en) * 1996-03-29 1998-03-17 Motorola, Inc. Secure smart card reader with virtual image display and pull-down options
US5763862A (en) * 1996-06-24 1998-06-09 Motorola, Inc. Dual card smart card reader
JP2005174337A (en) * 2003-12-11 2005-06-30 Samsung Electronics Co Ltd Memory system, and method for setting data transmission speed between host and memory card
JP4588427B2 (en) * 2003-12-11 2010-12-01 三星電子株式会社 Memory system and data transmission speed setting method between host and memory card

Also Published As

Publication number Publication date
JPH0438030B2 (en) 1992-06-23

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