JPS6114566U - Boost circuit for telephone terminal equipment - Google Patents

Boost circuit for telephone terminal equipment

Info

Publication number
JPS6114566U
JPS6114566U JP9745384U JP9745384U JPS6114566U JP S6114566 U JPS6114566 U JP S6114566U JP 9745384 U JP9745384 U JP 9745384U JP 9745384 U JP9745384 U JP 9745384U JP S6114566 U JPS6114566 U JP S6114566U
Authority
JP
Japan
Prior art keywords
line
telephone
control circuit
terminal equipment
telephone terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9745384U
Other languages
Japanese (ja)
Other versions
JPH0332130Y2 (en
Inventor
茂樹 大和
Original Assignee
株式会社 宮川製作所
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社 宮川製作所 filed Critical 株式会社 宮川製作所
Priority to JP9745384U priority Critical patent/JPS6114566U/en
Publication of JPS6114566U publication Critical patent/JPS6114566U/en
Application granted granted Critical
Publication of JPH0332130Y2 publication Critical patent/JPH0332130Y2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Sub-Exchange Stations And Push- Button Telephones (AREA)
  • Devices For Supply Of Signal Current (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案の一実施例を示す回路図である。 COは局線、COTは局線制御回路、NRは負性抵抗回
路、CNTはトランジスタ制御回路、SW,SUBはス
イッチング装置および内線制御回路、T1〜Tnは内線
電話機である。
The drawing is a circuit diagram showing an embodiment of the present invention. CO is an office line, COT is an office line control circuit, NR is a negative resistance circuit, CNT is a transistor control circuit, SW and SUB are switching devices and extension control circuits, and T1 to Tn are extension telephones.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] PBXまたはボタン電話装置において、局線制御回路と
内線電話機間の電話回線路に介挿され一方向の回線電流
を検出するトランジスタと一方向導通素子の直列回路と
、この回線電流が検出されたとき動作し−て前記一方向
導通素子を逆バイアスさせるトランジスタ制御回路を備
え、更に回線電流・ が検出され、前記トランジスタ制
御回路が前E一方向導通素子を逆バイアスさせたとき、
電話回線路に直列に印可させる局部直流電源を有するこ
とを特徴とする電話回線用負性抵抗回路装置。
In a PBX or button telephone device, a series circuit of a transistor and a one-way conduction element inserted in a telephone line between a central office line control circuit and an extension telephone to detect one-way line current, and when this line current is detected. a transistor control circuit that operates to reverse bias the one-way conduction element, further comprising: a transistor control circuit that operates to reverse bias the one-way conduction element;
A negative resistance circuit device for a telephone line, comprising a local DC power supply applied in series to the telephone line.
JP9745384U 1984-06-28 1984-06-28 Boost circuit for telephone terminal equipment Granted JPS6114566U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9745384U JPS6114566U (en) 1984-06-28 1984-06-28 Boost circuit for telephone terminal equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9745384U JPS6114566U (en) 1984-06-28 1984-06-28 Boost circuit for telephone terminal equipment

Publications (2)

Publication Number Publication Date
JPS6114566U true JPS6114566U (en) 1986-01-28
JPH0332130Y2 JPH0332130Y2 (en) 1991-07-08

Family

ID=30657008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9745384U Granted JPS6114566U (en) 1984-06-28 1984-06-28 Boost circuit for telephone terminal equipment

Country Status (1)

Country Link
JP (1) JPS6114566U (en)

Also Published As

Publication number Publication date
JPH0332130Y2 (en) 1991-07-08

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