JPS61145584A - Active matrix array - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an active matrix array in which a large number of active elements such as switching elements for driving a liquid crystal display, an EL (electroluminescent) display, etc. are arranged in a matrix on a substrate. It is something.

BACKGROUND OF THE INVENTION In the following, the active matrix array metal for driving a liquid crystal display will be explained.

FIG. 2 is a plan view showing a conventional configuration example of an active matrix array for driving a liquid crystal display. On an insulating substrate, vertical wiring 11 and horizontal wiring 12 are arranged to intersect with each other with an insulating layer interposed therebetween (hereinafter, a group of wiring in these two directions will be abbreviated as matrix wiring). 13 is an active element, for example, a thin film field effect transistor (hereinafter abbreviated as TPT), and a portion of the vertical wiring 11 and the horizontal wiring 12 are T F
These are the gate electrode 12 & of T13 and the source electrode 112L. 14 is a pixel electrode, and 142L forms a drain electrode of the FET 13. The above configuration forms an active matrix array for driving a conventional liquid crystal display (for example, NIKKEI ELECT
RONIC81984, 9, 10, P, 216).

In such an active matrix array for driving a liquid crystal display, the TFT 3 is switched by applying a scanning signal to the horizontal electrode 12 (gate bus), and the scanning signal is applied to the vertical electrode 11 (source bus). With conventional wiring that transmits image signals to both sides, if the wiring breaks again at one location, the necessary signal will no longer be transmitted at that location. (referred to as interruption). FIG. 3 is a diagram showing one horizontal wiring line in FIG. 2. It is assumed that the scanning signal to the horizontal wiring 21 is transmitted from left to right. A in Figure 3
If the horizontal wiring 21 is disconnected at a point, the image signal is
, 22b, and 220, the signal was transmitted only to 22&, and a linear image defect occurred on the right side of the disconnection point in the liquid crystal display.

Further, as liquid crystal displays become larger, the matrix and matrix wirings that transmit scanning signals and image signals to each pixel become very long. Furthermore, in the case of a liquid crystal display for displaying high-density images, the line width of the matrix wiring is several tens of micrometers and 8 degrees at the widest, and the matrix wiring is easily broken by small dust etc. during the manufacturing of the liquid crystal display. With conventional configurations, there is a high probability that disconnections in the matrix wiring will cause image defects.
It has been extremely difficult to manufacture large-area, high-density active matrix arrays with good yield without image defects.

SUMMARY OF THE INVENTION An object of the present invention is to provide an active matrix array that can reduce image defects caused by disconnections in matrix wiring and can be manufactured with high yield.

Means for Solving the Problems In order to solve the above-mentioned problems, the present invention provides a pattern in which the wiring group in at least one direction of the matrix wiring is made up of multiple columns of bus wiring of 1 gi and connected at multiple locations, and the wiring is connected at one location. Even if the wire is broken, the image signal and scanning signal are transmitted through the bypass, so that the image does not become a linear defect.

Function The present invention uses the above-mentioned plurality of rows of bus wiring as one set and uses patterned wiring that is connected at a plurality of locations, so that even if a disconnection occurs in the wiring, the probability of a linear image defect is extremely small, and the active matrix The manufacturing yield of the array is greatly improved.

Embodiments Hereinafter, embodiments of the present invention will be explained in more detail regarding the case of an active matrix array for driving a liquid crystal display.

FIG. 1 shows a first embodiment of the present invention. The vertical wiring 1 and the horizontal wiring 2 are matrix wirings that intersect with each other via an insulating layer, and are formed on an insulating substrate. The horizontal wiring 1 has two rows of bus wiring as one set, and has a ladder-like pattern connected at each pixel pitch. 3 is a TPT for switching, and a portion of the vertical wiring 1 and the horizontal wiring 2 serve as the gate electrode 2a and source electrode 1& of the TPT 3. 4 is a pixel electrode made of a transparent conductive film, and 4a forms the drain electrode of the TFT 3.

By forming the horizontal wiring 2 into a ladder shape, line defects in the horizontal image due to disconnection of the horizontal wiring are significantly reduced. FIG. 4 shows ladder-like wiring similar to the horizontal wiring shown in FIG. Although a disconnection is observed at point B in the first row of wiring 23, as can be understood from the figure, electrical signals such as scanning signals do not cease to be transmitted at point B. Also, although it depends on the shape of the ladder pattern, the increase in the overall resistance of the wiring 23 (resistance between both ends of the wiring) due to a disconnection at point B is extremely small. Even if there is one broken wire, the resistance is 1/6
It only increases by 408 degrees. Interruption of signals in ladder-like wiring occurs at point 0 and D at the same level of the ladder-like pattern, as shown in wiring 26.
This is limited to the case where a disconnection occurs at two points, such as a dot, and the probability of this occurring at the middle stage of a signal in a ladder-like wiring is extremely small.

Let's perform model calculations using Figure 5. A is conventional wiring, and b is ladder-like wiring. In both cases, m wires are made with a wire pitch width e. Here, it is assumed that one piece of dust was present during the formation of the wirings shown in FIGS. 6a and 6b.

A model calculation is performed assuming that a wire break occurs when the center of the dust is on a turn of the wire.

In the case of the conventional wiring shown in FIG. 6a, the probability P of signal interruption occurring in any one of the wiring groups is P,=:dx, where the line width (i-d).

On the other hand, in the ladder-like wiring shown in Figure 5, the line width is d'
In the case of a ladder-like pattern with n steps, any one of the wiring groups
The probability P2 that a signal interruption occurs in a book is P2=lx2iX(l
-1) X-L-×1.

The ratio of e wee nP and P2 is the number of wires m'1400. The number of steps n in the ladder pattern is 6.
40, and the ratio of line width to wiring pinch width is d'/e=1
/10. When d/+5:1/6 and the number of dust particles 4 is 100, the probability P2 of signal interruption occurring in the ladder-like wiring shown in Fig. 6 is the same as the probability P2 of signal interruption occurring in the conventional wiring shown in Fig. 6 1. The probability of interruption occurring is approximately 1/20,064 of P, and it is concluded that signal interruption is extremely unlikely to occur.

Furthermore, when considering a disconnection caused by a single piece of dust, signal interruption will not occur if the dust is as large as the line width of the pattern in Figure 4, but if the dust is as large as the width a of the ladder pattern in Figure 4. Even under the same manufacturing conditions as before, interruption of the active matrix array signal can be minimized by using ladder-like wiring.

Next, other embodiments of the present invention will be described.

FIG. 6 shows a second embodiment of the invention. The vertical wiring 31 and the horizontal wiring 32 are formed on an insulating substrate. Both the vertical wiring 31 and the horizontal wiring 32 are matrix wiring that crosses each other through an insulating layer. A ladder-like pattern is formed in which groups are connected at each pixel pitch.

33 is a TPT for switching, and horizontal wiring 32
A part of the vertical wiring 31 becomes the gate electrode 321L and the source electrode 31& of the 'l' FT 33.

34Fi is the image accumulation balance due to the transparent conductive film, and 3421 is T
It forms the drain electrode of FT33. In the second embodiment, for the same reason as in the first embodiment, the number of line defects in the image due to disconnections in the matrix wiring was significantly reduced.

Effects of the Invention The active matrix array according to the present invention has the effect of greatly reducing signal interruption due to breakage of matrix wiring due to dust or peeling during manufacturing, and is a large-area, high-density active matrix array without linear image defects. This has the effect of greatly improving the manufacturing yield of matrix arrays. Further, although the active matrix array for driving a liquid crystal display has been described in detail above, the present invention can bring about exactly the same effects as long as it has a KL display with homogeneous matrix wiring. Moreover, the following effects also occur. In other words, when forming, for example, a ladder-like pattern by photoetching using a photomask, even if there is a defect on the photomask, it will not adversely affect the actual operation of the active matrix for the same reason as in conventional methods. It can be made extremely small in comparison, and as a result, it also has the effect of reducing costs related to the production and management of photomasks.

[Brief explanation of drawings]

FIG. 1 is a plan view of a main part of an active matrix array according to an embodiment of the present invention, FIG. 2 is a plan view of a main part of a conventional active matrix array, and FIG. 3 is a partial plan view of the array shown in FIG. FIG. 4 is a partial plan view of the array of the present invention, FIGS. 6 a and b are wiring pattern diagrams of the conventional and present invention, and FIG.
The figure is a plan view of an array according to a second embodiment of the invention. 1.11.31...Vertical wiring, 2,12゜3
2... Horizontal wiring, 3,13.33...
・Active element. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
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Claims (2)

[Claims] (1) A first electrode wiring group and a second electrode wiring group that intersect with each other via an insulating film on an insulating substrate, and a plurality of active electrode wirings electrically connected to the first and second electrode wiring groups. In the active matrix array having an active matrix element, both or at least one of the first and second electrode wiring groups has a pattern in which a plurality of rows of bus wirings are connected as a set at a plurality of locations. active matrix array. (2) The active matrix array according to claim 1, wherein the active elements are thin film field effect transistors.