JPS6114160Y2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to a program timer for sequentially switching lighting patterns of lighting loads in buildings and factories depending on the time of day.

Conventional program timers of this type are capable of reading out and confirming the set time by switching the display section that displays the current time, but it is not possible to view the set times of multiple programs at the same time. However, in the case of lighting load pattern control that divides the day into periods such as early morning, morning, lunch break, afternoon, evening, and night, and sequentially switches off the lighting pattern, it is possible to It is not enough to check only the two off times, and it is extremely inconvenient if a large number of set times cannot be viewed at a glance. In addition, since lighting pattern programs have set times over a wide range of days throughout the day, the current time and the time being set may match during the time setting process, causing the lighting load and the controlled objects to be controlled together with the lighting load to There was a risk that the equipment would malfunction. The present invention aims to solve these problems.

The present invention will be explained in detail below with reference to the embodiment shown in FIG. 1 is a clock circuit, and the clock circuit 1 includes a clock generation circuit 4 consisting of a crystal oscillation circuit 2 and a frequency dividing circuit 3, a "minute" clock section 7 consisting of a decimal counter 5 and a hexadecimal counter 6, and a decimal counter. 8 and a binary counter 9, and a time display section 19 consisting of decoders 11 to 14 and light emitting diodes 15 to 18 for displaying numbers. It is designed to display the time by counting pulse Pm. 21a to 21h are time setting sections;
Each time setting section 21a to 21h is composed of four digital switches _{S1 to S4} .
The _S4 is a so-called thumbwheel switch, and is a program switch that allows you to retrieve the BCD code by rotating the dial. This digital switch S ₁ ~ _{S 4}
A DC power supply Vc is applied to the common terminal of the counters via a resistor _R1 , and each output terminal is connected to the output terminal of the corresponding counter 5, 6, 8, and ₉ via a backflow blocking diode D2. ing. When the time data set by the digital switches _S1 to _S4 of each time setting part 21a to 21h and the time data outputted from the clock circuit 1 match, the timer part T formed in this manner outputs a timer signal. output
It is now possible to obtain Ta~Th. That is, when the outputs of counters 5, 6, 8, and 9 corresponding to the turned-on contacts of digital switches _S1 to _S4 all reach H level, timer outputs Ta to Th become H level.
level. 22 is a hexadecimal counter, which counts the date change pulse P _D output from the clock circuit 1, that is, the pulse output from 23:59 to 0:00, and outputs each day of the week (day, month, etc.) to an output terminal.
...Saturday) and outputs day of the week signals Wa to Wg corresponding to Saturday.
Numerals 23a to 23g are light emitting diodes for displaying the day of the week, which are lit in response to the day of the week signals Wa to Wg, and are sequentially switched on and lit each time the date change pulse P _D is input. Reference numerals 25a to 25h denote gate circuits consisting of trisdate type RS flip-flops FF, and each day of the week signal Wa to Wg is applied to the enable terminal E of this flip-flop FF, respectively, to day selection switches 24a to 24a consisting of backflow blocking diodes _D3 and DIP switches. It is input via 24g. The set terminal S of the flip-flop FF receives timer outputs Ta to Th output from the timer section T.
is input, and a date change pulse P _D ' is input to the reset terminal R. 26a to 26b are output relay Ry and relay drive transistor Q
The switching circuit is controlled by the output Q of the flip-flop FF via a CR differentiation circuit. In the figure, 27 is a power supply circuit, 2
8a to 28d are switches for setting the time and day of the week, which are normally switched to the a side, and when switched to the b side, the time and day of the week setting are ready, and the push button switch 28 of the single pulse generation circuit 29
By pressing d, the "minute" timer 7, the "hour" timer 10, and the 7-ary counter 22 count the single pulse _P0 output from the single pulse generator 29, setting the current time. The day of the week is adjusted. The time setting units 21a to 21h are connected in parallel to each other and connected to the BCD outputs of hour and minute counters 5, 6, 7, and 8, and each output relay controls the lighting pattern of the lighting load. It is designed to be switched sequentially. In the embodiment shown in FIG. 1, the time setting section is provided with an output prohibition switch SW for cutting off the day of the week signal applied to the enable terminal E of each flip-flop FF, as a switch means for prohibiting the output of each flip-flop FF. ing.

Next, the operation of the embodiment shown in FIG. 1 will be explained.
Now, among the day selection switches 24a to 24g, the day selection switch 24a corresponding to Sunday is turned off, and the day selection switches 24b to 24b corresponding to other days of the week are turned off.
24g is turned on, the day of the week signals Wb to Wg output from the hexadecimal counter 22 from Monday to Saturday are sent to the enable terminal E of the flip-flop FF via the day selection switches 24b to 24g and the output inhibit switch SW. When the timer outputs Tb-Th applied and input to the set terminal S of flip-flop FF become H level, flip-flop FF is set. When flip-flop FF is set and output Q becomes H level, transistor _Q1 becomes conductive, output relay Ry is driven, and the load connected to the contacts of output relay Ry is controlled. Incidentally, the flip-flop FF is automatically reset every day by the date change pulse _PD . On the other hand, even if the day of the week signal Wa output from the heptad counter 22 goes high on Sunday, the day selection switch 24a remains off, so the enable terminal E of the flip-flop FF of the gate circuit 25a remains at the low level. The output Q of the flip-flop FF remains in high impedance even when the timer outputs Ta to Th are input to the set terminal S, and the transistor _Q1
is not conductive and output relay Ry is not driven. Therefore, the load will not operate on Sunday.

When programming the set time, turn off the output inhibit switch SW, rotate the digital switches S ₁ to _{S 4} of each time setting section to set the desired time, and make sure that the time settings of all time setting sections are set. Once completed, turn the switch SW back on.

In the embodiment shown in FIG. 2, a switch means for inhibiting the output of the flip-flop FF is provided on the reset terminal R side, and the time setting section is configured to reset each flip-flop FF by means of the output inhibit switch SW and the RS flip-flop _FF2 . The terminal R is forcibly held at the "H" level.
_D6 is a loop prevention diode, and the other parts of the circuit are the same as in FIG. The basic movement is the first
Although the circuit is the same as that shown in the figure, in order to prevent the above-mentioned malfunction, a switch SW is turned on in the time setting section to set the flip-flop _FF2 , and the output terminal Q is set to the "H" state. As a result, the flip-flop FF of each gate circuit is in a reset state, and even if there is an input to the set terminal S, the output terminal Q
remains at “L” and never becomes “H”. If the reset terminal R of the flip-flop _FF2 is brought into the H state after an appropriate period of time, the output inhibited state of the flip-flop FF is released. However, once you switch
When the SW is turned on, the time set for output until the next time flip-flop _FF2 is reset is skipped without being output.

The present invention is constructed as described above, and the BCD output of each counter of the clock circuit is connected to the BCD terminal of each digital switch provided in a plurality of time setting sections via a backflow blocking diode, and each digital switch is Since the common terminal of the circuit is connected to the DC power supply and the set input of the flip-flop, multiple coincidence detection circuits between the current time and the set time can be realized with a simple circuit configuration, and the advantage is that all set times can be viewed at a glance. Also, since it is equipped with a switch means that inhibits the output of the flip-flop when setting the time, it prevents malfunction of the load due to a coincidence between the set time and the current time when programming a lighting pattern over a wide time range. It has the advantage of being possible.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of one embodiment of the present invention, and FIG. 2 is a circuit diagram of main parts of another embodiment. 1 is a clock circuit, 5 and 6 are minute counters,
7 and 8 are hour counters, 21a to 21h are time setting units, 26a to 26h are switching circuits,
S ₁ to _{S 4} are digital switches, Vc is DC power supply, FF
is a flip-flop, and SW is an output inhibit switch.

Claims (1)

[Scope of utility model registration request] Connect the BCD output of each counter in the clock circuit to the BCD terminal of each digital switch provided in the time setting section via a reverse current blocking diode, and connect the common terminal of each digital switch to the DC power supply and the set input of the flip-flop. Then, the switching circuit is controlled by the output of the flip-flop, and multiple similar time setting sections are connected in parallel to the BCD output of each counter, and the lighting load is controlled by the switching circuit controlled by each time setting section. A program timer for controlling a lighting load pattern, which sequentially switches lighting patterns, and has a time setting section provided with a switch means for inhibiting output from the flip-flop.