JPS61139765A - Circuit for discriminating polarity of transformer winding - Google Patents

Circuit for discriminating polarity of transformer winding

Info

Publication number
JPS61139765A
JPS61139765A JP59262097A JP26209784A JPS61139765A JP S61139765 A JPS61139765 A JP S61139765A JP 59262097 A JP59262097 A JP 59262097A JP 26209784 A JP26209784 A JP 26209784A JP S61139765 A JPS61139765 A JP S61139765A
Authority
JP
Japan
Prior art keywords
transformer
pulse
output
circuit
winding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP59262097A
Other languages
Japanese (ja)
Other versions
JPH0418792B2 (en
Inventor
Fumiaki Ihara
文明 伊原
Yoshihisa Kaji
芳久 梶
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Telecom Networks Ltd
Original Assignee
Fujitsu Telecom Networks Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Telecom Networks Ltd filed Critical Fujitsu Telecom Networks Ltd
Priority to JP59262097A priority Critical patent/JPS61139765A/en
Publication of JPS61139765A publication Critical patent/JPS61139765A/en
Publication of JPH0418792B2 publication Critical patent/JPH0418792B2/ja
Granted legal-status Critical Current

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Abstract

PURPOSE:To eliminate the erroneous discrimination of polarity due to the discon nection of winding, by adding a pulse of an one-and-half cycle to the primary side of a transformer and discriminating the polarity of the winding of the transformer on the basis of the outputs of three flip-flop by a sampling pulse at every half cycle. CONSTITUTION:The pulse A or B of an one-and-half cycle from a pulse oscillator 7 is applied to the primary side of a transformer T and inputted to a comparator 3 while output C or D is inputted to an exclusive OR circuit 5. The output from the secondary side of the transformer T is inputted to the circuit 5 through a comparator 4 and, if the polarities of windings are same, a 0 level is outputted and, if reverse, an 1 level is outputted. Pulses h, i, j at every half cycle from a sampling elock generator 8 are respectively inputted to FF11, 12, 13 and, if the polarities of windings are same, all of the outputs of FF come to a 0 level and, if reverse, all of them come to an 1 level. When the winding is disconnected, voltage by the induction of a commercial power source is inducted to the secondary side of the transformer T and the outputs of FF come to 0, 1, 0 levels.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、トランス捲線の極性を判別するトランス捲線
極性判別回路の改良に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an improvement in a transformer winding polarity determining circuit that determines the polarity of a transformer winding.

上記トランス捲線極性判別回路では、誤まった極性判別
データが出力されず、1@線断の時はこれを示すデータ
が出力されることが望ましい。
It is desirable that the transformer winding polarity determination circuit does not output erroneous polarity determination data, but outputs data indicating this when 1@ wire breakage occurs.

〔従来の技術〕[Conventional technology]

第5図は従来例のトランス捲線極性判別回路のブロック
図、第6図は第5図の回路の各部の波形のタイムチート
で(A)〜(D)は第5図の3〜6点に対応している。
Figure 5 is a block diagram of a conventional transformer winding polarity discrimination circuit, and Figure 6 is a time cheat of the waveforms of each part of the circuit in Figure 5. (A) to (D) are at points 3 to 6 in Figure 5. Compatible.

第7図は第5図のトランスTの捲線断線時の各部の波形
のタイl、チートである。
FIG. 7 shows waveform ties and cheats at various parts of the transformer T shown in FIG. 5 when the winding is broken.

図中1は交流発振器、2は1パルス発振器、3゜4は比
較器、5は排他的論理和回路、6はフリップフロップ(
以下FFと称す)、Tはトランスを示す。
In the figure, 1 is an AC oscillator, 2 is a 1-pulse oscillator, 3°4 is a comparator, 5 is an exclusive OR circuit, and 6 is a flip-flop (
(hereinafter referred to as FF), T indicates a transformer.

第5図において、トランスTの捲線の極性を判定するの
には、交流発振器1より第6図(A)に示す如き交流電
圧をトランスTの1次側に加えると共にこれを比較器3
に入力し、第6図(B)に示す如き波形の出力を得て排
他的論理和回路5に入力さす。
In FIG. 5, in order to determine the polarity of the winding of the transformer T, an AC voltage as shown in FIG.
6(B) to obtain an output with a waveform as shown in FIG. 6(B) and input it to the exclusive OR circuit 5.

一方トランスTの2次側よりは、捲線の極性が同じであ
れば、第6図(A(と同じ波形の電圧を出力し、比較器
4よりは第6図(B)と同じ波形の出力を得、トランス
Tの捲線の極性が逆であれば第6図(C)に示す如き波
形の出力を得排他的論理和回路5に入力する。
On the other hand, if the winding polarities are the same, the secondary side of the transformer T outputs a voltage with the same waveform as shown in Figure 6 (A), and the comparator 4 outputs a voltage with the same waveform as shown in Figure 6 (B). If the polarity of the winding of the transformer T is reversed, an output with a waveform as shown in FIG. 6(C) is obtained and input to the exclusive OR circuit 5.

従って、排他的論理和回路5よりは、捲線の極性が同じ
であれば、連続して0レベルが出力され、極性が逆であ
れば連続してルベルが出力されFF6のD端子に入力す
る。
Therefore, if the polarities of the windings are the same, the exclusive OR circuit 5 continuously outputs the 0 level, and if the polarities are reversed, the level is continuously output and input to the D terminal of the FF 6.

FF6のCLK端子には、第6図(A)に示す波形の略
中央にて、1パルスのパルスを出力する1パルス発振器
2より、第6図CD)に示す如きパルスが入力しており
、D端子に人力したレベルをたたくのでFF6よりは、
捲線の極性が同じであればOレベルを、極性が逆であれ
ばルベルが出力される。
A pulse as shown in FIG. 6 (CD) is input to the CLK terminal of the FF 6 from the 1-pulse oscillator 2 that outputs 1 pulse at approximately the center of the waveform shown in FIG. 6 (A). Since the level manually applied to the D terminal is hit, it is better than FF6.
If the polarities of the windings are the same, an O level is output, and if the polarities are opposite, a level is output.

これは1パルス発振器2の出力パルスが、第6図(D)
のイの場合の如く、第6図<A)の十電圧の中央に位置
する場合でも、口に示す第、6図(A)の−電圧の中央
に位置する場合でもFF6よりは同じレベルのデータが
出力され、特に1パルス発振器2のパルスは交流電圧の
+側−側を意識しなくても、捲線の極性が判別される。
This means that the output pulse of the 1-pulse oscillator 2 is shown in Fig. 6 (D).
Even if it is located in the center of the 10 voltages in Figure 6 < A), as in the case of A in Figure 6, even if it is located in the middle of the - voltage in Figure 6 (A) shown in Figure 6, the voltage will be at the same level than FF6. Data is output, and in particular, the polarity of the winding of the pulse of the one-pulse oscillator 2 can be determined without being aware of the positive and negative sides of the AC voltage.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

しかしながら、トランスTの捲線が断線していると、商
用電源よりの誘導により2次側には第7図(B)に示す
如き電圧が誘導され、比較器4の出力は第7図(C)の
如くなり、比較器3の出力は第7図(A)に示す如く第
6図(B)と同じであるので、排他的論理和回路5の出
力は、比較器3の出力がハの場合はθレベルで、二の場
合はルベルとなり、FF6のD端子に入力する。
However, if the winding of the transformer T is disconnected, a voltage as shown in Figure 7 (B) is induced on the secondary side due to induction from the commercial power supply, and the output of the comparator 4 is as shown in Figure 7 (C). As shown in FIG. 7(A), the output of the comparator 3 is the same as that in FIG. 6(B), so the output of the exclusive OR circuit 5 is is the θ level, and 2 is the level, which is input to the D terminal of FF6.

従って、■パルス発振器2の出力にてFF6のD端子へ
の入力をたたいた場合、第7図イに示すパルスでたたい
た場合はFF6の出力は0レベルでトランスTの捲線の
極性は同じと判断され、第7図口に示すパルスでたたい
た場合はFF6の出力はルベルで捲線の極性は逆と判断
される。
Therefore, if the input to the D terminal of FF6 is struck with the output of the pulse oscillator 2, and the pulse shown in Figure 7A is struck, the output of FF6 will be at 0 level and the polarity of the winding of the transformer T will be If it is determined that they are the same, and the pulse shown at the beginning of FIG.

即ち捲線断が判別出来ないと共に同じトランスであるに
かかわらず捲線の極性を2通りに判断される問題点があ
る。
That is, there are problems in that it is not possible to determine if the winding is broken, and the polarity of the winding can be determined in two ways even though the transformer is the same.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点は、トランスの1次側に1サイクル半のパル
スを加え、このパルスと、2次側に発生するパルスとを
夫々アースレベルと比較する比較器を介し、排他的論理
和回路に人力させ、その出力を3つのフリップフロップ
に入力させ、又該3つのフリップフロップの各々のクロ
ック端子に、上記1サイクル半のパルスの半サイクル毎
の各々のサンプリングパルスを夫々入力させ、該3つの
フリップフロップの出力によりトランス捲線の極性を判
別するようにした本発明のトランス捲線極性判別回路に
より解決される。
The above problem can be solved by applying a pulse of one and a half cycles to the primary side of the transformer, and manually inputting the exclusive OR circuit via a comparator that compares this pulse with the pulse generated on the secondary side with the ground level. The output is inputted to three flip-flops, and each sampling pulse of each half cycle of the one-and-a-half cycle pulse is inputted to the clock terminal of each of the three flip-flops. This problem is solved by the transformer winding polarity determining circuit of the present invention, which determines the polarity of the transformer winding based on the output of the transformer winding.

〔作用〕[Effect]

本発明によれば、トランスが断線していなければ、3つ
のF’Fの出力よりは、捲線の極性に応じて全てルベル
又は0レベルが出力され、断線していれば、ルベル及び
0レベルが出力されるので、トランスの捲線の断線は判
別出来又誤った極性判別データを出力することもない。
According to the present invention, if the transformer is not disconnected, the three F'F outputs are all level or 0 depending on the winding polarity, and if the transformer is disconnected, the level and 0 are output. Therefore, disconnection of the winding of the transformer can be determined, and erroneous polarity determination data will not be output.

〔実施例〕〔Example〕

第1図は本発明の実施例のトランス捲線極性判別回路の
ブロック図、第2図は第1図の回路の各部の波形のタイ
ムチートで(A)、  (C)、  (E)、(G)〜
(J)は第1図のa、c、e、g〜j点に対応している
。第3図、第4図は第1図でトランスTの捲線断の場合
の各部の波形のタイムチートである。
FIG. 1 is a block diagram of a transformer winding polarity determination circuit according to an embodiment of the present invention, and FIG. 2 is a time cheat of waveforms of each part of the circuit in FIG. )~
(J) corresponds to points a, c, e, and g to j in FIG. 3 and 4 are time cheats of the waveforms of various parts when the winding of the transformer T in FIG. 1 is broken.

図中7は1サイクル半のパルス発振器、8は1サイクル
半のパルスのサンプリングクロック発生器、9はカウン
タ、10はデコー°ダ、11〜13はFF;14はアン
ド回路、15.16はノア回路を示し、尚全図を通じ同
一符号は同一機能のものを示す。
In the figure, 7 is a pulse oscillator with one and a half cycles, 8 is a sampling clock generator with one and a half cycle pulses, 9 is a counter, 10 is a decoder, 11 to 13 are FFs, 14 is an AND circuit, and 15.16 is a NOR The same reference numerals indicate the same functions throughout the drawings.

第1図の回路の動作を説明すると、1サイクル半のパル
ス発振器7よりは、第2図(A)又は(B)に示す如き
正負正又は負正負のパルスを出力しトランスTの1次側
に加えると共に比較器3に入力し第2図(C)又は(D
)に示す如き出力を排他的論理和回路5に入力さす。
To explain the operation of the circuit shown in FIG. 1, the one and a half cycle pulse oscillator 7 outputs positive/negative positive or negative/positive/negative pulses as shown in FIG. 2 (C) or (D
) is input to the exclusive OR circuit 5.

一方トランスTの2次側よりは、捲線の極性が同じであ
れば第2図(A)又は(B)と同じ波形のパルスを出力
し、逆であれば第2図(B)または(A)の波形のパル
スを出力し、比較器4に入力し、この出力よりは捲線の
極性が同じであれば第2図(C)または(D)のパルス
が出力され、逆であれば第2図(D)または(C)のパ
ルスが出力され、排他的論理和回路5に入力するので、
捲線の極性が同じであれば、排他的論理和回路5の出力
よりは第2図(E)に示す如き0レベルが出力され、逆
であればルベルが出力されFF−11,12,13のD
端子に入力する。
On the other hand, from the secondary side of the transformer T, if the winding polarities are the same, a pulse with the same waveform as that shown in Figure 2 (A) or (B) will be output; if the polarity is reversed, a pulse with the same waveform as that shown in Figure 2 (B) or (A ) is output and input to the comparator 4. If the polarities of the windings are the same, the pulse of FIG. 2 (C) or (D) is output; if the polarity is opposite, the pulse of Since the pulse shown in figure (D) or (C) is output and input to the exclusive OR circuit 5,
If the polarities of the windings are the same, the output of the exclusive OR circuit 5 will output a 0 level as shown in FIG. D
input to the terminal.

又一方、1サイクル半パルスの半サイクル毎のサンプリ
ングクロックを発生する、サンプリングクロック発生器
8よりの第2図(G)に示す如き出力は、カウンタ9に
入力し、カウントされ、カウント値をデコーダ10に入
力し、デコーダ10の出力よりは第2図(H)(1)(
J)に示す如き1パルスのパルスに分離されたパルスが
出力し、夫々FFII、12.13のCLK端子に入力
し、D端子に入力しているレベルをたたくので、FF1
1.12.13の出力は、トランスTの捲線の極性が同
じであれば全て0レベルで、逆であれば全てルベルとな
る。
On the other hand, the output as shown in FIG. 2 (G) from the sampling clock generator 8, which generates a sampling clock for every half cycle of one half pulse, is input to the counter 9, where it is counted, and the count value is sent to the decoder. 10, and from the output of the decoder 10, it is shown in Figure 2 (H) (1) (
A pulse separated into one pulse as shown in J) is output and input to the CLK terminal of FFII and 12.13, respectively, and hits the level input to the D terminal, so FF1
The outputs of 1.12.13 will all be 0 level if the polarities of the windings of the transformer T are the same, and all outputs will be level level if the polarities are reversed.

従って、捲線の極性が同じであれば、ノア回路15の出
力の端子A1はルベルで、アンド回路14の出力、の端
子へ〇及びノア回路16の出力の端子A、は0レベルで
あり、逆であれば端子へ〇はルベルで他はOレベルとな
りトランスTの捲線の極性を判定出来る。
Therefore, if the polarities of the windings are the same, the terminal A1 of the output of the NOR circuit 15 is at the level, and the output of the AND circuit 14 and the terminal A of the output of the NOR circuit 16 are at 0 level, and vice versa. If so, 〇 to the terminal is a level, and the others are O level, and the polarity of the winding of the transformer T can be determined.

ここで、トランスTの捲線が断線しているとすると、ト
ランスTの2次側には商用電源よりの誘導により例えば
第3図(B)に示す如き電圧が誘導されれ、トランスT
の1次側に第3図(A)に示す如き1サイクル半のパル
スが入力しているとすると、この間は比較器4の出力は
ルベルであるので、排他的論理和回路5の出力は第3図
(C)に示す如<0.!、0レベルとなり、FFII。
Here, if the winding of the transformer T is disconnected, a voltage as shown in FIG. 3(B) will be induced on the secondary side of the transformer T by induction from the commercial power supply, and
Assuming that a pulse of one and a half cycles as shown in FIG. 3(A) is input to the primary side of the As shown in Figure 3 (C) <0. ! , it becomes 0 level and FFII.

12.13に入力し、このレベルをデコーダ10よりの
第2図(H)(I)(J)に示すパルスでたたくと、F
FII、12.13の出力は0.1゜0レベルとなり、
アンド回路14の出力の端子へ〇はOレベル、ノア回路
15の出力の端子A1もOレベル、ノア回路16の出力
の端子A2はルベルとなり、トランスTの捲線の断線を
知らせ、捲線の極性の判別はしないので、捲線断はわか
り又誤った極性判別はしない。
12.13 and hit this level with the pulses shown in FIG. 2 (H), (I), and (J) from the decoder 10, F
The output of FII, 12.13 is 0.1°0 level,
〇 to the output terminal of the AND circuit 14 is at O level, the output terminal A1 of the NOR circuit 15 is also at O level, and the output terminal A2 of the NOR circuit 16 is at the level. Since no discrimination is made, winding breaks can be detected and polarity will not be incorrectly determined.

尚ここで、第4図(B)に示す如く商用電源より誘導さ
れる電圧の0クロス点が、第4図(A)に示す1サイク
ル半パルスと一致した場合は比較器4及び3の出力は第
4図(C)(D)に示す如くなり、排他的論理和回路5
の出力は(E)に示す如<0.0.lになったり、(F
)に示す如く1.0.1になったりするが、必ずO及び
ルベルが出力されるので端子A2はルベル他端子はOレ
ベルとなり断線は検出され、極性は判別されない。
Here, if the zero cross point of the voltage induced from the commercial power supply as shown in Fig. 4 (B) coincides with the one-cycle and half pulse shown in Fig. 4 (A), the outputs of comparators 4 and 3 is as shown in FIG. 4(C)(D), and the exclusive OR circuit 5
The output of <0.0. is shown in (E). l or (F
1.0.1 as shown in ), but since O and Lebel are always output, the terminal A2 is Lebel and the other terminals are O level, a disconnection is detected and the polarity is not determined.

しかし、発振器7の出力が1サイクルのパルスであった
とすると、排他的論理和回路5の出力が0.0となるこ
とがあり、これでは断線が検出されず、又誤った極性判
別がされるので発振器7の出力は1サイクル半としであ
る。
However, if the output of the oscillator 7 is a one-cycle pulse, the output of the exclusive OR circuit 5 may become 0.0, and in this case, a disconnection is not detected and the polarity is incorrectly determined. Therefore, the output of the oscillator 7 is one and a half cycles.

〔発明の効果〕〔Effect of the invention〕

以上詳細に説明せる如く本発明によれば、トランスの捲
線の断線が検出出来又誤った捲線の極性判別データが出
力されない効果がある。
As described in detail above, according to the present invention, there is an effect that disconnection of the winding of the transformer can be detected and that erroneous winding polarity determination data is not output.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の実施例のトランス捲線極性判別回路の
ブロック図、 第2図は第1図の回路の各部の波形のタイムチート、 第3図第4図は第1図でトランスTの捲線断の場合の各
部の波形のタイムチート、 第5図は従来例のトランス捲線極性判別回路のブロック
図、 第6図は第5図の回路の各部の波形のタイムチート、 第7図は第5図のトランスTの捲線断線時の各部の波形
のタイムチートである。 図において、 lは交流発振器、 2は1パルス発振器、 3.4は比較器、 5は排他的論理和回路、 6.11.’12.13はフリップフロップ、7は1サ
イクル半のパルス発振器、 8はサンプリングクロック発生器、 9はカウンタ、 10はデコーダ、 14はアンド回路、 15.16はノア回路、 Tはトランスを示す。 第2I21 (E)。、t’+t。 (6r)    JLrヒ」− CH)   −ロー (1)   −一1−一 (J)−一−1− 晃3 図 弗4図 (f)  「Uユ 第5 図 イ     ロ 第7図 ハ イ    ロ
Fig. 1 is a block diagram of a transformer winding polarity discrimination circuit according to an embodiment of the present invention, Fig. 2 is a time cheat of waveforms of various parts of the circuit of Fig. 1, Fig. Figure 5 is a block diagram of a conventional transformer winding polarity determination circuit. Figure 6 is a time cheat of waveforms at each part of the circuit in Figure 5. Figure 7 is a time cheat of waveforms at various parts in the case of winding breakage. This is a time cheat of the waveforms of various parts when the winding of the transformer T shown in Figure 5 is broken. In the figure, l is an AC oscillator, 2 is a 1-pulse oscillator, 3.4 is a comparator, 5 is an exclusive OR circuit, 6.11. '12.13 is a flip-flop, 7 is a one and a half cycle pulse oscillator, 8 is a sampling clock generator, 9 is a counter, 10 is a decoder, 14 is an AND circuit, 15.16 is a NOR circuit, and T is a transformer. 2nd I21 (E). , t'+t. (6r) JLrhi"-CH) -Low (1) -11-1(J)-1-1- Akira 3 Figure 4 Figure 4 (f)

Claims (1)

【特許請求の範囲】[Claims] トランスの1次側に1サイクル半のパルスを加え、この
パルスと、2次側に発生するパルスとを夫々アースレベ
ルと比較する比較器を介し、排他的論理和回路に入力さ
せ、その出力を3つのフリップフロップに入力させ、又
該3つのフリップフロップの各々のクロック端子に、上
記1サイクル半のパルスの半サイクル毎の各々のサンプ
リングパルスを夫々入力させ、該3つのフリップフロッ
プの出力によりトランス捲線の極性を判別するようにし
たことを特徴とするトランス捲線極性判別回路。
A pulse of one and a half cycles is applied to the primary side of the transformer, and this pulse and the pulse generated on the secondary side are input to an exclusive OR circuit via a comparator that compares each with the ground level, and the output is Three flip-flops are input, and each half-cycle sampling pulse of the one-and-a-half cycle pulse is input to the clock terminal of each of the three flip-flops, and the output of the three flip-flops causes a transformer to A transformer winding polarity determining circuit characterized in that the polarity of the winding is determined.
JP59262097A 1984-12-12 1984-12-12 Circuit for discriminating polarity of transformer winding Granted JPS61139765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59262097A JPS61139765A (en) 1984-12-12 1984-12-12 Circuit for discriminating polarity of transformer winding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59262097A JPS61139765A (en) 1984-12-12 1984-12-12 Circuit for discriminating polarity of transformer winding

Publications (2)

Publication Number Publication Date
JPS61139765A true JPS61139765A (en) 1986-06-27
JPH0418792B2 JPH0418792B2 (en) 1992-03-27

Family

ID=17370990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59262097A Granted JPS61139765A (en) 1984-12-12 1984-12-12 Circuit for discriminating polarity of transformer winding

Country Status (1)

Country Link
JP (1) JPS61139765A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009236662A (en) * 2008-03-27 2009-10-15 Takaoka Electric Mfg Co Ltd Method of testing transformer for gauge
CN104749480A (en) * 2015-03-08 2015-07-01 国家电网公司 Whole-set secondary circuit polarity testing device used for relay protection
WO2016026231A1 (en) * 2014-08-22 2016-02-25 江苏省电力公司常州供电公司 Intelligent polarity detection apparatus and method for four-star type voltage transformer
CN113552433A (en) * 2021-07-21 2021-10-26 国网河南省电力公司直流运检分公司 Method for measuring polarity of extra-high voltage transformer bushing

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009236662A (en) * 2008-03-27 2009-10-15 Takaoka Electric Mfg Co Ltd Method of testing transformer for gauge
WO2016026231A1 (en) * 2014-08-22 2016-02-25 江苏省电力公司常州供电公司 Intelligent polarity detection apparatus and method for four-star type voltage transformer
CN104749480A (en) * 2015-03-08 2015-07-01 国家电网公司 Whole-set secondary circuit polarity testing device used for relay protection
CN113552433A (en) * 2021-07-21 2021-10-26 国网河南省电力公司直流运检分公司 Method for measuring polarity of extra-high voltage transformer bushing
CN113552433B (en) * 2021-07-21 2022-08-09 国网河南省电力公司直流运检分公司 Method for measuring CT polarity of extra-high voltage transformer bushing

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