JPS6096049A - Fault locating system - Google Patents

Fault locating system

Info

Publication number
JPS6096049A
JPS6096049A JP58204015A JP20401583A JPS6096049A JP S6096049 A JPS6096049 A JP S6096049A JP 58204015 A JP58204015 A JP 58204015A JP 20401583 A JP20401583 A JP 20401583A JP S6096049 A JPS6096049 A JP S6096049A
Authority
JP
Japan
Prior art keywords
signal
pseudo random
circuit
terminal
pseudo
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58204015A
Other languages
Japanese (ja)
Inventor
Toshiyuki Morita
森田 俊之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP58204015A priority Critical patent/JPS6096049A/en
Publication of JPS6096049A publication Critical patent/JPS6096049A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B17/00Monitoring; Testing
    • H04B17/40Monitoring; Testing of relay systems

Abstract

PURPOSE:To attain ease of fault location by disconnecting transmission of a main signal when a digital radio line is disconnected, transmitting only a pseudo random signal from a transmission section and allowing a relay station to compare the detected pseudo random signals mutually to discriminate faulty section. CONSTITUTION:In applying 0 to a terminal 30, a data signal and a pseudo random signal PNo transmitted from terminals 3, 4 of a speed converter 1 to terminals 22, 23 are blocked at AND circuits 31, 32 and 33 and two pseudo random signals PNt only shifted by n-bit each is outputted externally from output terminals 22, 23. A pseudo random signal supplied to a terminal 43 among pseudo random signals of two channels supplied to input terminals 42 and 43 is subject to n-bit delay at a delay circuit 2 and made in phase to the pseudo random signal supplied to the terminal 42. The two pseudo random signals are fed to an EX-OR circuit 44, its output is fed to a time counting circuit 45 so as to discriminate the presence of fault.

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は障害探索方式に係り、特にディジタル無線中継
方式の場合に使用する障害探索方式に関するものである
DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present invention relates to a fault detection method, and particularly to a fault detection method used in a digital wireless relay method.

(bl 従来技術と問題点 第1図(alはディジタル無線方式に用いられているス
クランブル回路を、第1図(b)はデスクランブル回路
の一般的な構成を示す。
(bl) Prior Art and Problems FIG. 1 (al shows a scrambling circuit used in a digital wireless system, and FIG. 1(b) shows a general configuration of a descrambling circuit.

第1図(a)に示すスクランブル回路の入力側は搬送端
局に出力側は変調器に接続されている(till送端局
及び変調器は図示せず)。
The input side of the scrambling circuit shown in FIG. 1(a) is connected to a carrier terminal station, and the output side is connected to a modulator (the transmitting terminal station and modulator are not shown).

同図に於て、搬送端局より入力端子20及び21に加え
られた例えば140Mビット/秒の2値のデータ信号2
チヤンネルは、速度変換器1で打合せ信号や制御信号な
どを挿入されて例えば141Mビット/秒のデータ信号
に変換された後、エクスクル−シブ・オア(以下EX−
ORと省略)回路5及び6に加えられる。
In the figure, a binary data signal 2 of, for example, 140 Mbit/sec is applied to input terminals 20 and 21 from a carrier terminal station.
The channel is converted into a data signal of, for example, 141 Mbit/s by inserting a meeting signal, a control signal, etc. in the speed converter 1, and is then converted into an exclusive OR (hereinafter EX-OR) signal.
(abbreviated as OR) is added to circuits 5 and 6.

一方、擬似ランダム信号発生器3よりの擬似ランダム信
号PN口よそ分割され、1部は直接に、残りは遅延回路
2を通ってnビット遅延させられそれぞれEX−OR回
路6及び5に加えられる。
On the other hand, the pseudo-random signal PN from the pseudo-random signal generator 3 is divided into two parts, one part being sent directly and the other being delayed by n bits through the delay circuit 2 and applied to the EX-OR circuits 6 and 5, respectively.

そこで、2チヤンネルのデータ信号はH4Wランダ信号
PNtとEX−ORが取られる事によりスクランブルさ
れるが、それぞれのデータ信号に加えられる擬似ランダ
立信号はnビットずれているので互いに無相関になる。
Therefore, the data signals of the two channels are scrambled by performing EX-OR with the H4W random signal PNt, but since the pseudo random rising signals added to each data signal are shifted by n bits, they become uncorrelated with each other.

更に、アンド回路7でチャンネル2の信号に前記の擬似
ランダム信号PNtの周期に合わせて、擬似ランダム信
号発生器4よりの擬似ランダム信号PN、oを挿入し、
この擬似ランダム信号PNoは同期信号として使用され
る。
Furthermore, the AND circuit 7 inserts the pseudorandom signal PN,o from the pseudorandom signal generator 4 into the signal of channel 2 in accordance with the period of the pseudorandom signal PNt, and
This pseudorandom signal PNo is used as a synchronization signal.

そして、端子22及び23から取出されたスクランブル
されたデータ信号は変調部2周波数変換部など(図示せ
ず)を通った後、空中線から相手局に送られる。
The scrambled data signals taken out from the terminals 22 and 23 pass through a modulator 2, a frequency converter, etc. (not shown), and then are sent from the antenna to the other station.

一方、第1図中)に示すデスクランブル回路の入力側は
受信機の復調器(図示せず)に、出方側は搬送端局(図
示せず)に接続されている。
On the other hand, the input side of the descrambling circuit shown in FIG. 1 is connected to a receiver demodulator (not shown), and the output side is connected to a carrier terminal station (not shown).

ここで、端子24及び25に加えられたディジタル信号
の一部は受信側の同期回路1oで、このディジタル信号
に挿入された同期信号PNoを検出し同期が確立したら
、確立したと云う信号で擬似ランダム信号発生器12の
動きを送信側の擬似ランダム信号発生器2に同期させる
Here, a part of the digital signal applied to the terminals 24 and 25 is detected by the synchronization circuit 1o on the reception side, which detects the synchronization signal PNo inserted into this digital signal, and when synchronization is established, a pseudo signal is generated to indicate that synchronization has been established. The movement of the random signal generator 12 is synchronized with the pseudo-random signal generator 2 on the transmitting side.

そこで、EX−(IR回路8及び9でこの擬似ランダム
信号発止器12からの擬似ランダム信号PNrを用いて
受信されたデータ信号とEX−ORが取られる事により
デスクランブルをかけ、更に速度変換器13で伝送速度
を変換して元の140hビット/秒の信号2チヤンネル
のデータ信号が端子26及び27から取り出される。
Therefore, EX-(IR circuits 8 and 9 perform descrambling by performing EX-OR with the received data signal using the pseudo-random signal PNr from the pseudo-random signal generator 12, and further speed conversion. The transmission rate is converted by the converter 13, and the original two-channel data signal of 140 h bits/second is taken out from the terminals 26 and 27.

ここで、2分割された擬(Glランダム信号PNrの1
部はnビット遅延回路11を通してgx−oR回路8に
、残りは直接EX−OR回路9に供給される。
Here, 1 of the pseudo(Gl random signal PNr divided into two)
part is supplied to the gx-oR circuit 8 through the n-bit delay circuit 11, and the remaining part is supplied directly to the EX-OR circuit 9.

尚、中継局に於ける中継動作は再生中継で行われる事が
多いので、受信部復調器出力のスクランブルされたデー
タ信号はデスクランブルされる事なくそのまま送信部変
調器に送られる。
Incidentally, since the relay operation at the relay station is often performed by regenerative relay, the scrambled data signal output from the receiver demodulator is sent as is to the transmitter modulator without being descrambled.

次に、この様な構成のディジクル無線装置に障害が発生
した場合は端局より障害個所を探索しなければならない
Next, when a failure occurs in the digital radio device having such a configuration, the location of the failure must be searched from the terminal station.

従来、ディジタル中継方式の故障評定方式としては端局
から特定のパターン例えば1010・・を送出し、中継
局でこのパターンを検出する事により故障局を評定する
方法が実用化されてきた。
Conventionally, as a failure evaluation method for digital relay systems, a method has been put into practical use in which a terminal station transmits a specific pattern, for example 1010, and a relay station detects this pattern to evaluate a failed station.

即ち、故障がなければ全てが正しく検出できるが、検出
できないか又は検出されたパターンが1010・・でな
い場合は障害と判断される。
That is, if there is no failure, everything can be detected correctly, but if it cannot be detected or the detected pattern is not 1010, etc., it is determined that there is a failure.

ここで、多値変調方式等の場合は(Sinx/x )で
表される変調スペクトラムを持っているが、フェージン
グ等でこれが歪んだ時に、この変調スペクトラムの一部
を抽出し信号等化やスペースダイハシティ等の信号合成
を行って元のスペクトラムになる様にしているので、特
定パターンを挿入する方法では変調スペクトラムが線ス
ペクトラムとなり上記の動作が不安定になるので、多値
変調方式等には適用できないと云う問題があった。
In the case of multilevel modulation, etc., there is a modulation spectrum represented by (Sinx/x), but when this is distorted due to fading etc., a part of this modulation spectrum is extracted and used for signal equalization and space saving. Since signal synthesis such as dihacity is performed to obtain the original spectrum, the method of inserting a specific pattern will turn the modulation spectrum into a line spectrum and the above operation will become unstable, so multilevel modulation etc. There was a problem that it could not be applied.

(C) 発明の目的 本発明は上記従来技術の問題に鑑みなされたものであっ
て、擬似ランダム信号を使用して容易に故障評定を行う
ことができる障害探索方法を提供することを目的として
いる。
(C) Purpose of the Invention The present invention has been made in view of the problems of the prior art described above, and an object of the present invention is to provide a fault search method that can easily perform fault evaluation using pseudo-random signals. .

(dl 発明の構成 上記発明の目的は擬似ランダム信号でスクランブルされ
た主信号で変調された変調波を送信部から送出するディ
ジタル無線中継方式に於て、ディジタル無線回線が断に
なった時に該主信号の伝送を断にして該擬似ランダム信
号のみを送信部より送出し中継局では検出された該擬似
ランダム信号を相互に比較する事により障害区間を判定
する事を特徴とする障害探索方式を提供する事より達成
される。
(dl.Structure of the Invention The purpose of the above invention is to provide a digital radio relay system in which a modulated wave modulated with a main signal scrambled with a pseudo-random signal is sent from a transmitter, when the digital radio line is disconnected. Provided is a fault search method characterized in that signal transmission is cut off, only the pseudo-random signal is sent from the transmitter, and the fault section is determined by mutually comparing the detected pseudo-random signals at the relay station. It is achieved by doing.

(e) 発明の実施例 第2図及び第3図は本発明を実施する為の一例で、第2
図はスクランブル回路を示す。
(e) Embodiment of the invention Figures 2 and 3 are examples for carrying out the present invention.
The figure shows a scrambling circuit.

図中、1は速度変換器を、2は遅延回路を、3及び4は
それぞれ擬似ランダム信号発生器を、5及び6はEX−
OR回路を、7,31〜33ばそれぞれアンド回路を、
20〜23.30はそれぞれ端子を示す。
In the figure, 1 is a speed converter, 2 is a delay circuit, 3 and 4 are pseudo random signal generators, and 5 and 6 are EX-
OR circuit, 7, 31 to 33 respectively AND circuit,
20 to 23.30 indicate terminals, respectively.

尚、第1図と同一の記号は同一の部分を示す。Note that the same symbols as in FIG. 1 indicate the same parts.

これら各ブロックは次の様に接続されている。These blocks are connected as follows.

速度変換器lの端子(l)及び(2)はそれぞれ端子2
0及び21ト、端子(31は77F回路31. EX−
01i回路5を介して端子22と、端子(4)はアンド
回路32. EX〜OR回路6.アンド回路7を介して
端子23と、端子30はアンド回路31,32.33の
別の端子とそれぞれ接続される。
Terminals (l) and (2) of speed converter l are respectively terminal 2
0 and 21, terminal (31 is 77F circuit 31.EX-
01i circuit 5 to terminal 22, and terminal (4) to AND circuit 32. EX~OR circuit 6. The terminal 23 and the terminal 30 are connected to other terminals of the AND circuits 31, 32, and 33 via the AND circuit 7, respectively.

又、擬似ランダム信号発生器3の端子(1)は遅延回路
2を介してEX−OR回路5及び直接にEX−OR回路
6と、擬似ランダム信号発生器4の端子(1)はアンド
回路33を介してアンド回路7とそれぞれ接続される。
Further, the terminal (1) of the pseudo-random signal generator 3 is connected to the EX-OR circuit 5 and directly to the EX-OR circuit 6 via the delay circuit 2, and the terminal (1) of the pseudo-random signal generator 4 is connected to the AND circuit 33. are connected to the AND circuit 7 via the respective AND circuits.

この様に接続された送信側の動作は次の様である。The operation of the transmitting side connected in this way is as follows.

先ず、端子30にOを加えると速度変換器1の端子(3
)及び(4)より端子22および23に送られているデ
ータ信号及び擬似ランダム信号PNoはアンド回路31
 、32及び33で阻止され、互いにnビットずれた2
つの擬似ランダム信号PNtのみが出力端子22及び2
3より外部に出力される。
First, when O is applied to terminal 30, the terminal (3
) and (4) to the terminals 22 and 23, the data signal and pseudorandom signal PNo are sent to the AND circuit 31.
, 32 and 33, and are shifted by n bits from each other.
Only one pseudo-random signal PNt is present at the output terminals 22 and 2.
3 is output to the outside.

第3図は中継局の構成を示した図で、第4図は第3図の
動作を説明する為の図である。
FIG. 3 is a diagram showing the configuration of the relay station, and FIG. 4 is a diagram for explaining the operation of FIG. 3.

そこで、第4図を参照しながら第3図の動作を説明する
Therefore, the operation shown in FIG. 3 will be explained with reference to FIG. 4.

第3図に於て、入力端子42及び43に加えられた2チ
ヤンネルの擬似ランダム信号のうち端子43に加えられ
た擬似ランダム信号は、遅延回路2でnピント遅延され
て端子42に加えられた擬似ランダム信号と同相になる
(第4図(a)C,D、E )。
In FIG. 3, among the two channels of pseudorandom signals applied to input terminals 42 and 43, the pseudorandom signal applied to terminal 43 is delayed by n pints in delay circuit 2, and then applied to terminal 42. It becomes in phase with the pseudo-random signal (Fig. 4(a) C, D, E).

これら2つの搬信ランダム信号はEX−OR回路44に
加えられ、その出力は時間計数回路45に加えられる。
These two carrier random signals are applied to an EX-OR circuit 44, the output of which is applied to a time counting circuit 45.

この時、障害の有無により時間計数回路45の状態は次
の様になる。
At this time, the state of the time counting circuit 45 is as follows depending on the presence or absence of a failure.

■ 通常のデータ伝送中の状態の時 第2図の端子30に0が加えられないので、第3図の端
子42及び43にはランダムな信号が入力される。そこ
でEX−OR回路44の出力端Fにはランダムなパルス
が出るので、例えば1oビツトの0連続を計測したら1
を出力する時間計測回路45は動作せず端子48は0に
なっている。
(2) Since 0 is not added to terminal 30 in FIG. 2 during normal data transmission, random signals are input to terminals 42 and 43 in FIG. 3. Therefore, random pulses are output to the output terminal F of the EX-OR circuit 44, so for example, if 10 bits of consecutive 0's are measured, 1
The time measurement circuit 45 that outputs the signal does not operate and the terminal 48 is set to 0.

■ 回線障害なしの時(第4図(a))第2図の端子3
0に0が加えると、前記の様にEX−OR回路44には
互いに同じパターンの擬似ランダム信号が加えられるの
で、EX−ORR回路の出力端FはOの連続となる(第
4(a)図F)。そこで、時間計測回路45はカウント
・アップし端子48はlが出る(第4図(alG )。
■ When there is no line failure (Figure 4 (a)) Terminal 3 in Figure 2
When 0 is added to 0, pseudo-random signals with the same pattern are applied to the EX-OR circuit 44 as described above, so the output terminal F of the EX-ORR circuit becomes a series of O's (4th (a) Figure F). Therefore, the time measuring circuit 45 counts up and l is output from the terminal 48 (FIG. 4 (alG)).

■ 回線障害の時(第4図(b)) 例えば端子42及び43に入力するデータ信号に誤りパ
ルスが発生する場合は通常のデータ伝送中と同じくラン
ダムな信号が加えられたのと同じになるので、F点には
1又はOの状態がランダムに現れる(第4図G)。
■ When there is a line failure (Figure 4 (b)) For example, if an error pulse occurs in the data signal input to terminals 42 and 43, it will be the same as if a random signal was added as during normal data transmission. Therefore, the state 1 or O appears randomly at point F (Fig. 4G).

しかし、前記の様に10ビツトのO連続がなければ1を
出力しないので時間計測回路45の出力は第4図(bl
 Gの様になる。
However, as mentioned above, unless there are 10 consecutive O bits, 1 is not output, so the output of the time measurement circuit 45 is as shown in FIG.
It becomes like G.

尚、0連続をいくつに取るかに依って時間計測回路の出
力の変動を少な(することが出来る。
Incidentally, it is possible to reduce fluctuations in the output of the time measuring circuit depending on how many consecutive zeros are taken.

第5図は本発明を実際の無線回線に適用した場合、判定
の方法を説明する為の図である。
FIG. 5 is a diagram for explaining a determination method when the present invention is applied to an actual wireless line.

同図に於て、1及び6を送信端局及び受信端局とし、2
〜5を中継局とする。
In the figure, 1 and 6 are transmitting terminal stations and receiving terminal stations, and 2
5 to 5 are relay stations.

同図に於て、監視信号ALより回線の異常を検知した受
信端局6より逆回線を使用して送信端局1に回線試験命
令を送る。これを受けた送信端局1では第2図の端子3
0に0を加える。
In the figure, the receiving terminal station 6 detects a line abnormality based on the monitoring signal AL and sends a line test command to the transmitting terminal station 1 using the reverse line. In the transmitting terminal station 1 that receives this, the terminal 3 in Fig. 2
Add 0 to 0.

そこで正常伝送路を通った中継局では前記の時間計測回
路45の出力は1になっているが、異常な伝送路、局を
通った後の局ではパルス列に乱れを生じ又は符号娯りを
発生する為に時間計測回路45の出力はOになる。例え
ば中継局3と4の間が障害になると中継局4以隆が0と
なる。
Therefore, the output of the time measurement circuit 45 is 1 at the relay station that has passed through the normal transmission line, but at the station after passing through the abnormal transmission line or station, the pulse train is disturbed or code distortion occurs. Therefore, the output of the time measurement circuit 45 becomes O. For example, if there is a failure between relay stations 3 and 4, relay station 4 or higher will become 0.

そこで受信端局6でこれらの情報を別に設けられた遠隔
監視装置で見ていると障害区間が3と4の間である事が
判る。
When this information is viewed at the receiving terminal station 6 using a remote monitoring device provided separately, it is found that the fault section is between 3 and 4.

以上の説明は2チヤンネルの擬似ランダム信号をEX−
OR回路44を通す事により誤り検出を行っているが、
図6図の様に1チヤンネルの擬像ランダム信号のフレー
ムを比較する事によっても前記と同じ動作をする事が出
来る。
The above explanation is based on the two-channel pseudorandom signal EX-
Although error detection is performed by passing the OR circuit 44,
The same operation as described above can be performed by comparing the frames of pseudo random signals of one channel as shown in FIG.

ここで、46は遅延回路であるが、遅延量は送出される
擬似ランダム信号の1フレームの長さに設定される。
Here, 46 is a delay circuit, and the amount of delay is set to the length of one frame of the pseudorandom signal to be sent out.

(fl 発明の詳細 な説明した様に、本発明によれば多値変弱方式等を用い
るディジタル無線方式ではデータ信号列に擬似ランダム
信号でスクランブルをかけているが、この擬似ランダム
信号を使用して故障評定をする様にした為に故障評定時
に於ても伝送路のスペクトラムを乱すことなく故障区間
の判定をする事ができる。
(fl As explained in detail about the invention, according to the present invention, in a digital radio system using a multilevel variable/weak method, etc., a data signal sequence is scrambled with a pseudo-random signal, but this pseudo-random signal is not used. Since the fault evaluation is carried out based on the fault evaluation, it is possible to judge the fault section without disturbing the spectrum of the transmission line even during the fault evaluation.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のスクランブル回路及びデスクランブル回
路を示す図を、第2図は本発明を実施する為のスクラン
ブラ回路図を、第3図は本発明を実施する為の中継局の
概略の回路図を、第4図は第j図の動作を説明する為の
図を、第5図は本発明を実施した時の判定を説明する為
の図を、第6図は別の実施例をそれぞれ示す。 章 3 目 第 4 口 (a) (b) 稟 5 k Gt 1 / 0 0 0 番 6 回
Fig. 1 is a diagram showing a conventional scramble circuit and descramble circuit, Fig. 2 is a scrambler circuit diagram for implementing the present invention, and Fig. 3 is a schematic diagram of a relay station for implementing the present invention. Figure 4 is a diagram for explaining the operation of Figure J, Figure 5 is a diagram for explaining the determination when implementing the present invention, and Figure 6 is for another embodiment. Each is shown below. Chapter 3 Item 4 Part 4 (a) (b) 5 k Gt 1 / 0 0 0 No. 6

Claims (1)

【特許請求の範囲】[Claims] 擬似ランダム信号でスクランブルされた主信号で変調さ
れた変調波を送信部から送出するディジクル無線中継方
式に於て、ディジタル無線回線が断になった時に咳主信
号の伝送を断にして該擬似ランダム信号のみを送信部よ
り送出し中継局では検出された該擬似ランダム信号を相
互に比較する事により障害区間を判定する事を特徴とす
る障害探索方式。
In a digital radio relay system in which a modulated wave modulated by a main signal scrambled with a pseudo-random signal is sent out from a transmitter, when the digital radio line is disconnected, the transmission of the cough main signal is interrupted and the pseudo-random signal is transmitted. A fault detection method characterized in that only a signal is sent from a transmitter and a relay station determines a fault section by comparing the detected pseudo-random signals with each other.
JP58204015A 1983-10-31 1983-10-31 Fault locating system Pending JPS6096049A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58204015A JPS6096049A (en) 1983-10-31 1983-10-31 Fault locating system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58204015A JPS6096049A (en) 1983-10-31 1983-10-31 Fault locating system

Publications (1)

Publication Number Publication Date
JPS6096049A true JPS6096049A (en) 1985-05-29

Family

ID=16483354

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58204015A Pending JPS6096049A (en) 1983-10-31 1983-10-31 Fault locating system

Country Status (1)

Country Link
JP (1) JPS6096049A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5034711A (en) * 1973-07-31 1975-04-03
JPS5269511A (en) * 1975-12-08 1977-06-09 Nec Corp Test pattern generator
JPS5854754A (en) * 1981-09-29 1983-03-31 Fujitsu Ltd Code error monitoring system

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5034711A (en) * 1973-07-31 1975-04-03
JPS5269511A (en) * 1975-12-08 1977-06-09 Nec Corp Test pattern generator
JPS5854754A (en) * 1981-09-29 1983-03-31 Fujitsu Ltd Code error monitoring system

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