JPS609159A - Semiconductor device - Google Patents

Abstract

PURPOSE:To improve a step coverage in a minute contact region while preventing the breakage of a junction, and to increase the degree of integration by interposing a metallic layer being in contact in an ohmic manner in the contact region and applying and forming an aluminum wiring layer on the metallic layer. CONSTITUTION:An insulating layer 11 formed on a substrate is bored, and windows for leading out electrodes are bored and treated to form contact regions 12. A silicide or a nitride consisting of a high melting-point metal shaping a barrier layer 13 is grown, and an Al wiring layer 14 is formed on the barrier layer 13. Consequently, a steep stepped section is removed, and a reaction between Si and Al and a reaction between Al and an insulator are inhibited and a contact region in desired width is obtained. Accordingly, an emitter electrode 15, a base electrode 16 and a collector electrode 17 are obtained by patterning the barrier layers 11 grown on the substrate in a sputtering manner and the Al layer 14, and a bipolar semiconductor element aiming at the increase of the degree of integration is acquired.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Technical Field of the Invention The present BA relates to high-density integrated circuits such as MOS or Bipor, and particularly relates to the formation of wiring layers effective for high integration.

(b) Background of the Technology Aluminum or an alloy of aluminum and silicon is often used as a general wiring layer material used in the circuit configuration of an integrated circuit board. Its major feature is that it has a low resistance value, excellent adhesion to silicon oxide films, etc., and can form ohmic contacts with p-type and n-swelled diffusion layers. However, since aluminum film causes a eutectic reaction with silicon, a eutectic alloy is formed at the interface where aluminum and the diffusion layer come into contact during repeated heat treatments during the semiconductor device process, causing deep etch pits in the silicon layer and causing junction breakdown. There are 7jK things to wake up.

This problem becomes more serious as the diffusion region becomes shallower as semiconductor devices become more highly integrated.

As a countermeasure against this problem, one effective method is to use a high melting point metal compound as a barrier material between the aluminum wiring layer and the silicon layer.

(c) Conventional technology and problems For example, in a bipolar semiconductor device that suffers from high integration due to shallow diffusion layers, it is necessary to form a thin epitaxial layer of I'i 2 to 3μ to form shallow base and emitter regions. Improved characteristics.

However, when forming electrodes, forming an aluminum contact with a shallow emitter poses a problem. A specific example thereof (see FIG. 1) will be explained.

FIG. 1 is a cross-sectional view showing a pace region and a resistance region in a conventional bipolar semiconductor device.

FIG. 1 shows a case where an n-type epitaxial layer is formed on a p-type substrate, and then a p-type diffusion layer 1 is formed in that layer. Further, n-swelling diffusion layers 2 and 3 are formed in this p-swelling diffusion layer 1 and in the adjacent region as shown in the figure to form p-type and n-swelling diffusion layers 1 to 3.
An emitter electrode 4, a base electrode 5, and a collector electrode 6 are formed thereon. The lead-out electrode is formed by opening the insulating film (PSG) 7 formed on the epitaxial layer by a known photoetching process, forming a thin aluminum film layer by sputtering, and then forming the film by wet or dry etching. A wiring layer is formed by removing the portion. In this case, in the shallow emitter region, repeated heat treatments cause a reaction between aluminum and silicon at the interface where the aluminum wiring I- and the silicon layer (n-swelling diffusion layer) contact, resulting in a deep focus 8 and causing destruction of the p-n junction. . Furthermore, as the integration becomes higher, the size of the contact area becomes smaller and smaller, so as shown in the figure, the thickness of the wiring layer on the side surface of the step becomes thinner than on the flat part, which increases the possibility of disconnection. In addition, the film deposited on the side of the step has a lower density than the film on the flat part.
Particularly in wet etching, if the etching rate is too high, step breaks are likely to occur.

A substrate heating method is an effective method for dealing with such damage. However, if sputtering is performed while heating the substrate, the aluminum wiring layer and the insulating film 7 on the side surface of the step will react to form an insulating aluminum compound (A120a), so the effective width of the contact area will be even smaller. Good contact becomes difficult to obtain.

(d) Purpose of the Invention In view of the above points, the present EA provides a wiring structure in which a metal layer that makes ohmic contact is interposed in the contact region, and an aluminum wiring layer is deposited on this metal layer. ,
The purpose is to improve the performance and increase the integration of semiconductor devices.

(e) Structure of the Invention According to the present invention, the above object is made of a refractory metal silicide or nitride which is in contact with the end face of the opening of the contact region on the substrate and covers the step side and bottom of the opening. This is achieved by forming an aluminum wiring layer on at least one barrier layer.

(f) Examples of the invention Embodiments of the present invention will be described in detail below with reference to all the drawings.

2 and 3 are cross-sectional views showing a semiconductor element having a wiring layer structure according to an embodiment of the present invention. FIG. 2 shows metal film formation, and FIG. 3 shows contact formation. It is.

In FIG. 2, an insulating film 11 formed on a substrate is opened in accordance with a well-known photo-etching process, and a contact region 12 is formed by opening a window for taking out an electrode. Next, a high melting point metal silicide forming the barrier layer 13 is formed by sputtering.
Or grow night rides. In this case, by applying a bias potential to the sample to be processed and simultaneously proceeding cis-butter growth and etching by the sputtering method, the thin layer 13 formed in the contact region 12 is formed in the contact region 1.
In order to cover the bottom surface (i.e., the interface in contact with the diffusion layer) and the step side surface (i.e., the interface in contact with the insulating film 11) of the opening 2, and to narrow the opening, it contacts the end surface 18 of the opening as shown in FIG. The barrier layer 13 is required to have ohmic contact with both the p-type and n-type diffusion layers and to act as a barrier to prevent silicon from migrating to the upper aluminum layer. is titanium nitride (TiN) or tantalum nitride (TaN)
Nitride of high melting point metal such as molybdenum silicide (
Silicides such as MoSi2) and tantalum silicide (TaSi2) are suitable. An aluminum wiring layer 14 is formed on this barrier layer 13 by sputtering.

As a result, the steep stepped portion unlike in the prior art is eliminated, and the reactions between silicon and aluminum and the reactions between aluminum and insulators are suppressed, and a contact region with a desired width can be obtained. If ohmic contact is insufficient with the barrier layer alone, a metal layer, such as a platinum silicon (PtSi) layer, which facilitates ohmic contact may be added below. By patterning the barrier layer 11 and the aluminum layer 14 grown on the substrate by sputtering,
As shown in the figure, an emitter electrode 15, a base electrode 16, and a collector electrode 17 are obtained, and a bipolar semiconductor device that achieves high integration is obtained. In this embodiment, a bipolar semiconductor device has been described, but it goes without saying that the present invention can also be applied to highly integrated circuit elements such as MO8 type ICs.

(g) Effects of the Invention As explained in detail above, by configuring the wiring layer shown in the present invention, step coverage in minute contact areas is improved, junction breakdown is completely prevented, and high integration becomes possible. It has a big effect.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a base region and a resistance region in a conventional bipolar semiconductor device, and FIG. FIG. 3 is a sectional view showing a semiconductor element having a wiring layer structure according to an embodiment of the present invention, FIG. 2 is a diagram showing metal film formation, and FIG. 3 is a diagram showing contact formation. In the figure, 11゛... oxide film, 12 contact window, 13
... Barrier layer, 14 ... Aluminum West e1 line Jfi, 15, i6, 17 Electrode, 18 Opening 91
Full face.

Claims (1)

[Claims] An aluminum wiring layer is formed on at least one barrier layer made of high melting point metal silicide or nitride that is in contact with the end surface of the opening in the contact region on the substrate and forms the step side and bottom surface of the opening. A semiconductor device characterized by: