JPS6090921U - Circuit to prevent interference waves from entering telephones - Google Patents

Circuit to prevent interference waves from entering telephones

Info

Publication number
JPS6090921U
JPS6090921U JP11868283U JP11868283U JPS6090921U JP S6090921 U JPS6090921 U JP S6090921U JP 11868283 U JP11868283 U JP 11868283U JP 11868283 U JP11868283 U JP 11868283U JP S6090921 U JPS6090921 U JP S6090921U
Authority
JP
Japan
Prior art keywords
circuit
entering
prevent interference
interference waves
telephones
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11868283U
Other languages
Japanese (ja)
Other versions
JPH066614Y2 (en
Inventor
由郎 佐藤
菅谷 良博
栗山 明海
島村 辰男
Original Assignee
株式会社トーキン
日本電信電話株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社トーキン, 日本電信電話株式会社 filed Critical 株式会社トーキン
Priority to JP1983118682U priority Critical patent/JPH066614Y2/en
Publication of JPS6090921U publication Critical patent/JPS6090921U/en
Application granted granted Critical
Publication of JPH066614Y2 publication Critical patent/JPH066614Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に用いるコモンモードチョークコイルの
原理を説明するための図、第2図は電話線に挿入したコ
モンモードチョークコイルの作用を説明するための図、
第3図は電話線にコモンモードチョークコイルを挿入し
た場合の等価回路を示す図、第4図は透磁率μ’ = 
2000の環状フェライトコアに単層巻きした場合の巻
回数を変数とするインピーダンスの周波数特性図、第5
図は第4図におけるコアに3通りの方法で巻線を施した
場合及び巻回数を変化した場合(破線)のコモンモード
チョークコイルのインピーダンスの周波数特性図、第6
図は本考案の一実施例による電話機への妨害波の混入防
止回路を示した回路図である。 1.2・・・・・・巻線、3・・・・・・磁性体、4・
・・・・・負荷、5・・・・・・可変インダクタンス、
6・・・・・・可変容量、el・・・・・・妨害源電圧
、Z、・・・・・・妨害波インピーダンス、Zf・・・
・・・フィルタのインピーダンス、Zl・・・・・・電
話機インピーダンス。
Figure 1 is a diagram for explaining the principle of the common mode choke coil used in the present invention, Figure 2 is a diagram for explaining the action of the common mode choke coil inserted into a telephone line,
Figure 3 shows the equivalent circuit when a common mode choke coil is inserted into the telephone line, and Figure 4 shows the magnetic permeability μ' =
5th frequency characteristic diagram of impedance with the number of turns as a variable when winding a single layer around a 2000 annular ferrite core
The figure shows the impedance frequency characteristic diagram of the common mode choke coil when the core is wound in three ways in Figure 4 and when the number of windings is changed (broken line).
The figure is a circuit diagram showing a circuit for preventing interference waves from entering a telephone according to an embodiment of the present invention. 1.2... Winding wire, 3... Magnetic material, 4...
...Load, 5...Variable inductance,
6...variable capacitance, el...interference source voltage, Z,...interference wave impedance, Zf...
... Filter impedance, Zl ... Telephone impedance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電話機に到る電話線に直列に挿入接続されるコモンモー
ドチョークコイルと、該コモンモードチョークコイルに
結合された、可変インダクタンス素子と可変容量素子と
からなる共振回路とを有することを特徴とする電話機へ
の妨害波の混入防止回路。
A telephone set comprising: a common mode choke coil inserted and connected in series to a telephone line leading to the telephone set; and a resonant circuit consisting of a variable inductance element and a variable capacitance element coupled to the common mode choke coil. A circuit to prevent interference waves from entering.
JP1983118682U 1983-08-01 1983-08-01 Circuit to prevent interference with telephones Expired - Lifetime JPH066614Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983118682U JPH066614Y2 (en) 1983-08-01 1983-08-01 Circuit to prevent interference with telephones

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983118682U JPH066614Y2 (en) 1983-08-01 1983-08-01 Circuit to prevent interference with telephones

Publications (2)

Publication Number Publication Date
JPS6090921U true JPS6090921U (en) 1985-06-21
JPH066614Y2 JPH066614Y2 (en) 1994-02-16

Family

ID=30272686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983118682U Expired - Lifetime JPH066614Y2 (en) 1983-08-01 1983-08-01 Circuit to prevent interference with telephones

Country Status (1)

Country Link
JP (1) JPH066614Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010534947A (en) * 2007-08-01 2010-11-11 エプコス アクチエンゲゼルシャフト Current compensation choke and circuit device having current compensation choke

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4935128U (en) * 1972-06-23 1974-03-28

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4935128U (en) * 1972-06-23 1974-03-28

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010534947A (en) * 2007-08-01 2010-11-11 エプコス アクチエンゲゼルシャフト Current compensation choke and circuit device having current compensation choke
US9305695B2 (en) 2007-08-01 2016-04-05 Epcos Ag Current-compensated choke and circuit arrangement with a current-compensated choke

Also Published As

Publication number Publication date
JPH066614Y2 (en) 1994-02-16

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