JPS6081987A - Picture memory device - Google Patents

Picture memory device

Info

Publication number
JPS6081987A
JPS6081987A JP58191829A JP19182983A JPS6081987A JP S6081987 A JPS6081987 A JP S6081987A JP 58191829 A JP58191829 A JP 58191829A JP 19182983 A JP19182983 A JP 19182983A JP S6081987 A JPS6081987 A JP S6081987A
Authority
JP
Japan
Prior art keywords
memory
section
input
address
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP58191829A
Other languages
Japanese (ja)
Inventor
Shigeo Tokikuni
時國 滋夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP58191829A priority Critical patent/JPS6081987A/en
Publication of JPS6081987A publication Critical patent/JPS6081987A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/907Television signal recording using static stores, e.g. storage tubes or semiconductor memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Image Processing (AREA)
  • Studio Circuits (AREA)

Abstract

PURPOSE:To enable to apply to various input TV systems by simple constitution by using an IC memory as an address section of a picture memory in a control section that makes memory action indication of input picture signal and conversion display action indication, and letting it have address conversion function. CONSTITUTION:Various TV picture input signals are supplied to a picture memory device 1 through an input cable 2 and stored in an IC memory section 4 through an A/D converter 3. Picture information stored in the memory section 4 is outputted to an output cable 8 through a D/A conversion section 5. A control section 7 is linked with an external switch 6 and performs memory action indication of input picture signal and conversion display action indication of stored signal. An IC memory is used in the memory address section 17 in the control section, and divided into blocks by combination of up and down inversion signal lines discrimination lines 18 of input TV signals. Address input of in each block is executed from an address counter section 9. Thus, two kinds of TV systems can be dealt with by only the address section 17, and up and down inversion function can also be included.

Description

【発明の詳細な説明】 [発明の技術分野J 本発明は工Cメモリー素子を用いて各種のTV方式での
記憶機能及び画像の上下反転等の変換機能を有する、画
像記憶装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to an image storage device that uses a C memory element and has a storage function for various TV systems and a conversion function such as vertically flipping an image. .

〔従来技術〕[Prior art]

従来この種の装置として第1図に示すものがあった。(
1)は画像記憶装置である。(2)は入力ケーブル、(
3)はアナログ・デジタル変換部、(4)はICメモリ
一部、(5)けデジタル・アナログ変換部、(6)r/
″i。
A conventional device of this type is shown in FIG. (
1) is an image storage device. (2) is the input cable, (
3) is an analog/digital converter, (4) is a part of IC memory, (5) is a digital/analog converter, (6) r/
″i.

されており、入力および出方ケーブル(2)、(8)は
外部の装R(例えばTVカメラ、モニター)と接続され
る。また、制御部(7)の中でICメモリ一部(4)の
制御の中心は第2図の様に構成される。(9)はカクン
クー素子による、アドレス・9922〜部、(4o)#
 g x −o n*−PKよる、上下反転変換ai1
m 、(11) Fiゲート素子によるカウンタースト
ップ指示部、(12)はメモリ・タイミング発生部、(
13)はメモリ・アドレス選択部、(14)Ii基本ク
ロック信号線、(15)は外部スイッチからの上下反転
信号線、(16) h 7’ シタル化された画倫信号
m〒水ス次に動作について説明する。入カケーブル(2
)によね入力された信号はアナログ・デジタル変換部(
3)で制御部(7)からの同期信号をもとにデジタル信
号に変換され、ICメモリ一部(4)罠記憶される。
The input and output cables (2) and (8) are connected to external equipment (eg, TV camera, monitor). Further, in the control section (7), the center of control of the IC memory part (4) is configured as shown in FIG. (9) is address 9922 ~ part, (4o) # by Kakunku element
Vertical inversion transformation ai1 by g x -on*-PK
m, (11) counterstop instruction section using Fi gate element, (12) memory timing generation section, (
13) is the memory address selection section, (14) Ii basic clock signal line, (15) is the vertical inversion signal line from the external switch, (16) h 7' is the converted image signal m〒 water next The operation will be explained. Input cable (2
) The signal input to the analog/digital converter (
In step 3), it is converted into a digital signal based on the synchronization signal from the control unit (7), and stored in a part of the IC memory (4).

制御部(7)の内部で基本クロック(14)によりアド
レス・カウンタ一部(9)がカウント・アップされ、そ
の信号でメモリ・タイミング発生部(12) 、メモリ
・アドレス選択部(13)が駆動されて、入力映像信号
がICメモリ一部(4)に記憶される。
Inside the control unit (7), a part of the address counter (9) is counted up by the basic clock (14), and this signal drives the memory timing generation unit (12) and memory address selection unit (13). The input video signal is stored in the IC memory part (4).

入力TV信号として例えば525木/ 60 HZと6
25木150Hzの2方式に対応させる必要のある場合
を考えよう、、2種の方式で画像の有効面積が異なるた
めに、アドレス・カウンタ一部(9)のカウント数が異
なる。そしてまたカウンタ・ストップ指示部(11)の
ストップ・カウンター素子Mなる。そのために、従来の
装置では入力TV方式によりこのブロックを別々に製作
し、対応していた、 ICメモリ一部(4)に記憶された画像情報はデジタル
・アナログ変換部(5)で制御部(7)からの同期値ル
(8)でモニターなどの表示装置へ出力される。外部ス
イッチ(6)から画像上下反転の信号(15)が来た場
合、ICメモリ一部(4)のアドレッシングを逆方向か
ら実施しなくてはならないため、アドレス・カウンタ一
部(9)の信号が上下反転変換機能部(1o)により、
反転されてICメモリー素子(4)に入シ動作している
As input TV signal for example 525 T/60 HZ and 6
Let us consider a case in which it is necessary to support two methods of 25 trees and 150 Hz. Since the effective area of the image is different between the two methods, the count numbers of the part of the address counter (9) are different. It also becomes the stop counter element M of the counter stop instruction section (11). For this reason, in conventional devices, this block was manufactured separately according to the input TV method, and the corresponding image information stored in the IC memory part (4) was transferred to the digital-to-analog converter (5) and the control unit ( The synchronization value (8) from 7) is output to a display device such as a monitor. When the signal (15) for vertically inverting the image comes from the external switch (6), addressing of the part of the IC memory (4) must be performed from the opposite direction, so the signal of part of the address counter (9) is by the vertical inversion conversion function unit (1o),
The signal is inverted and input into the IC memory element (4).

従来の画像記憶装置は以上のように構成されているので
、方式の異なる入力TV信号に対して別々の内部装置(
基板)を製作しなくてはならず、高価な上に異なる入力
信号に対しての対応が瞬時に行なえず、筐たメモリ・ア
ドレス部の構成が複雑であるなどの欠点があった。
Since conventional image storage devices are configured as described above, separate internal devices (
This method had drawbacks such as having to manufacture a board (substrate), being expensive, not being able to respond instantaneously to different input signals, and having a complicated memory address section.

〔発明の概要〕[Summary of the invention]

この発明は上記のような従来のものの欠点を除去するた
め例なされたもので、制御部内のメモリ・アドレス部を
ICメモリー素子で実行することにより、性能を低下さ
せることなく、簡易かつ安価に製作でき、同一の装置で
各種のTV方式に瞬時に対応し、また将来の画像変換機
能の付加を容易とする画像記憶装置を提供することを目
的としている。
This invention was developed in order to eliminate the drawbacks of the conventional ones as described above, and by implementing the memory address section in the control section with an IC memory element, it can be easily and inexpensively manufactured without deteriorating the performance. It is an object of the present invention to provide an image storage device that can instantly support various TV systems with the same device, and that can easily add an image conversion function in the future.

〔発明の実施例〕[Embodiments of the invention]

以下、この発明の一実施例を図について説明する。第3
図において、(9)はカウンター素子による、アドレス
・カウンタ一部、 (12)はメモリー・タイミング発
生部、(13)はメモリ・アドレス選択部、(14)は
基本クロック信号線、(15)は外部スイッチからの上
下反転信号線、(16)はデジタル化された画像信号線
、(17)はICメモリーによるメモリ・アドレス部、
 (’18)は外部スイッチからの入力TV信号方式識
別線、(4)ld工Cメモリ一部である。
An embodiment of the present invention will be described below with reference to the drawings. Third
In the figure, (9) is a part of the address counter by a counter element, (12) is a memory timing generator, (13) is a memory address selector, (14) is a basic clock signal line, and (15) is a The vertical inversion signal line from the external switch, (16) is the digitized image signal line, (17) is the memory address section by IC memory,
('18) is the input TV signal system identification line from the external switch, and (4) is a part of the ld C memory.

この発明において、全体の構成は従来と同じように第1
図に示す通りである。その中の制御部(7)の動作につ
いて第3図で説明する。工Cメモリーを用いた、メモリ
・アドレス部(17)はそのメモリの内容が画像メモリ
(4)のアドレスとして動作するという意味でアドレス
・カウンタ一部(9)のアドレス変換機能を持つと言え
る。2種類の入力TV信号方式に適応し、それぞれの信
号方式で上下反転機能を実行する場合の動作では、メモ
リ、アドレス部(17)は上下反転信号線(15)と入
力TV信号方式識別線(18)の組合せで4つのブロッ
クに分けられる。そして、それぞれのブロックでのアド
レス入力はアドレス・カウンタ一部(9)から実行され
る。
In this invention, the overall configuration is the same as before.
As shown in the figure. The operation of the control section (7) therein will be explained with reference to FIG. The memory address section (17) using the C memory can be said to have the address conversion function of the address counter section (9) in the sense that the contents of the memory operate as the address of the image memory (4). When adapting to two types of input TV signal systems and performing the vertical inversion function in each signal system, the memory and address section (17) connect the vertical inversion signal line (15) and the input TV signal system identification line ( 18) can be divided into four blocks. Address input in each block is performed from the address counter part (9).

指示されたアドレスのメモリー(17)の内容を、それ
ぞれの条件(例えば625Hz150Hzで上下反転時
は625,624、・・・1の順で、また525H2/
60H2で非反転時は1,2.3、・・・525の順)
に従った値とし、また、カウンタ・ストップ信号もメモ
リ出力として得られる様に事前に書き込んでおけば、メ
モリ・アドレス部(17)だけで従来、2枚基板で対応
していた、2種のTマ方式に対応出来、また第2図の上
下反転機能部(10)とカウンタ・ストップ指示部(1
1)を包括した簡易なアドレス部が構築される。
The contents of the memory (17) at the specified address are stored in the order of 625, 624, .
When 60H2 is not inverted, the order is 1, 2.3, ...525)
If the counter stop signal is also written in advance so that it can be obtained as a memory output, the memory address section (17) can handle two types of It is compatible with the T-matrix system, and can also be used with the vertical inversion function section (10) and counter stop instruction section (10) shown in Figure 2.
A simple address section that includes 1) is constructed.

制御部(7)以外の部分は従来の装置と同一である。The parts other than the control section (7) are the same as the conventional device.

なお、上記実施例では画像記憶装置の有する変換機能と
して、上下反転のみについて説明したが、このメモリ・
アドレッシング方式を用いれば、画面内の固定された1
/4の部分の拡大表示についても簡易な構成で実現出来
るなど、新規の変換機能の付加において同様な効果が期
待出来る。
In the above embodiment, only vertical inversion was explained as the conversion function of the image storage device, but this memory
If you use the addressing method, a fixed 1 in the screen
A similar effect can be expected when adding a new conversion function, such as the enlarged display of the /4 portion with a simple configuration.

[発明の効果] 以上のようにこの発明によれば画像メモリのメモリ・ア
ドレス部をICメモリ素子により構成したので、各種の
入力TV方式に適用可能な簡易な回路となり、装置が安
価で出来、また将来の画像変換機能の付加にも容易に対
応できる、画像記録装置が得られる効果がある。
[Effects of the Invention] As described above, according to the present invention, since the memory address section of the image memory is constituted by an IC memory element, it becomes a simple circuit that can be applied to various input TV systems, and the device can be made at low cost. Further, there is an effect that an image recording device can be obtained that can easily accommodate the addition of an image conversion function in the future.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は画像記憶装置全体を示すブロック図、第2図は
従来のメモリ・アドレス部構成図、第3図はこの発明の
一実施例によるメモリ・アドレス部構成図である。 (1)・・・画像記憶装置、(2)・・・入カケーブル
、(3)・・・アナログ・デジタル変換部、(4)・・
・ICメモリ一部、(5)・・デジタル・アナログ変換
部、(6)・・・外部スイッチ、(7)・・・制御部、
(8)・・・出カケーブル、(9)・・・アドレス′・
カクンタ一部、(12)・・メモリ・タイミング発生部
、(13)用メモリ・アドレス選択部、(14)・・・
基本クロック信号線、(15)・・・上下反転信号線、
(16)・・・画像信号線、(17)・・メモリー・ア
ドレス部、(18)・・・入力TV信号方式識別線なお
、図中同一符号は同−又は相当部分を示す。 代理人大岩 増雄 第1図 第2図 手続補正書(自発) 29発明の名称 画偉記憶装置 3、補正をする者 事件との関係 特許出願人 住 所 東京都千代田区丸の内皿丁目2番3号名 称 
(601)三菱電機株式会社 代表者片由仁八部 4、代理人 5、補正の対象 +11明細書の発明の詳細な説明の欄 6 補正の内容 (IXIJI細書をつぎのとおり訂正する。
FIG. 1 is a block diagram showing the entire image storage device, FIG. 2 is a block diagram of a conventional memory address section, and FIG. 3 is a block diagram of a memory address section according to an embodiment of the present invention. (1)...Image storage device, (2)...Input cable, (3)...Analog-to-digital converter, (4)...
・Part of IC memory, (5)...Digital-to-analog conversion section, (6)...External switch, (7)...Control section,
(8)...Output cable, (9)...Address'.
Part of Kakunta, (12)...Memory timing generation section, (13) Memory address selection section, (14)...
Basic clock signal line, (15)...vertical inversion signal line,
(16)...Image signal line, (17)...Memory address section, (18)...Input TV signal system identification line Note that the same reference numerals in the drawings indicate the same or equivalent parts. Agent Masuo Oiwa Figure 1 Figure 2 Procedural amendment (voluntary) 29 Name of the invention Image storage device 3, person making the amendment Relationship to the case Patent applicant address 2-3 Sara-chome, Marunouchi, Chiyoda-ku, Tokyo Name
(601) Mitsubishi Electric Co., Ltd. Representative Katayuni 8 Department 4, Agent 5, Subject of amendment + 11 Detailed explanation of the invention in the specification column 6 Contents of the amendment (IXIJI specifications are corrected as follows.

Claims (1)

【特許請求の範囲】[Claims] 各種のTV画像入力信号をデジタル信号に変換するアナ
ログ・デジタル変換部、外部スイッチと連動して、入力
画像信号の記憶動作指示と既に記憶している信号の変換
表示動作指示を行なう制御部、この制御部からの信号で
起動されて上記アナログ・ディジタル変換部から出力さ
れるデジタル画像信号を記憶、再生するICメモリ一部
、このICメモリ部より再生出力されるディジタル画像
信号をアナログ信号に変換して出力するデジタル・アナ
ログ変換部により構成される画像記憶装置において、上
記制御部内の画像メモリのアドレス部2してICメモリ
ーを使用し、アドレス変換機能を有する事を特徴とする
画像記憶装置。
An analog-to-digital conversion unit that converts various TV image input signals into digital signals; a control unit that, in conjunction with an external switch, instructs storage operations for input image signals and instructions for converting and displaying already stored signals; A part of the IC memory that is activated by a signal from the control unit and stores and reproduces the digital image signal output from the analog-to-digital conversion unit, and converts the digital image signal reproduced and output from the IC memory unit into an analog signal. What is claimed is: 1. An image storage device comprising a digital-to-analog converter for outputting data, characterized in that an IC memory is used as the address section 2 of the image memory in the control section and has an address conversion function.
JP58191829A 1983-10-12 1983-10-12 Picture memory device Pending JPS6081987A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58191829A JPS6081987A (en) 1983-10-12 1983-10-12 Picture memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58191829A JPS6081987A (en) 1983-10-12 1983-10-12 Picture memory device

Publications (1)

Publication Number Publication Date
JPS6081987A true JPS6081987A (en) 1985-05-10

Family

ID=16281209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58191829A Pending JPS6081987A (en) 1983-10-12 1983-10-12 Picture memory device

Country Status (1)

Country Link
JP (1) JPS6081987A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62150482A (en) * 1985-12-25 1987-07-04 Canon Inc Picture information processor
EP0372514A2 (en) * 1988-12-06 1990-06-13 Canon Kabushiki Kaisha Memory apparatus and handling apparatus therefor

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62150482A (en) * 1985-12-25 1987-07-04 Canon Inc Picture information processor
EP0372514A2 (en) * 1988-12-06 1990-06-13 Canon Kabushiki Kaisha Memory apparatus and handling apparatus therefor
US5418926A (en) * 1988-12-06 1995-05-23 Canon Kabushiki Kaisha System and method for indicating whether a block size in a detachable memory device corresponds to a predetermined broadcasting system standard
US5570130A (en) * 1988-12-06 1996-10-29 Canon Kabushiki Kaisha Detachable memory with starting block address selected in accordance with detected television programming standard

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