JPS6056287B2 - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPS6056287B2 JPS6056287B2 JP1539885A JP1539885A JPS6056287B2 JP S6056287 B2 JPS6056287 B2 JP S6056287B2 JP 1539885 A JP1539885 A JP 1539885A JP 1539885 A JP1539885 A JP 1539885A JP S6056287 B2 JPS6056287 B2 JP S6056287B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- photoresist
- foaming agent
- film
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title claims description 20
- 238000004519 manufacturing process Methods 0.000 title claims description 13
- 238000000034 method Methods 0.000 claims description 17
- 239000004088 foaming agent Substances 0.000 claims description 16
- 239000010409 thin film Substances 0.000 claims description 12
- 239000011347 resin Substances 0.000 claims description 10
- 229920005989 resin Polymers 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 7
- 239000002184 metal Substances 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 description 32
- 239000010408 film Substances 0.000 description 18
- MUBZPKHOEPUJKR-UHFFFAOYSA-N Oxalic acid Chemical compound OC(=O)C(O)=O MUBZPKHOEPUJKR-UHFFFAOYSA-N 0.000 description 6
- 239000004604 Blowing Agent Substances 0.000 description 3
- ATRRKUHOCOJYRX-UHFFFAOYSA-N Ammonium bicarbonate Chemical compound [NH4+].OC([O-])=O ATRRKUHOCOJYRX-UHFFFAOYSA-N 0.000 description 2
- 235000012501 ammonium carbonate Nutrition 0.000 description 2
- 239000001099 ammonium carbonate Substances 0.000 description 2
- VZTDIZULWFCMLS-UHFFFAOYSA-N ammonium formate Chemical compound [NH4+].[O-]C=O VZTDIZULWFCMLS-UHFFFAOYSA-N 0.000 description 2
- 235000006408 oxalic acid Nutrition 0.000 description 2
- 230000007261 regionalization Effects 0.000 description 2
- VBIXEXWLHSRNKB-UHFFFAOYSA-N ammonium oxalate Chemical compound [NH4+].[NH4+].[O-]C(=O)C([O-])=O VBIXEXWLHSRNKB-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Weting (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の製造方法に関し、その目的とす
るところは半導体集積回路製造の特に電極の微細加工に
おいて、所定のパターンを形成したい薄膜の厚さが厚い
場合でも、容易に電極パターン形成を行なうことができ
る半導体装置の製造方法を提供することにある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor device, and its purpose is to manufacture a semiconductor integrated circuit, particularly in microfabrication of electrodes, even when a thin film on which a predetermined pattern is to be formed is thick. It is an object of the present invention to provide a method for manufacturing a semiconductor device that allows easy electrode pattern formation.
従来の半導体集積回路精造における電極の特に微細加
工においては工程の簡略化からも従来のホトレジストを
用いたリフト・オフ法によりＡｌパターンを形成するこ
とが多い。In particular, in microfabrication of electrodes in conventional semiconductor integrated circuit manufacturing, Al patterns are often formed by a conventional lift-off method using photoresist in order to simplify the process.
これは普通ポジ形ホトレジストが使用されるが、その工
程は第１図に示すように、基板１の表面２にホトレジス
ト３を塗布し〔第１図ａ〕、次にホトレジストパターン
４を形成し〔第１図ｂ〕、Ａｌ５を蒸着する〔第１図ｃ
〕。次に上記ホトレジストパターン４をレジスト剥離液
（例えばＪ−１００等）により除去し、所定の川パター
ン６を得る〔第１図ｄ〕。 しかるに、上記のようなリ
フト・オフ法においては、Ａ１５を蒸着した際、ホトレ
ジストパターン４の側面部にはＡｌ膜が薄くしか蒸着さ
れず、ピンホールが非常に多く存在する状態であること
が必要である。その理由は、Ａｌ膜蒸着後、Ａｌ配線パ
ターンを形成するために上記ホトレジストパターンをレ
ジスト剥離液により除去するが、この場合上記ピンホー
ルをじて、レジスト剥離液がホトレジスト内に浸透する
ことにより、レジスト除去が行なわれるためである。ま
たそれと同時に、ホトレジストパターン４上のＡｌ膜も
除去されることによりＡｌ配線パターンを形成する方法
であるためである。 以上のようなことにより、蒸着す
るＡｌ膜５の膜厚とホトレジスト３の膜厚の比が１：５
くらいにおいては、非常に良好な川配線パターンを形成
することが可能であるが、上記Ａｌ膜５の膜厚とホトレ
ジストの膜厚の比が１：３くらいになり、ホトレジスト
パターン４の側面部においても、Ａｌ膜がたとえば３０
００Λ以上に厚くなると、Ｎ配線パターンを形成するこ
とが困難になる。Normally, a positive photoresist is used for this, and the process is as shown in FIG. 1: a photoresist 3 is applied to the surface 2 of the substrate 1 [FIG. 1a], and then a photoresist pattern 4 is formed [ Fig. 1b], evaporating Al5 [Fig. 1c]
]. Next, the photoresist pattern 4 is removed using a resist stripper (for example, J-100, etc.) to obtain a predetermined river pattern 6 (FIG. 1d). However, in the lift-off method described above, when A15 is deposited, the Al film is only thinly deposited on the side surfaces of the photoresist pattern 4, and it is necessary that there be a large number of pinholes. It is. The reason for this is that after the Al film is deposited, the photoresist pattern is removed with a resist stripping solution to form an Al wiring pattern, but in this case, the resist stripping solution penetrates into the photoresist through the pinholes. This is because resist removal is performed. This is also because, at the same time, the Al film on the photoresist pattern 4 is also removed, thereby forming an Al wiring pattern. As a result of the above, the ratio of the thickness of the Al film 5 to be deposited and the thickness of the photoresist 3 is 1:5.
However, the ratio of the thickness of the Al film 5 to the thickness of the photoresist is about 1:3, and the side surface of the photoresist pattern 4 is Also, the Al film is, for example, 30
When the thickness exceeds 00Λ, it becomes difficult to form an N wiring pattern.
なお、従来の半導体集積回路においては、表面に１．０
ｐｍ程度の段差を有するために、Ａ１の膜厚が薄いと、
段差部分において、Ｎ配線パターンが断線をおこし、歩
留りを下げるため、配線用のＮの膜厚は１．０μｍ以上
が必要である。ゆえに従来のホトレジストを用いたリフ
ト．オフ法では、工程の簡略化はできるが膜厚の厚い微
細パターンの形成歩留りは非常に低かつた。本発明はこ
のような問題に鑑み、比較的膜厚の厚いパターンの形成
を歩留り良くかつ工程を複雑化することなく可能するも
のであり、ます発泡剤入りの感光性樹脂を用いることを
特徴とするものである。In addition, in conventional semiconductor integrated circuits, 1.0
If the film thickness of A1 is thin because it has a step difference of about pm,
In the step portion, the N wiring pattern causes disconnection and lowers the yield, so the thickness of the N film for wiring needs to be 1.0 μm or more. Therefore, lift using conventional photoresist. Although the OFF method can simplify the process, the yield of forming fine patterns with a thick film is extremely low. In view of these problems, the present invention enables the formation of relatively thick patterns with high yield and without complicating the process, and is characterized by using a photosensitive resin containing a foaming agent. It is something to do.
本発明の半導体装置の製造方法に用いる感光性樹脂は、
たとえば従来のホトレジスト（例えばポジレジストＭｌ
３５ＯＪ等）中に発泡剤（例えばギ酸アンモニウム、蓚
酸、蓚酸アンモニウム、炭酸アンモニウム等を単数ある
いは複数混合したもの）を２〜１０％混入したものであ
る。The photosensitive resin used in the method for manufacturing a semiconductor device of the present invention is
For example, conventional photoresists (e.g. positive resist Ml)
35OJ, etc.) mixed with 2 to 10% of a blowing agent (for example, one or a mixture of ammonium formate, oxalic acid, ammonium oxalate, ammonium carbonate, etc.).
以下、本発明の一実施例における半導体装置の製造方法
について第２図ａ−ｆとともに説明する。Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. 2a to 2f.
ただしこの実施例においては、保護膜として従来のホト
レジスト、形成する薄膜としてＡ１を用いた。第２図に
おいて半導体基板３１の表面３２に従来のホトレジスト
３３を塗布し〔第２図ａ〕、次に従来のホトレジスト３
３上に、発泡剤入りのホトレジスト３４を塗布したのち
〔第２図ｂ〕、所定の場所に発泡剤入りのホトレジスト
パターン３５及び従来のホトレジストパターン３６を形
成し〔第２図ｃ〕、Ｎ膜３７を１．０ｐｍくらい蒸着す
るる〔第２図ｄ〕。However, in this example, a conventional photoresist was used as the protective film, and A1 was used as the thin film to be formed. In FIG. 2, a conventional photoresist 33 is applied to the surface 32 of a semiconductor substrate 31 [FIG. 2a], and then a conventional photoresist 3
3, a photoresist 34 containing a foaming agent is applied thereon [FIG. 2b], a photoresist pattern 35 containing a foaming agent and a conventional photoresist pattern 36 are formed at predetermined locations [FIG. 2c], and an N film is formed. 37 to a thickness of about 1.0 pm [Figure 2 d].
本実施例では、従来のホトレジストの膜厚は１．５μｍ
１発泡剤入りのホトレジストの膜厚は０．５μｍとした
。次に上記基板３１を１５０たＣ〜２００′Ｃで熱処理
を施すと、上記発泡剤入りのホトレジストパターン３５
中の発泡剤がギ酸アンモニウムの場合
蓚酸の場合
蓚酸アンモ亘；ムの場合
炭酸アンモニウムの場合
の反応によりガスが発生して発泡し、上記発泡剤入りホ
トレジスト３５が膨張する〔第２図ｅ〕。In this example, the film thickness of the conventional photoresist is 1.5 μm.
The film thickness of the photoresist containing a blowing agent was 0.5 μm. Next, when the substrate 31 is heat-treated at 150 to 200'C, the photoresist pattern 35 containing the foaming agent is formed.
When the foaming agent is ammonium formate, oxalic acid is used, and ammonium carbonate is used as the foaming agent. Gas is generated and foams due to the reaction, and the photoresist 35 containing the foaming agent expands (FIG. 2e).
その時に膨張した発泡剤入りのホトレジストパタ”−ン
３８の周辺部分のＮ膜３９を引き伸ばし、上記周辺部分
のＡＩ膜３９を断線あるいは非常に薄くし、ピンホール
が非常に多い状態とするため、膨張した発泡剤入りのホ
トレジストパターン３８及びホトレジストパターン３６
の除去が、レジスト剥離液により容易に行なわれ、所定
のＡｌパターン４０を形成することができる〔第２図ｆ
〕。以上の実施例てはＡ１膜の電極パターン形成のみに
ついて説明したが、導体以外に３００℃以下の低温で被
着される半導体、絶縁物についても同様の好結果を得る
ことができる。In order to stretch the N film 39 around the expanded foaming agent-containing photoresist pattern 38, and to break the AI film 39 around the peripheral part or make it very thin, resulting in a large number of pinholes. Expanded blowing agent photoresist pattern 38 and photoresist pattern 36
can be easily removed using a resist stripping solution, and a predetermined Al pattern 40 can be formed [FIG. 2 f
]. Although only the electrode pattern formation of the A1 film has been described in the above embodiments, similar good results can be obtained with semiconductors and insulators deposited at a low temperature of 300° C. or less in addition to conductors.
以上の説明から明らかなように、本発明の半導体装置の
製造方法によれば、（１）リフト・オフ法を採用するた
め工程が簡略化される。As is clear from the above description, according to the method for manufacturing a semiconductor device of the present invention, (1) the process is simplified because the lift-off method is adopted.
（２）蒸着膜厚が１〜２μ程度の厚さても微細加工が容
易である。(2) Fine processing is easy even when the thickness of the deposited film is about 1 to 2 μm.
（３）半導体集積回路の製造歩留りを大巾に向上させる
ことが可能となる。(3) It becomes possible to greatly improve the manufacturing yield of semiconductor integrated circuits.
等の効果を奏し、半導体装置の製造に大きく寄与するも
のである。It has the following effects and greatly contributes to the manufacture of semiconductor devices.
第１図ａ〜゛ｄは従来のホトレジストを用いたリフト．
オフ法の工程図、第２図ａ−ｆは発泡剤入りの感光性樹
脂を用いた本発明の一実施例における半導体装置の製造
方法の工程図である。
３１・・・・・・半導体基板、３３・・・・・・ホトレ
ジスト、３４・・・・・・発泡剤入りのホトレジスト、
３５・・・・・・発泡剤入りのホトレジストパターン、
３７・・・・・・Ａｌ膜、３８・・・・・・膨張した発
泡剤入りのホトレジストパターン。Figures 1a to d show lifts using conventional photoresist.
FIGS. 2a to 2f are process diagrams of a method for manufacturing a semiconductor device according to an embodiment of the present invention using a photosensitive resin containing a foaming agent. 31...Semiconductor substrate, 33...Photoresist, 34...Photoresist containing a foaming agent,
35...Photoresist pattern containing foaming agent,
37... Al film, 38... Expanded photoresist pattern containing foaming agent.
Claims (1)
膜上に発泡剤を混入した感光性樹脂を塗布る第１の工程
と、前記発泡剤入りの感光性樹脂及び第１の薄膜を選択
的に除去する第２の工程と、前記半導体基板上に第２の
薄膜を形成する第３の工程と、半導体基板上に第２の薄
膜を形成した後、前記発泡剤入りの感光性樹脂を膨張さ
せて発泡剤入り感光性樹脂パターンの周辺の第２の薄膜
にピンホールを発生させる第４の工程と、前記発泡剤入
りの感光性樹脂、この感光性樹脂上の第２の薄膜及び第
１の薄膜を除去する第５の工程とからなることを特徴と
する半導体装置の製造方法。 ２ 第１の薄膜が感光性樹脂で、かつ第２の薄膜が金属
であることを特徴とする特許請求の範囲第１項記載の半
導体装置の製造方法。[Scope of Claims] 1. A first step of forming a first thin film on a semiconductor substrate, and applying a photosensitive resin mixed with a foaming agent onto the first thin film; a second step of selectively removing the resin and the first thin film; a third step of forming a second thin film on the semiconductor substrate; and after forming the second thin film on the semiconductor substrate, a fourth step of expanding the photosensitive resin containing a foaming agent to generate pinholes in the second thin film around the photosensitive resin pattern containing the foaming agent, the photosensitive resin containing the foaming agent, and the photosensitive resin; A method for manufacturing a semiconductor device, comprising a fifth step of removing the upper second thin film and the first thin film. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the first thin film is made of photosensitive resin and the second thin film is made of metal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1539885A JPS6056287B2 (en) | 1985-01-31 | 1985-01-31 | Manufacturing method of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1539885A JPS6056287B2 (en) | 1985-01-31 | 1985-01-31 | Manufacturing method of semiconductor device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12154576A Division JPS6025897B2 (en) | 1976-10-08 | 1976-10-08 | Manufacturing method of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60186022A JPS60186022A (en) | 1985-09-21 |
| JPS6056287B2 true JPS6056287B2 (en) | 1985-12-09 |
Family
ID=11887623
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1539885A Expired JPS6056287B2 (en) | 1985-01-31 | 1985-01-31 | Manufacturing method of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6056287B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0524487B2 (en) * | 1989-05-23 | 1993-04-08 | Asahi Optical Co Ltd | |
| JPH0519969Y2 (en) * | 1986-04-22 | 1993-05-25 |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE3604368A1 (en) * | 1985-02-13 | 1986-08-14 | Sharp K.K., Osaka | METHOD FOR PRODUCING A THIN FILM TRANSISTOR |
-
1985
- 1985-01-31 JP JP1539885A patent/JPS6056287B2/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0519969Y2 (en) * | 1986-04-22 | 1993-05-25 | ||
| JPH0524487B2 (en) * | 1989-05-23 | 1993-04-08 | Asahi Optical Co Ltd |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60186022A (en) | 1985-09-21 |
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