JPS6041374A - Frame transfer image pickup element and image pickup device using this element - Google Patents

Abstract

PURPOSE:To obtain a high-resolution still picture with inexpensive constitution by arranging a cell, whose number is twice or more as large as that in an image pickup part, in the horizontal direction in an accumulating part and providing a common electrode for every two adjacent cells in the accumulating part. CONSTITUTION:An electrode PS1 is a poly-Si electrode for supplying a pulse phi1 to the image pickup part and covers the surfaces of areas A and B different in a potential level in a semiconductor substrate. Electrodes PS20 and PS21 cover the surfaces of areas A' and B' different in the potential level in the accumulating part. The number of cells in the horizontal direction in the accumulating part is twice as large as that in the image pickup part. In this case, one cell is formed with the areas A-D or areas A'-D'. Individual cells in the accumulating part are so wired that a common voltage is impressed to every two prescribed adjacent cells. That is, the electrodes PS20 and PS21 are respectively arranged for the adjacent cells. Consequently, the production is simplified because the electrodes for controlling the potentials of individual cells are made large-sized.

Description

DETAILED DESCRIPTION OF THE INVENTION (Technical Field) The present invention relates to a frame transfer type image sensor suitable for photographing still images and an image pickup apparatus using the frame transfer type image sensor.

(Prior art) Generally, in order to obtain a still screen suitable for standard television format using a solid-state image sensor, so-called interlaced 2
It is necessary to obtain a video signal for each field.

However, frame-transfer type CCD (Char
ge Coupled J)evice), such reading was previously thought to be impossible. That is, the first
Figures i and J: Show the configuration of a conventional frame transfer WCCD, where l is an imaging section, 2 is a storage section, 3 is a horizontal transfer register, 4 is an output amplifier, and 5 is a signal output terminal.

Further, PS is a cell, and a plurality of cells 4'' are arranged in rows and columns, and each constitutes an imaging unit 11 and a storage unit 2. Each cell PS has a vertical Km load transfer function in the figure, and the horizontal transfer register 3 has a horizontal transfer function; φ1 to φ are an imaging section and a storage section, respectively. , is the transfer lock of the horizontal transfer section.

Further, the area other than the imaging section, that is, the shaded area is shielded from light.

In the conventional COD configured in this manner, image information incident on the imaging section is sampled by each cell and stored as charge information.

Thereafter, by supplying clocks φ, .about.φ, the charge information in the imaging section is transferred to the storage section at high speed and read out over an appropriate amount of time.

That is, after the information in the storage section is transferred line by line to the register 3, this line information is read out over one horizontal scanning period using the clock φ3, thereby sequentially obtaining scanning line signals corresponding to the standard television signal. However, since the standard television system uses 2:1 interlacing -
= Different positions on the monitor screen will be scanned for the first and second fields for reproduction.

Therefore, unless a two-field video signal interlaced with each other is obtained at the imaging stage, problems such as screen blur and resolution degradation will occur during playback.

However, in the conventional frame transfer type CCD configured as shown in the first figure, it is impossible to read out the odd and even fields separately in the imaged screen.

In response to this, the present applicant proposed a new frame transfer type imaging device having a storage section in which the number of horizontal cells is more than twice the number of cells in the imaging section in Japanese Patent Application No. 181809/1982.

According to such an element, when the information for one screen formed in the imaging section is vertically transferred to the storage section, the information for the one screen's information on closely-numbered rows and the information on even-numbered rows are separated and stored. This makes it possible to basically solve the above problems.

(Purpose) No. 1 of the present application. Second. The purpose of the fourth and fifth inventions is to further improve the frame transfer type COD proposed in Japanese Patent Application No. 57-181809 by the present applicant, and to achieve high resolution by adopting a simple configuration capable of increasing the yield. An object of the present invention is to provide an inexpensive and reliable frame transfer type imaging device that can capture still images, and an imaging device using the same.

Also, Section 3 of this application. A further object of the sixth invention is to use frame transfer type imaging to increase the transfer rate regardless of the increase in the number of cells in the horizontal direction and to facilitate signal sampling and holding when reading information from cells in the storage section. An object of the present invention is to provide an imaging device using an image sensor and a frame transfer type imaging device.

(Example) The configuration of an image sensor and an image pickup apparatus of the present invention for this purpose will be explained in detail based on an example.

FIG. 2 is a diagram for explaining the configuration of an embodiment of the present invention, and the same reference numerals as in FIG. 1 indicate the same elements. Furthermore, storage section 2
The number of cells in the horizontal direction is 2 of the number of cells in the horizontal direction of the imaging unit l.
It has doubled.

Furthermore, in this embodiment, the number of cells in the vertical direction of the storage section 2 is half the number of cells in the vertical direction of the imaging section l, but generally the number of cells in the horizontal direction of the storage section is equal to the number of cells in the vertical direction of the imaging section l. It is good if it is twice or more, and if it is more than % in the vertical direction.

In addition, in the illustrated embodiment, the imaging unit l consists of 8 rows x 4 columns of pixels, although in reality there are far more pixels than this.
The storage section 2 consists of pixels arranged in 4 rows and 8 columns. 31 to 33 are first to third horizontal shift registers, respectively, and each horizontal shift register is controlled by a signal source 7, which will be described later, so as to read charges in a predetermined column of the storage section 2. Note that the number of horizontal shift registers may be two or four or more. T is a gate provided between the storage section 2 and the horizontal shift register 31, T is a gate provided between the registers 31 and 32, and Ts is a gate provided between the registers 32 and 33, respectively. 41 to 43 are output amplifiers for converting the charge signals read out from the horizontal shift registers 31 to 33 into voltage signals and reading them out, and 0 is a distribution unit that horizontally shifts the charges in the cells of the storage unit 2. This is for appropriately distributing the information to the registers.

φ1 is a shift pulse for vertically shifting the charge in the imaging section, and φ20 is the first shift pulse from the right side in the figure of the storage section 2. 4th. Fifth.
8th column (hereinafter each column is 201, 204, 205.20
The shift no. (Rus, φ7.) for vertically shifting the charge of 8 (referred to as
Each column with the following is called 202, 203, 206, 207) shift pulse for vertically shifting the charge, φT is gate) T, -T, and a gate pulse for controlling the distribution section, φ, 1~φ1. are horizontal shift registers 31, respectively.
This is a shift pulse for horizontally shifting the charges of .about.33, and these pulses are supplied from a signal source 7, which will be described later.

Incidentally, a color separation filter as shown in FIG. 3, for example, is adhered to the surface of the imaging section l.

Here, 几 is a color filter that passes red, B is blue, and G is a color filter that passes green color light. Of course, the color pattern of the color separation filter is not limited to this.

FIG. 4 is a block diagram of an imaging, recording, and reproducing apparatus using the imaging device of the present invention. The signal source 7 activated by the operation of the imaging trigger switch 8 is a still (S) or movie signal source of the mode changeover switch 9. (M) FIG. 5 or FIG. 6 depending on each mode.

A video signal Vout 31 obtained through the output terminal of the image sensor also forms a signal with a timing as shown in FIG.
~Vout 33 is the recording circuit 11 and recording head 1 that performs modulation etc. after signal processing such as sample hold, γ correction, anno-char correction etc. is performed in the process circuit 10.
The data is recorded on the recording medium 13 via 2.・□. In addition, the output of the process circuit 10 is directly transmitted to the television monitor 16.
It can also be monitored at

Reference numeral 14 denotes a reproducing head, and the signal picked up by the head can be appropriately demodulated in a reproducing circuit and then monitored on a monitor 16. Further, LS is an imaging optical system that guides subject light to the imaging section 1 and forms an image.

FIG. 5 is a schematic diagram of the area around the boundary between the imaging section and the storage section of the second illustrated element, and shows an example of single-phase drive.

C8 is a channel stopper, and PSL is a polysilicon electrode for supplying pulse -1 to the imaging section l, which covers the surfaces of areas A and B, which have different VC potentials and levels, in the semiconductor substrate. Further, PS20 and PS21 cover the surfaces of the A' region and B' region having different potential levels in the storage section, and apply pulses φ2o and φ21 to each column of the storage section 2, respectively. .

In addition, the C area and D area of the imaging section and the storage section extension area D'
Each region is a virtual electrode (Vir) with a constant potential level formed in a semiconductor substrate by ion implantation or the like.
Tuat! Such a virtual electrode structure may be, for example, the one shown in Japanese Patent Application Laid-Open No. 11394/1983.

In this example, areas A, B, C, D or A', B
A cell is formed by ', C', and D'.

Also, each area A, 13. C, D, A', 13',
C', D'(D %L Potential level P-(A), P(B) as seen from the child.

P(C), P(D), P(A'), P(B'),
For example, P(C') and P(D') have the following relationship.

That is, if the voltage applied to each electrode is the same, P(A)=
P(A'), P(B)-P(B'), P(C), =
P(C').

P(D), , P(D') Also, the electrode PS1. P820. When a low level signal is applied to PS21, P(A)>P(f3)>f'(C)>P(D)P (A
')>P (13')>P (C')>P (D') One electrode Psi, PS20. When a high level signal is applied to PS21 P(C)>P(D)>P(A))P(B)P(C')
>P (D')>P (A')>P (B').

Furthermore, in the fifth embodiment of the present invention, each cell of the storage section 2 is wired so that a common voltage is applied to each two cells that are brought into instantaneous contact. That is, electrode P820. ．． Each PS21 is arranged for two predetermined adjacent cells, and the electrodes PS20 and the electrodes PS21 are commonly connected to each other by wiring.

Therefore, the electrodes for controlling the potential of each cell can be made larger, which simplifies manufacturing. Furthermore, the wiring pattern is also simplified.

Furthermore, in this embodiment, some of the cells in the storage section are arranged vertically shifted with respect to the remaining cells, so that the electrode PS20
When wiring PS21 and PS21 separately, the same electrodes can be connected horizontally. Therefore, for example, the electrode P820 is connected to a horizontal comb-like wiring pattern in which the right side in the figure is commonly connected, and the PS21 is installed in the gap between the comb teeth to a comb-like wiring pattern in which the left side is commonly connected. It is possible to connect wires, which simplifies the element manufacturing process.

Fig. 6 is a diagram schematically representing the cross section shown in Fig. 5 in order to explain such a potential level state.
The solid line shows the state when a low level signal is applied to each electrode, and the broken line shows the state when a high level signal is applied. The virtual electrode regions C1D, C', and D' are always maintained at a constant potential.

In addition, IL is an insulating layer such as Sin or (silicon oxide), 5B
A semiconductor substrate such as iSi (silicon), VE is a virtual electrode,
A/20. AI! 21 are electrodes PS20°PS21, respectively.
This is an aluminum wiring for applying pulses φ2° and φ2I to.

Therefore, for example, when the clock φ1 is once brought down to a high level and then dropped to a low level, at this falling edge, the charge mainly stored in region B is transferred to region D as shown in the figure. That is,
At the falling edge of the clock to each electrode, B - + D or HaB
The transfer '→D' is performed.

Further, the charges in D or D' are transferred to the B region or B' region by setting each electrode to a high level. That is, at the rising edge of the clock, the transfer from D-+B or I)' to 13' is performed.

Since this machine has 14 clocks, if the clocks φ2o and φ,1 are alternately supplied in synchronization with the clock φ1, the information in each row of the imaging section in FIG. 5 is distributed to a predetermined column of the storage section.

FIG. 7 is a diagram showing an example of an electrode pattern around the boundary between the storage section 2 and the horizontal shift registers 31 to 33 of the image sensor shown in the second diagram, and the same reference numerals as in FIG. 5 indicate the same elements. .

Furthermore, areas A", H", C", D", A'", B'"
, c′″, D”′ (7) Potential level/I/P(A″), P(B″) for IE child.

P(C゛′), P(D"), p(A"')", P
(B''), , P (C'''), P (D''') are 4 for each army.
holds true when the voltages applied to Ii are the same. Father, A″
, B″, C″, D″ or idA, B, C
, D, one cell is formed for each combination.

In addition, as shown in FIG. 7, when the storage section and a plurality of horizontal shift registers are connected, a distribution section 0 is provided, and within this distribution section O, cells near the boundary between the storage section and the horizontal shift registers are arranged in the vertical direction. Since they are arranged in a staggered manner, there is no need for the electrodes to intersect three-dimensionally when distributing the charge of each cell in the storage section to each horizontal shift register, which increases resistance to noise and simplifies the manufacturing process. That is, the distribution section 0 is constituted by the bottom row of the storage section, the gate electrode T3, etc., and is configured to give a predetermined different delay to each predetermined column of charges in a plurality of columns vertically transferred at the same timing within the storage section. In other words, this distribution section O is a parallel-series system that serially transfers charges that have been transferred in parallel. It is a means of conversion.

In addition, in this embodiment, there are 11 poles T in the distribution section.

Parallel-to-serial conversion is performed by , but it is also possible to form a distribution section by simply changing the length of each column of storage section 2 little by little and configuring it so that information from multiple columns is guided to one column of cells. good. The sixth invention of the present application also includes such a device.

Further, in this embodiment, some cells of the storage section are vertically shifted relative to other cells, but the structure of the distribution section is not limited to such a structure of the storage section. For example, the patent application 1986-18
Even a storage section structure as shown in Figure 7 of No. 1809 is applicable.

Next, the operation will be explained.

FIG. 8 is a diagram showing an example of the output timing of the signal source 7 in the configuration shown in FIG. 4. FIG. In the figure, pulse φ1. φ2o, φ
25. φ, l~φ18. As described above, when φT is at a high level, the potential level of each pixel in the image sensor is set to be low relative to electrons, and when it is at a low level, the potential level is set to be high. Imaging trigger switch 8
When activated, first a high-speed pulse of 16s + 16t
o * 1'21 +φT, φ1. ~≠1. By supplying , unnecessary charges are discharged.

Then, when the predetermined accumulation time TINT elapses, [period (4
−0): ], then in the period (4-1) the pulse φ,
The charges in the image pickup section 1 are then shifted row by row at high speed downward in FIG.

Also, among the information in each row shifted at this time, the information in odd rows is shifted to columns 201, 204, 205, 208 by the pulse φ□.
The information in even rows is transferred to column 2 by pulse φ,0.
02, 203, 206.207 and stored. FIG. 2 shows the state in which the information for one frame of the image pickup section is distributed and transferred to the storage section in this manner.

Also, in this state, the charges in the bottom row of the storage section in the figure are in the wells 305, 325, 329, 338°346.3 in FIG.
Also, the charges accumulated in each well are shown as charges A4.50 in FIG. B4. B3. A3. A2. Think about it in relation to B2.

That is, since the striped color separation filter shown in FIG. 3 is provided, the charges A4. IJ4 is 1L load corresponding to red, B3
．． A3 is a charge corresponding to green, and A2 and B2 are baking soda corresponding to positive.

Next, among the information stored in the storage unit 2 through the above process, the information stored in columns 208, 205, 204, and 201 is read out using pulses φ, 1.φ31 to φ3, and φ1.

ff1J, first, in period (4-2), by supplying ≠T three times, the charges in wells 305, 338, and 346 are sequentially shifted vertically, and finally in wells 317 and 31
3.309 respectively.

Next, in a period (4-3), pulse φ3. ~φ8. By supplying high-speed pulses, the charges in the wells 317, 313, and 309 are horizontally shifted to the left in FIG. this period(
The sum of 4-2) and (4-3) is, for example, l water period (l
H). Therefore, the image accumulated in the imaging unit 1 during the period (4-0) is either the signal of the first row or the period (4-0).
3) is read out.

Also, one pulse φ, 1 is added during this period (4-3). Well 301.334 in Figure 7
．． The charges in wells 3o5, 338, . 3
It is stored in 46.

Therefore, when three pulses of -T are supplied in the period (4-4), the charges in the wells 305, 338, 346 are taken into the horizontal shift registers 33, 32, 31, as in the period (4-2).

In the following period (4-5), by repeating the same sequence, only the charges in columns 208, 205, 204, etc., that is, the charges corresponding to the odd rows of the imaging section 1, are sequentially read out.

The total of these periods (4-1) to (4-5) is set to correspond to exactly l vertical periods. Next, in one vertical period (4-6), a pulse φ is generated. , φT, φ1
．． ~φ, 3 causes columns 207, 206, 203, 202 .
, etc. are similarly read out sequentially row by row.

In this way, in the still mode of the present invention, the signal 'f' for two fields formed simultaneously in the imaging section can be read out by sequentially interlacing one field at a time. No still l [! j image signal can be obtained.

Next, FIG. 9 is a timing diagram of the output pulse of the signal source when the switch 9 shown in FIG. Similarly to period (4-1) in Figure 8, the information in the odd rows of the imaging unit is transferred to columns 201°204, 205, 208 of the storage unit, and the information in the even rows is transferred to columns 2o2°203, 206, 207. “During period (9-2), pulses φ, 0
By applying one pulse to wells 305 and 325. ．． 3
Add the charges of 38 and 329.346 and 350. That is, charges A4 and B4, B3 and A3, A2 and B2, A
I and Bt are added, and then three pulses φT are applied to input charges into the registers 33-31.

Next, in period (9-3), pulses φ3, ~φ1. By horizontally transferring these and giving one pulse each of pulses φ20sφ2I, the charges of the second resistance C4 and B4, B3 and C
3. C2 and B2. DI and C1 are added, and this sequence is then repeated to obtain an l field signal. Sho period (9
-1) to (9-3) are set so that the total is one vertical period.

After that, in the period (9-4), by transferring the information of the imaging unit to the storage unit again, from the period (9-2) to (9-3)
The charge signals that have been formed in the imaging section up to this point are distributed and accumulated in the storage section in the same manner as in the period (971).

' In the subsequent period (9-5>), this accumulated information is added and read out. This is done by changing the combination of charge information.

That is, unlike the period (9-2), the pulse φ2° is changed to φ7. Since one pulse is output in advance, (AI-A4) of the imaging section is read out without being added, and (Bl-84), (C1-C4), and (DI-B4) are (El-H4), CFl-F'4) and (Gt~G4) are added and read out as one line, and finally (Hl-
H4) is read out as one line.

Therefore, the signals read out in periods (9-2) and (9-3) and the signals read out in period (9-5) are interlaced with each other. Furthermore, since two rows are added, the sensitivity of the element is also improved.

Next, FIG. 10 is a diagram showing a second embodiment of signal readout timing in movie mode.

In this embodiment, when adding odd numbered rows and even numbered rows, this is done at the boundary between the imaging section and the storage section.

The charge accumulated in the imaging unit during the period (10-1) is
, 1O-2), the pulse φ1. It is transferred to the storage section 2 by φ2゜ and φ2I, but at that time, φ
,. , φ, and I at the same time, the added charges are almost equally transferred to each pair of columns of the storage section. During the period (10-3), first pulse φ2° is applied to the column 2 in the well 305 of FIG.
08 and 207, columns 206 and 205 in well 338, and columns 204 and 203 in well 346 are collected and added, and then these charges are transferred to horizontal shift register 31 by
~33, and further φ, l~φ3. Read out horizontally. After that, pulses φ, 0, and φ2° are applied one by one for each lH, and then similar reading is performed to sequentially read out the addition output.

Next, during the period (10-3'), C1, 0-4), the charges accumulated in the imaging section are vertically transferred again during the period (10-5), but at this time, the pulses φ, φ, o .

By shifting the timing of φ2I from the period (10-2), a tinterlace effect can be obtained in which the combination of charges added near the boundary between the imaging section and the storage section is shifted by one line.

After period (1,0-6), period (10-3), (10-
Reading similar to 4) is performed.

In this way, even if the capacitance of each cell in the storage section is small, since the added output is once divided and then stored in each cell, the charge will not overflow.

(Effects) As explained above, according to the present invention, in a frame transfer type image sensor, the number of cells in the horizontal direction of the storage section is made to be at least twice the number of cells in the horizontal direction of the image pickup section. In the first invention, since a plurality of independent electrodes are provided for applying a common voltage to two predetermined adjacent cells of the intoxication section, the storage 4 (for controlling the four cells) is provided. The electrode can be made relatively large, and manufacturing is easy and yield can be improved.

Further, in the second invention of the present application, since some cells of the storage section and other cells are vertically shifted from each other, a connection pattern can be easily manufactured when each cell is controlled independently.

Furthermore, in the third invention of the present application, when a plurality of horizontal shift registers are provided, a distribution unit is provided between the storage unit and the horizontal shift register in order to distribute information in a predetermined column of the storage unit to a predetermined corresponding horizontal shift register. Since the horizontal readout frequency can be kept low, the transfer efficiency is high, and signal processing is facilitated.

Furthermore, in the fourth invention of the present application, an electrode is provided for commonly controlling two predetermined adjacent cells of the storage section, and a signal of a predetermined cell of the imaging section is transferred to a corresponding cell of the storage section. Since a signal source is provided to form a control signal for distributing the llI! Information on the second field is interlaced and images that can be separated and stored as two-field signals are arranged vertically shifted relative to the Ike cell, and a predetermined cell and other cells are controlled independently. Since a signal source for providing signals is provided, two field signals interlaced with each other can be obtained from a single imaging signal, and even in video imaging, the signals of each field can be interlaced with each other. However, in this case, in an imaging device using a 0-frame transfer type imaging device that can provide an imaging device that can increase the sensing range, the number of cells in the horizontal direction is A frame transfer type image pickup device having a storage section that is doubled or more, and a distribution section that is provided between the storage section and distributes information of a predetermined cell of the storage section to each horizontal shift register; Since a signal source is provided for controlling the distribution section so as to distribute the information of a predetermined vertical cell of the storage section to the corresponding horizontal shift register, the horizontal transfer frequency can be lowered and the readout signal can be Sample holding also becomes easier. Furthermore, since the clock pulse frequency is lowered, power consumption of the signal source can also be saved.

[Brief explanation of the drawing]

Figure 1 is a schematic diagram of the configuration of a conventional frame transfer type image pickup element, Figure 2 is a schematic diagram of the configuration of the frame transfer type image pickup element of the present invention, Figure 3 is an example diagram of a color separation filter, and Figure 4 Figure (d) is a schematic diagram of an imaging, recording, and reproducing apparatus using the image sensor of the present invention;

Claims (6)

[Claims] (1) In a frame transfer type imaging device having an imaging section and a storage section, the number of cells in the horizontal direction of the storage section is at least twice the number of cells in the horizontal direction of the imaging section, and the storage section has a predetermined number of cells. A frame transfer type imaging device in which two adjacent cells each have a common electrode separated from the others. (2) In a frame transfer type imaging device having an imaging section and a storage section, the number of cells in the horizontal direction of the storage section is at least twice the number of cells in the horizontal direction of the imaging section, and a part of the storage section A frame transfer type image sensor in which one cell is vertically shifted relative to other cells. (3) an imaging section, an accumulation section whose number of cells in the horizontal direction is at least twice the number of cells in the horizontal direction of the imaging section, and a plurality of horizontal shift registers for reading out information from the cells of the accumulation section; A frame transfer type image pickup device comprising a distribution section provided between a storage section and a horizontal shift register for distributing information of a predetermined vertical cell of the storage section to a corresponding horizontal shift register. (4) A frame that includes an imaging section, an accumulation section whose number of cells in the horizontal direction is at least twice that of the imaging section, and electrodes for commonly controlling two predetermined adjacent cells of the accumulation section. - An imaging device using a frame transfer type image sensor, which includes a transfer type image sensor and a signal source that forms a control signal for distributing a signal of a predetermined cell of the image sensor to a corresponding cell of the storage unit. (5) A frame transfer device that includes an imaging section and a storage section in which the number of cells in the horizontal direction is at least twice that of the imaging section, and in which a predetermined cell of the storage section is shifted in the vertical direction with respect to other cells. A frame having a type image sensor and a signal source for providing independent control signals to the predetermined cell and other cells.
An imaging device using a transfer type imaging device. (6) An imaging section, a storage section with the number of cells in the horizontal direction being at least twice that of the imaging section, and a plurality of storage sections for reading out information on the cells of the storage section, provided between the storage section and the water channel sister. and a distribution section for distributing information of predetermined cells of the storage section to each horizontal shift register. Sorting the information of a predetermined vertical cell of the storage section to a corresponding horizontal shift register