JPS6039988A - Picture signal converter - Google Patents

Abstract

PURPOSE:To reduce the scale of hardware by providing a multiplexer and a demultiplexer before and after an orthogonal converting circuit so as to avoid the resundancy of the circuitry. CONSTITUTION:A picture data inputted from a terminal 4 is latched tentatively in the multiplexer 6 and the latched N-data is fed to the orthogonal converting circuit 7. The circuit 7 make a calculation while a selection pluse SP remains low, the N-data is latched simultaneously to the demultiplexer 8 at the leading of the pusle SP when the one-dimensional orthogonal conversion is finished, and the data is outputted to the side of a memory one by one data during one period of the pusle SP. Further, the data subjected to the linear conversion is written in a #1 memory through a switch 11. The N-line's share of data which is already subjected to the one-dimensional conversion is stored in a #2 memory 10, and the N-data is read while the N-data is written in the memory 9.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an image signal conversion device that performs two-dimensional orthogonal transformation on a sandaled image signal in order to compress information.

Conventionally, this type of image signal conversion apparatus has had two orthogonal transformation circuits each performing one-dimensional orthogonal transformation in different directions in order to perform two-dimensional orthogonal transformation, as shown in FIG.

The orthogonal transform circuit is described, for example, in U.S. Pat. No. 4,302,775.
As shown in Figure 2, since the hardware is complex and the scale is large, having two of these circuits means that the hardware scale is 9.9% power consumption and cost.

There was a drawback that it was disadvantageous in terms of inspection, etc.

It is an object of the present invention to provide an image signal conversion device R that reduces the number of orthogonal conversion circuits to one, eliminates the above-mentioned drawbacks, and is advantageous in terms of hardware scale, power consumption, cost, inspection, etc., by having a multi-block circuit. It is.

According to the present invention, there is provided a single orthogonal transform circuit, a multiplexer provided before the orthogonal transform circuit to switch between a sandaled input image signal and a one-dimensional orthogonally transformed signal output from the orthogonal transform circuit, and an orthogonal transform circuit. By having a demultiplexer installed after the circuit and distributing the one-dimensional orthogonal transform signal and the two-dimensional orthogonal transform signal from the orthogonal transform circuit to the memory and the next stage circuit, one orthogonal transform circuit can perform two-dimensional orthogonal transform. An image signal conversion device that performs orthogonal transformation is obtained.

The present invention will now be described in detail with reference to drawings of embodiments of the invention. Referring to FIG. 2, one embodiment of the present invention includes two sets of switching devices 11. for simultaneous reading and writing.
12 and two sets of memories 9 and 10, and a multiplexer 6 and a demultiplexer 8 for using only one orthogonal transform circuit 7 twice. Here, the orthogonal transformation is 1
Divide both sides into blocks of N (pixels) x N (pixels), and
Conversion shall be performed for each pro tour.

Next, the overall operation of one embodiment of the present invention will be explained.

The image data input from the terminal 4 is temporarily latched to the multiplexer 6, and the one-dimensional orthogonal transformation begins at the falling edge of the select pulse SP (see figure m3).
The N data selected and latched are simultaneously supplied to the orthogonal transform circuit 7.

In the orthogonal transform circuit 7, calculation is performed during the select pulse S P currow, and at the rising edge of the select pulse SP that completes the -dimensional orthogonal transform, N data are simultaneously latched in the demultiplexer 8, and one cycle of the select pulse is applied to l. Data is output to the memory side one by one. The -dimensionally converted data is then written to the #l memory 9 through the switch 11.

f#2 memory IO contains N24 which has already been converted to -dimensional
Seven minutes of data is stored, and while N data is written to #1 memory 9, N data is read out. This N
The data is data sampled perpendicular to the line.For example, at the third data scale from the end of the line, N
Data sampled across the line. Wet
The extracted data 14 is passed through the entire QJW unit 12 and latched into the multiplexer 6. At the rising edge of the select pulse, N data are simultaneously selected by multiplexer 6,
The signal is supplied to the orthogonal transform circuit 7. In the orthogonal transformation circuit 7, while the select pulse SP is high, the data that has already been subjected to the -dimensional orthogonal transformation is further subjected to one-dimensional orthogonal transformation to obtain a two-dimensional old orthogonal transformation output. The two-dimensional orthogonal transformed data is sent to the demultiplexer 8 when the select pulse SP falls at 9.
N data are latched at the same time, and each l data is outputted to the terminal 5 by applying one cycle of the select pulse.

Next Vc #1 memo! /9. #2 Memory IO and switch 11
．． 12 will be explained based on the timing chart of FIG. #lMemo', +9. If each $2 memory 10 has N247 minutes, that is, 1 line and 2 M pixels, then Mx
It has the capacity to store image data for N pixels. This is because N data in the direction perpendicular to the line are required when further transforming the data that has been subjected to the -dimensional orthogonal transformation. Since data reading and writing are performed at the same time, when N lines of image data that have been subjected to one-dimensional orthogonal transformation are drawn into #l memory 9, N2 of #4 #2 memory lO
The reading of the one-dimensional orthogonally transformed image data of 47 minutes is also completed. Then, by switching switches 11 and 12 to the opposite side, the roles of the memory are swapped.

The image data subjected to -dimensional orthogonal transformation is read from #1 memory 9, and the image data subjected to one-dimensional orthogonal transformation is written to #2 memory IO. In this way, writing data into the memory section and reading data in the direction perpendicular to the line are performed simultaneously.

In FIG. 3, SP is a select pulse, Ml is a diagram showing the operation switching state of the orthogonal transform circuit 7, Dl is input image data, and D
2 is one-dimensional conversion data of multiplexer 60 input, D3
are diagrams showing the timing of two-dimensional conversion data from iMMl -Ml +M2 is #l memo! 79. FIG. 4 is a diagram showing mode 4 of the $2 memory IO.

As explained above, according to this embodiment, the multiplexer,
By using a demultiplexer, two-dimensional orthogonal transformation can be performed by effectively utilizing one orthogonal transformation circuit. Note that this blood'9 conversion circuit has twice the calculation speed compared to the conventional orthogonal conversion circuit that uses two, but such a calculation speed is not suitable for use with a platform used for transmitting still images, etc. is easily obtained. Therefore, the hardware size and size of the device can be reduced, which is very advantageous in terms of power consumption, cost, inspection, etc. Furthermore, as is clear from the description of the embodiments, it goes without saying that the present invention can be used for various orthogonal transformations without being limited to any orthogonal transformation method.

As explained above, the present invention eliminates circuit redundancy by providing a multiplexer and a demultiplexer before and after one orthogonal transform circuit, and reduces the hardware scale.
An inexpensive orthogonal transform device with low power consumption can be provided.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of conventional technology. FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a block diagram showing an embodiment of the present invention.
O is a timing chart of an embodiment of the present invention.

Claims (1)

[Claims] an orthogonal transform circuit that performs a predetermined orthogonal transform; a multi-blephr that is provided before the orthogonal transform circuit and receives and outputs a sampled input image signal and a signal that has been orthogonally transformed; and a signal that has been orthogonally transformed. a memory having a writing area and a reading area; and a demultiplexer provided at a subsequent stage of the orthogonal transformation circuit and outputting a signal that has been orthogonally transformed once to the memory as an output signal that has been orthogonally transformed twice; An image signal converting device characterized in that a signal read out from a multi-blephr is supplied to a full multi-bleph sensor to obtain a two-dimensional orthogonally transformed image signal.