JPS6037585A - Data feedback type cryptographer - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a data feedback type encryption device for encrypting digital information.

[Background of the invention]

The principle of encryption and decryption in mechanical cryptographic devices is based on the so-called exclusive OR operation. Now, data M,
When the key is , and the ciphertext is C, the encryption is performed by performing the calculation =C on M and transmitting the ciphertext cl. However, the operation symbol means exclusive logical interest rate. The receiving side has the same key K as the sending side, and decrypts by performing the calculation N=CeK-(M■K)■=M. In other words, it is based on the property that ■=0.

Figure 1 shows a system diagram of a conventional mechanical cryptographic device.
The digital information C encrypted by the transmitter 5 is sent to the transmission line 7, and is received and decoded by the receiver 6. In the transmitter 5, the mechanical random number generator 52 takes the key number 3-(l) from the key setter 53 and uses it as a key for random number generation, and the clock generator 54 generates a random number-like code using the clock signal. This random number-like code and data M are logically operated by an exclusive OR circuit 51 to generate a cryptogram C. In the decoder 6, a mechanical random number generator 6 is used in exactly the same way as the encryptor 5.
Generate a random number-like code from 2 and connect it and input C to circuit 61
Perform exclusive OR and decrypt. The random number-like code used in this encryption and decoding process needs to be the same in the transmitter 5 and receiver 6. For this purpose, it is necessary not only to have the random number generators 52 and 62'i of the same structure, but also to synchronize the start timing of the random number-like code between the transmitter and the receiver. In order to synchronize this start timing, the following technology has conventionally been used and a synchronization circuit 65 has been required.

(1) Start code for synchronization (2) Reference signal transmission method (3) Universal timing Among these, the start code for synchronization uses a short special code, and by receiving it with a receiver, the synchronization 14 days can be started. #6
0-37585 (2).

The reference signal transmission method is a method of achieving synchronization using a reference signal for synchronization acquisition. Specifically, it is a method of transmitting a synchronization signal on a separate channel or superimposed with the data signal.

Universal timing is a method of synchronization by creating an accurate and reliable universal time. However, using either of these methods requires a synchronization circuit on the receiving side, which has the drawback of complicating the device.

[Purpose of the invention]

An object of the present invention is to provide a data feedback type cryptographic device that does not require the above-mentioned random number code synchronization circuit and is suitable for downsizing and simplification.

[Summary of the invention]

The present invention is characterized in that the random number generator used in encryption and decryption is constructed from a simple logic circuit that receives cryptograms as input.

[Embodiments of the invention]

The present invention will be explained in detail below. Figure 2 is the original 5? + This is a block diagram showing an embodiment of the present invention, in which the random number generators 59 and 69 of the transmitter 5 and the receiver 6 are both given a code C as an input, and examples of their configuration are shown in FIGS. 3 and 6. 4
As shown in the figure. Among these, in the transmitter of FIG. 3, the current input data M = Mn.

When the ciphertext C=Cn-1, when the clock is input, each bit of the shift register 82 becomes D3""Cn-,, p2=Cn-2, 1)1=Cn-1
・-Group-(11. Now, if the switch 83 is connected to the solid line side by the tri key setting device 53, the output B==Bn of the exclusive OR circuit 81 is 13y1==D3 of D2 "'"' (21. Therefore, Cn = Mn (f) Bn -- (3) is output as the ciphertext Cn. Now, the shift register is in the initial state DI = l) 2 = D3
Assuming that = Q is set, input example M: 14, 1,
Equations (1) to (3) when given 5,9.12.7.8 (input string expressed in decimal 4 bits at a time)
Table 1 shows the ciphertext C generated according to the following.

7C1 That is, corresponding to the above input example, the ciphertext sequence C = 12゜1
0, 10, 4, 5, 10, 5 are obtained. When the switch 83 is connected to the dotted line by the key setting device 53, the equation (2) may be changed to Bn == D3■s = D3 (4).

Next, in the receiver of FIG. 4, the received data f C at a certain point in time
= Cn, if the selection of the switch 93 by the key setting device 63 is the same as that on the sending side, the random number generator 69 has exactly the same structure as the random number generator 59 on the sending side and has the same input.

Therefore, the output F==Fn of the random number generator 69 is Fn::D3■D2 -Bn -... (51,
Output N from exclusive OR circuit 61 = Nn times Nn
= Cn■Dn = Bn of Mn eBn = Mn
.=-(6) and is correctly decoded. Table 2 shows this decryption process (51, (61) for the output Cn of the encryption example in Table 1. As is clear from Tables 1 and 2, Nn = Mn. You can see that it is decrypted correctly.

9C: In the above embodiment, the random number generators 59 and 69'i are configured by three stages of shift registers and one logic circuit (exclusive OR lr+1 path), but the number of stages of the shift register and the number of logic circuits are different. Various modifications are possible in the configuration and the insertion of switches associated with them, and the key point is that the random number generator 59
, 69 have the same configuration and the same ciphertext c6 manually, and it is clear that it is sufficient to set the keys to be the same so that Fn = Bn in equation (5) holds true.

〔Effect of the invention〕

As is clear from the above description, the present invention does not require multiple random number generators, does not require a random number start synchronization circuit, and has an extremely simple circuit configuration that achieves high reliability and is compact and lightweight. This has the effect of realizing a device.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of a conventional cryptographic device;
4 to 4 are diagrams showing embodiments of the present invention. 5...Transmitter, 6...Receiver 51, 61...
Exclusive logic 10-page sum circuit 59, 69...Random number generator, 81, 91...
...Exclusive OR circuit, 82, 92...Shift register, 83, 93...Switch, M...Input data, C...Ciphertext, N...Decrypted text. Representative Patent Attorney Tadashi Akimoto Jitsu 1 Cause 2 Figure 5-11--I"Concave-m"> L+ -, : , /'"' J/1 3rd cause 1 4th evil gro. , Ri (64yosu)

Claims (1)

[Claims] 1. The transmitter and the receiver each include a shift register for delaying an input signal and a logic circuit for performing a logical operation on the delayed signal of the shift register to generate a random number. In addition to providing a structured random number generation means, the transmitter generates a ciphertext by exclusive ORing the input data and the output random number of its own random number generation means, and uses the generated ciphertext as an input signal of its own random number generation means. The receiver uses the transmitted ciphertext as an input signal to its own random number generation means, and calculates the exclusive OR of the output random number of the random number generation means and the transmitted ciphertext. A data feedback cryptographic device, characterized in that it is configured to decrypt the ciphertext. 2. The data feedback type cryptographic device according to claim 1, wherein the configuration of the logic circuit in the random number generating means of the transmitter and receiver is configured to be changeable by external settings. 2 pages