JPS6029077B2 - Multi-radar video display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device that displays information from a plurality of search radars by aligning the coordinates with one PPI indicator or the like.

As a search radar indicator, a PPI system synchronized with the rotation of the antenna is usually used.

The search range of a radar is limited by the radar capability and the curvature of the earth, so in order to search a wide area with radar, multiple radars are required. It is also desired to simultaneously display the coverage areas of multiple radars on one display screen at the same coordinates. Generally, the antenna rotation and radar repetition frequency of each radar are asynchronous with each other, so it is difficult to superimpose multiple radar images on the same indicator. In order to solve this problem, each radar video signal is passed through a scan converter, and a p-8 sweep (PPI
A method of converting the signal (sweep) to a television (TV) signal is being considered. In other words, by utilizing the fact that the TV scanning signal on the readout side is common to each radar system through the storage tube, and by mixing the video signals after TV conversion, it is possible to display multiple radar videos on the same indicator screen. That is. However, this method requires an expensive scan conversion device for each radar, and since it is a method of combining after scan conversion, errors in the individual scan conversion systems cause errors in alignment between multiple radars. have. On the other hand, with a digital processing method that digitally determines the presence or absence of a target by quantizing the radar target signal, it is extremely easy to display multiple radar information on a common coordinate system. Determining the presence or absence of radar is beyond the level of recognizing raw radar video information with the naked eye.

SUMMARY OF THE INVENTION Therefore, it is an object of the present invention to provide a multiple video display device that displays raw video signals from multiple radars at common coordinates with high positional accuracy.

According to the present invention, in a multi-radar video display device that receives a transmission synchronization signal, a video signal, and an antenna rotation angle signal from each of a plurality of radars located at different positions, and displays the video signals on a single display with a single coordinate. , a circuit for time-compressing the respective transmission synchronization signals and video signals, a circuit for storing the time-compressed video signals, and a circuit for receiving the time-compressed transmission synchronization signals and transmitting them to each radar in the order in which the signals are generated. a PPI sweep signal for each radar based on the antenna rotation angle signal and an offset signal corresponding to each radar position in the single coordinate; a combining circuit for combining the PPI sweep signals for the plurality of radars; a circuit for reading the compressed video signal for the assigned radar during the presence of the respective display time allocation signal; and means for combining the read out video signals into a single video signal and supplying the video signal together with the combined sweep signal to the display.

The multiple video display device according to the present invention time-compresses the video signals from each radar, temporarily stores the compressed video signals, rearranges them on the time axis, and integrates the multiple video signals. converted into a single video signal.

At the same time as this video signal is time-compressed, the transmission trigger signal of each radar is also time-compressed. Then, the display allocation time for each video signal is determined in the order in which the time-compressed transmission trigger signals are received.
A sweep signal for each radar is generated in synchronization with this display assignment signal. At this time, an offset signal (DC voltage) is included in the green signal to compensate for differences in the installation positions of the radars and display them in a common coordinate system. Reading of the temporarily stored time-compressed video signal is performed using the display assignment signal, and the video signal and the corresponding sweep signal are synchronized. The multiple video display device according to the present invention is based on the above-described principle and does not require processing such as scan conversion, so that there is little deviation in video display position, and the structure is simple and economical.

The present invention will be described in detail below with reference to the drawings.

FIG. 1 is a diagram showing the relative positional relationship of the coverage areas of two radars on a map.

The ten marks indicate the installation location of each radar, and the two circles indicate #1 each.
and represents the searchable range (overturning) of #2 radar, and the area surrounded by two circles is observed on the PPI indicator. The shaded area is an area that can be observed overlappingly by both radars. If we consider the observation of a moving object by radar, if an object moves from being overshadowed by one radar to being overshadowed by another radar, for example, the shaded area in the diagram is one PP.
It is desirable to simultaneously observe and compare information from both radars on the radar.

The present invention makes this possible. Referring to FIG. 2, a block diagram of a multiple video display device according to the present invention for displaying two radar videos on one PPI is shown.

FIG. 3 shows the signal waveform diagram of each part. The video signal VI of the #1 radar is temporally compressed to ⅓ by the video compressor 11 and becomes signal 3.

FIG. 3 shows a signal 3 obtained by time-compressing the signal VI by delaying it by one radar sweep. video compressor 1
1 is realized, for example, as follows.

The input analog waveform is converted into an n-bit digital signal at appropriate time intervals 7, and this is recorded in a memory. There are two sets of memory devices, and writing and reading are performed alternately for each radar sweep. If reading is performed every 7/hour in the order written in the next sweep that has just been recorded, time compression of the waveform (to 1/3) will be realized, although there will be a delay of one sweep time. In addition, in the above-mentioned digitization, all signals are converted to analog signals without determining the presence or absence of a video signal, and it is generally easier to identify the target by visually judging the presence or absence of the target signal from the video signal displayed on the PPI display screen. is performed accurately. Similarly, the video signal V2 of the #2 radar is temporally compressed to ⅓ by the video compressor 12 to become a time-compressed video signal 4.

A timing generator 21 supplies necessary timing signals to these. On the other hand, the transmission trigger pulse T from each radar,
, L are time-compressed together with the video signal by video compressors 11 and 12, respectively, and are processed as video display requests 201 and 2, respectively.
02 and is registered in the radar trigger register 31 on a first-come, first-served basis. If there is a request 8 to display a map or the like other than radar video, this is also registered in the radar trigger register 31. The timing control unit 41 allocates display time according to a request from the radar trigger register 31, and when one display request is completed, it accepts the next request from the radar trigger register 31. The signal S in FIG. 3 indicates the remaining time after accepting the displays of radars #1 and #2, and it is possible to accept the request 8 for displaying a map, etc. in FIG. 2 during this time. The storage devices 51 and 52 store one sweep of the compressed video of the #1 and #2 radars, respectively, and output the respective video signals in response to display permission signals 212 and 213 from the timing control section 41. The video synthesis converter 61 has a function of mixing the respective video signals and finally converting them into analog signals if they have been digitally processed. This output signal 5 corresponds to signals 3 and 4 as shown in FIG.
It is synthesized by shifting them serially in time. Now, the radar PPI display method creates a P-8 sweep signal and modulates the brightness of this with the radar video signal to create a CRT screen, so in order to display a composite radar video, it is necessary to It is necessary to create a composite signal as well as a video signal.

A sweep signal generation circuit 71 generates a sweep signal for each radar based on the antenna rotation signals 9 and 10 (north pulse signal and fine 4/fluctuation angle signal) of radars #1 and #2. Based on the control of the timing control unit 41, X and Y bias signals for CRT deflection of the radar system assigned to that time are created, and the coordinates of each radar installation location are used as offset voltages. Of course, this can be added to the so-called radar offset position. Then, a sweep signal synthesis circuit 81 synthesizes the sweep signals for each radar from the sweep signal generation circuit 71 into a single sweep signal. Signals 6 and 7 in Figures 2 and 3 are composite sweep signals, respectively. Waveform R represents the X- and Y-axis deflection voltage waveforms of the CRT. Waveform R represents the X-axis deflection voltage waveform for #1 radar before video compression. It shows. That is, it can be seen that waveform 6 is obtained by phase-shifting waveform R, temporally compressing it to 1/3, and adding an offset voltage. Referring to FIG. 4, there is shown a PPI display surface brightness modulated with a composite video signal 5 produced by the apparatus shown in FIG. 2 and swept with sweep signals 6 and 7. A #1 radar sweep is performed centering on a position P, which is shifted from the coordinate origin 0, and a #2 radar sweep is performed centering on another point P2. Referring to FIG. 5, a detailed block diagram of one embodiment of the radar trigger register 31, timing control section 41, and composite sweep signal generation circuit 71 shown in FIG. 2 is shown.

FIG. 6 shows a timing diagram of the respective signals. Video display request signals (time compression transmission triggers) 201, 202 from the video compressors 11, 12 are registered as trigger inputs by setting flip-flops 101, 102.

Output 2 of set flip-flops 101 and 102
At this time, 05, 206 checks whether the previous signal is still being displayed (pidgey) by performing a logical sum with the signal 211 in AND gates 104, 105, and if it is not busy, outputs display start signals 208, 209. display permission register 107 (for #1 radar) of the timing control unit 41,
Set 108 (for #2 radar). The display permission registers 107 and 108 are made of, for example, monostable multi/disable registers, and create display permission signals 212 and 213 having a predetermined display time pulse width in accordance with display request signals 208 and 209. In addition, display request signal 2
08 and 209, the flip-flops 101 and 102 are reset. The detailed timing relationship of these signals is as shown in FIG. A new display is started after the busy signal 211 is released.

Of course, if the pulse repetition period of either the video display request signal 201 or 202 becomes extremely short, further measures will be required. The busy signal 211 corresponds to the remaining time after the synthesized video signal is displayed, and corresponds to the signal S in FIG. 3.

Therefore, in FIG. 5, by providing a system of flip-flop 103, AND gate 106, and display permission register 109, it becomes possible to accept display request 8 for a map or the like at this time. A signal 204 is a clock signal from the timing generator 21, and is used to synchronize operations and prevent oscillation due to loops.

In order to prevent malfunction, all digital circuits are often operated in synchronization with the same machine using a clock signal, but this is omitted in this embodiment to simplify the circuit. Further, the control of the signal 206 by the inverter 1101 is performed by the radar triggers 201 and 202.
This is to give priority to the trigger signal 201 when the two signals come in at the same time, and to prevent confusion in the circuit. The display permission signals 212 and 213 are sent to the storage device 51 (#1
(for radar) and 52 (for #2 radar) to extract each compressed radar video signal.

The display permission signals 212 and 213 are simultaneously supplied to a sweep signal generation circuit 711 to generate a corresponding sweep signal.
The display permission signal 214 is applied, for example, to the video synthesis converter 61 in FIG. 2, and extracts a brightness modulation signal 8' for displaying a map or the like. The sweep signal generation circuit 71 includes sweep signal generation circuits 711, 712, and 713 for #1 radar, #2 radar, and graphic. Since each circuit is similar, only the #1 radar is shown in detail in the figure. The radar rotation signal 9 (for #1 radar) is first sent to the angle counter 111, and from the rotation angle 0, the Sina and Cosa signals are sent to the Sine generators 1, 12, and Co.
Created with s generator 1 13. The Sina signal is supplied to a sawtooth wave generator 114, and a sawtooth wave having a maximum amplitude proportional to its value is generated. When the display permission signal 212 is not present in the sawtooth wave generator 114, the short circuit 124 thereof is short-circuited and the integration operation is stopped, so that the sawtooth wave is generated only when the display permission signal 212 is present. This mirror tooth wave signal is applied to the #1 radar offset voltage 215 by the adder 1.
After addition in step 16, the signals are sent to the X-axis deflection sweep signal synthesis circuit 81 of the #1 radar. The same goes for the Cos8 signal, which is sent to the sweep signal synthesis circuit 81 as the Y-axis deflection signal of the #1 radar via the mirror-tooth wave generator 115 (the detailed circuit is the same as 114, so it is omitted) and the adder 117. It will be done. The sweep signal synthesis circuit 81 is composed of an An x-axis sweep signal 6 and a Y-axis sweep signal 7 are respectively applied to the X-axis and Y-axis deflection terminals of the CRT. Even when there is a display request signal 8 such as a figure, it is displayed in the same way as the Sin8 signal. An example in which two radar videos are temporally compressed to 1/3 and displayed in a composite manner has been described above.

However, the degree of time compression is arbitrarily determined as necessary, taking into consideration the amount of information to be handled, the number of radars, the visibility of the display screen, etc. It is obvious that the present invention can be applied to changing the degree of time compression for each radar and to sweep methods other than PPI. The device of the present invention has a major feature in that it displays and controls video signals from a plurality of radars whose antenna rotations and transmission pulse periods are completely asynchronous at independent timings. That is, in the case of a single radar, video compression or the like may be performed in order to obtain the display time of symbols, etc., but this system is a device that incorporates these in a unified manner from the concept of independent synchronization.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the relative positional relationship of the fortresses of multiple radars on a map, FIG. 2 is a block diagram showing an embodiment of the multiple radar video display device according to the present invention, and FIG. 3 is a diagram showing each part in FIG. 2. 1 is a timing diagram of a signal. FIG. 4 is a diagram showing how the device shown in FIG. 2 sweeps on the indicator. Fig. 5 Hashider trigger register 31
, timing control section 41 and sweep signal generation circuit 71,
A detailed block diagram of the sweep signal synthesis circuit 81, FIG.
It is a timing diagram of each part signal in a figure.
In each figure, each reference number is 11, 12...video compressor, 21...timing generator, 31...radar trigger register, 41...timing control unit, 51,
52...Storage device, 61...Video synthesis conversion unit, 71
... sweep signal generation circuit, 81 ... sweep signal synthesis circuit, 1
01~103...Flip-flop, 104~106...
・AND circuit, 107-109... Display permission register, 110... Inverter, 111... Angle counter, 1
12...sin generator, 1 13...cos generator, 114
, 115... sawtooth wave generating section, 116, 117...
Adder, 118...×-axis deflection sweep signal synthesis unit, 119
. . . shows the Y-axis deflection composite part. Sai ↓ Illustration 2, Figure 3, To 4, Box 5, Ki, Illustration S

Claims (1)

[Claims] 1. In a multi-radar video display device that receives a transmission synchronization signal, a video signal, and an antenna rotation angle signal from each of a plurality of radars located at different positions, and displays the video signal on a single display with a single coordinate, each of the transmission a circuit for time-compressing a synchronization signal and a video signal; a circuit for storing the time-compressed video signal; and a circuit for receiving the time-compressed transmission synchronization signal and storing the video signal related to each radar in the order of generation of the signal. a circuit that generates a display allocation signal that allocates display time; and a circuit that generates a PPI sweep signal for each radar based on the antenna rotation angle signal and an offset signal corresponding to each radar position in the single coordinate; a synthesis circuit for synthesizing these PPI sweep signals for the plurality of radars; a circuit for reading out the compressed video signal for the assigned radar while the respective display time allocation signals exist; and a circuit for reading out the compressed video signal for the assigned radar; a plurality of video display apparatus, comprising: means for combining a video signal into a video signal and supplying the combined sweep signal to the display device along with the combined sweep signal.