JPS60252965A - Event accumulating device - Google Patents

Abstract

PURPOSE:To enable collecting event data in a data processing device freely from a service processor by making a counter provided in the data processing device freely controllable by the service processor. CONSTITUTION:A counter 4 is provided in the data processing device 1, and the counter 4 and a service processor 2 are connected electrically by interfaces 100- 102. This counter 4 can be controlled directly from the service processor 2. Thus, the service processor 2 can collect freely various event data generated in the data processing device 1.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an event accumulating device for accumulating or measuring the state of an event signal in a data processing device using a service processor.

(Prior Art) When a data processing device is designed, it is important to check whether it satisfies the original design goals and how it will work on the device when a new job or program is executed on the device. In order to solve the problem of what kind of movement is required or what points need to be improved in order to improve the execution performance of the job, it is necessary to collect various event data on the data processing device, such as processor data. It is necessary to collect and analyze data such as page opening times, memory access times, and cache memory hit rates.

Conventionally, this type of data collection and measurement has been accomplished by extracting a status signal indicating the event from the device and using an external counter device or monitor device. In the near future, the performance of data processing devices continues to improve, and as their basic clocks become faster, it is becoming impossible for external measurement devices to keep up with the above performance improvements.

In addition, this type of data includes the cumulative amount of time that the event signal is in the logic "1" state, the number of times this state occurs, and the cumulative amount of time that the event signal is in a specific state in relation to multiple signals. It is necessary to measure time and number of times, and collecting that data has become increasingly difficult.

On the other hand, service processors have been used for the purpose of diagnosing and maintaining data processing equipment. Such a service processor consists of a processor independent of the data processing device, and is equipped with a keyboard, a printer, a CRT display, and a disk device for data storage, and maintenance personnel can control the data processing device by operating it from the service processor. There was a problem with maintenance.

(Object of the Invention) The object of the present invention is to provide a counter for accumulating the state of event signals inside a data processing device and to enable control from a service processor, and to add additional hardware to the above. It is an object of the present invention to provide an event accumulation device configured to eliminate the drawbacks and to be able to collect internal event data from a service processor of a data processing device operating at high speed.

(Structure of the Invention) The event accumulation device according to the present invention includes a data processing device connected to a service processor through a diagnostic interface, and is strangely configured to include a plurality of counters and control means.

The plurality of counters input arbitrary event signals inside the data processing device as signals to be measured, and are operated according to instructions from the service processor.

The control means sets the plurality of counters to an initial state according to instructions from the service processor, sets a mode that defines the operation of the counters, instructs the plurality of counters to start and stop the operation, and controls the plurality of counters. When the content of a specific counter reaches a predetermined value, the operation of all counters including the specific counter is stopped simultaneously, the stopped status is reported to the service processor, and the content of multiple counters is This is for instructing people to read.

(Example) Next, the present invention will be explained in detail with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, 1 is a data processing device, 2-digit service processor, 3 is a data processing section, and 4 is a counter section.

In FIG. 1 showing an embodiment of the present invention, a data processing device 1 includes a service processor 2 and a diagnostic interface 1.
They are connected by 00 to 102. Data processing device 1
Although it is equipped with a data processing section 3, its detailed explanation will be omitted since it is directly related to the present invention. The data processing device 1 includes a data processing section 3 and a service processor 2.
There is a counter section 4 between the two. Any signal line indicating an internal operation event of the data processing section 3 can be connected to the counter section 4 as its input. That is, the signal line group of the data processing section 3 is connected to the connector section via a plurality of cable connections in signal units, and data processing can be performed by changing the connection between any of the connector sections and the counter section 4. The connection between section 3 and counter section 4 is made by bus ill.
Connected by ~lln. The signal input to the counter section 4 is subjected to data accumulation and collection under the control of the service processor 2.

The details of the counter section 4 will be explained below with reference to FIG. 2. In FIG. 2, 41 is a counter control section, 42
43 is a conversion circuit, 441 to 44m are first to mth counters, and 45 is a second selection circuit.

The counter section 4 includes m counters 441 to 44m that operate independently. A first selection circuit 42 for selecting m event signals from the n signal lines 111 to lln from the data processing unit 3, and a conversion circuit 43 for converting the selected signals. The signals output and written via the signal lines 141-14m become update signals for each counter. A latch circuit that synchronizes the input signal of the conversion circuit 43, the input signal changes from logic 110# to logic +11
It consists of a differentiation circuit for converting into a pulse corresponding to one machine cycle when the logic changes to 11, and a pulse circuit for converting it into a pulse when the logic changes from logic "l#" to logic "0".-7) , and each counter 441~
The contents of 44m are converted by the second selection circuit 45 and sent to the service processor 2 via the signal line 102. The counters 441 to 44m1 inside the counter unit 4, the first selection circuit 42, the conversion circuit 43, and the second selection circuit 45 are controlled.

Commands from the service processor 2 to instruct the operations of the counters 441 to 44m include counter initialization, counter start, counter stop, and counter operation mode set. The counter initialize command sets the counter section 4 to an initial state, and with this command, all bits of the counters 441 to 44m are cleared to zero, and the counters are placed in a stopped state in which no accumulation operation is performed. The counter start command is for starting the operation of each counter, and with this command, the counters 441 to 44m update their contents according to the state of each input signal 141 to 14m,
The logic "1" state of each event is accumulated in machine cycle units specified by the operation mode. This update behavior causes
It is possible to accumulate the cumulative time and number of occurrences of events. The counter stop command applies to all counters 441~
44m. Counters 441-44
The operation mode set command m is for setting the operation mode of the counter section 4, and this mode includes one for specifying the selection of the first selection circuit 42, one for specifying the operation of the conversion circuit 43, and one for specifying the operation of the conversion circuit 43. There is one that specifies the selection of the selection circuit 45, and one that specifies the operation of the counter. The operations of the counters 441 to 44m consist of designating their update cycles and designating their stop modes. counter 441
The update cycle of ~44m specifies whether to perform one update every machine cycle, and a false one specifies whether one update is to be performed every two or more specified machine cycles. The stop mode is a mode for specifying whether or not to stop updating the contents of all counters when the contents of any of the counters 441 to 44m reach the maximum value.

The collection of data by controlling the counter section 4 from the service processor 2 will be described below with reference to FIG.

When starting data collection, the service processor 2 first sets the operating mode of the counter section 4. Next, the counters 441 to 441 are reset by the counter initialize command.
After clearing 44m, the counter start command is used to instruct the start of updating. With this start instruction, the counters 441 to 44m perform update processing according to the input signals, but if a mode is specified that stops processing when any of the counters 441 to 44m reaches the maximum value, this state will occur. When the maximum value is reached, all counters are stopped and the service processor 2
Sends a stop signal to.

After instructing the start of the counter, the service processor 2 waits for this stop signal to be sent, selects the data by the second selection circuit 45 based on this signal, and selects the data for each counter by specifying the operation mode. The contents are read via the signal line 102. The read data is accumulated in the internal storage section of the service processor 2, and if more measurements are specified, the counter initialization operation is resumed and the next data continues to be collected in the same manner as above. When the measurement is completed, the data accumulated in the storage section is totaled and printed out.

As explained above, by switching the signal lines 111 to 11n for connecting between the data processing section 3 and the counter section 4, an arbitrary event signal from the data processing section 3 can be inputted to the counter section 4, and further The signal is sent to the first selection circuit 42.
is selected by the counters 441 to 441 through the conversion circuit 43.
By using this signal as a 44m new signal and controlling it arbitrarily from the service processor 2, data of any signal can be freely collected.

Furthermore, by editing and outputting the data collected inside the service processor 2 in various formats, various event data can be obtained inside the data processing device 1, and performance analysis of the data processing device 1 can be performed. It becomes possible to do so.

(Effects of the Invention) As explained above, the present invention has a counter installed inside the data processing device and is configured to be able to be controlled arbitrarily from the service processor. This has the advantage that internal event data can be freely collected, and data can be collected even in high-speed data processing devices.

[Brief explanation of drawings]

FIG. 1 is a block diagram illustrating one embodiment of an event accumulator according to the present invention. FIG. 2 is a block diagram showing details of the counter section shown in FIG. 1. FIG. 3 is a flowchart showing an example of the operation in the embodiment shown in FIG. 1... Data processing device 2... Service processor 3
...Data processing section 4...Counter section 41...Counter control section 42...Selection circuit 43, 45...
Conversion circuit 441~44m...Counter 100~10
2, Ill-lln, 131-13m,
141-14m, 151-15m” - Signal line patent applicant Hisashi Inoro, agent for NEC Corporation, patent attorney

Claims (1)

[Claims] In an event-based system # that includes a data processing device connected to a service processor through a diagnostic interface, any event signal inside the data processing device is input as a signal to be measured, and the signal is measured according to instructions from the service processor. a plurality of counters for operation; setting the plurality of counters to an initial state according to instructions from the service processor; setting a mode that defines the operation of the counters; and starting and operating the plurality of counters. When the content of a specific counter among the plurality of counters reaches a predetermined value, the operations of all counters including the specific counter are stopped simultaneously, and the stopped state is changed to the service. 9. An event accumulator comprising control means for reporting to a processor and instructing the processor to read the contents of the plurality of counters.