JPS60244810A - Memory cassette type data gathering and recording device with automatic interval function - Google Patents

Memory cassette type data gathering and recording device with automatic interval function

Info

Publication number
JPS60244810A
JPS60244810A JP10120084A JP10120084A JPS60244810A JP S60244810 A JPS60244810 A JP S60244810A JP 10120084 A JP10120084 A JP 10120084A JP 10120084 A JP10120084 A JP 10120084A JP S60244810 A JPS60244810 A JP S60244810A
Authority
JP
Japan
Prior art keywords
data
latched
recorded
latch
time
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10120084A
Other languages
Japanese (ja)
Inventor
Akihide Harada
証英 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP10120084A priority Critical patent/JPS60244810A/en
Publication of JPS60244810A publication Critical patent/JPS60244810A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reproduce data faithful to actual variation while reducing memory capacity and power consumption by compressing and writing a measured value and time data at regular intervals of time and in case of abrupt variation in measured value. CONSTITUTION:Parallel data D and latched by a latch (a) directly and analog data are latched at every sample period through an A/O converter. The difference 3 of the output 1 of the latch (a) from data which is latched in a latch (e) and recorded in a memory cassette last is calculated and when this exceeds a set value D, it is latched as memory cassette recording data. Further, a counter (h) is set with every regular time signal and the frequency of sampling from every regular time is sent as recording data to a control part together with the latched data of the latch (a).

Description

【発明の詳細な説明】 本発明は、測定値の変化量によつて、メモリカセツトへ
データ記録を行い、記録周期を自動的に変化させること
ができるオートインターバル機能をもつ、メモリカセツ
ト式データ収録装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention is a memory cassette-type data recording device that has an auto-interval function that records data to a memory cassette and automatically changes the recording cycle according to the amount of change in measured values. It is related to the device.

本発明は、それに限定されるものではないが、たとえば
無電限地域での長期にわたる河川水位記録を行う場合、
通常では、自記記録紙による記録がほとんどであり、尚
かつこの方法では、自記紙からのデータの読み取りに非
常な労力を有すことになる。これを消力化する為、現在
では、測定データをカセツトテープあるいは、半導体メ
モリカセツトに記録する、データの自動入力を目的とし
た、デジタル記録式データ収録装置が使用されるように
なつてきている。
Although the present invention is not limited thereto, for example, when recording river water levels over a long period of time in an unrestricted area,
Usually, most of the information is recorded using self-recording paper, and this method requires a great deal of effort to read data from the self-recording paper. In order to eliminate this problem, digital recording data recording devices are now being used that record measurement data on cassette tapes or semiconductor memory cassettes for the purpose of automatic data input. .

しかし、現行のデジタル記録式データ収録装置では、デ
ータサンプリング周期が固定式であり、1図Aの様な急
激な変化に対しては、毎正時のサンプリングにおいて、
1図Bの様な再成波形となつてしまう。また、これを避
ける為に、サンプリング周期を6分の1にすると、1図
Cの様になるが、使用メモリ容量は6倍となり、メモリ
の容量、消費電力ばかりでなく、CPUの消費電力もそ
れだけ増大し、長期間の計測の為には、極めて大型のバ
ツテリを必要とする事になり、装置の設置、取り扱かい
が大変不便になる。
However, in the current digital recording data recording device, the data sampling period is fixed, and in response to sudden changes like the one shown in Figure 1A, sampling every hour on the hour,
This results in a regenerated waveform as shown in Figure 1B. Furthermore, in order to avoid this, if the sampling period is reduced to one-sixth, the result will be as shown in Figure 1C, but the memory capacity used will be six times larger, which will not only increase the memory capacity and power consumption, but also the power consumption of the CPU. This increases the number of batteries, and requires an extremely large battery for long-term measurements, making installation and handling of the device very inconvenient.

本発明は、以上の事を解消する為になされたもので、毎
正時と測定値に急激な変化があつたときに、測定値およ
び時刻データを圧縮して、メモリに書き込むことを特徴
としており、再成波形やメモリ容量は、1図Dのように
なり、特に変化の少ないときに有効となる。
The present invention has been made to solve the above problems, and is characterized by compressing measured values and time data and writing them into memory every hour on the hour and when there is a sudden change in measured values. Therefore, the regenerated waveform and memory capacity become as shown in Figure 1D, which is particularly effective when there are few changes.

以下回路構成について説明する。The circuit configuration will be explained below.

第2図によつて動作を説明する。The operation will be explained with reference to FIG.

nbitのパラレルデータAは直接に、Bのアナログデ
ータはbのA/Dコンバータにより、デジタル変換され
て、nbitラツチaにサンプル周期ごとにラツチされ
る。この時のサンプリング周期は、OSCの出力が、カ
ウンタdおよびコンパレータCによつて、設定値Cに決
定される。ラツチaの出力1は、差分演算回路fに入力
され、eにラツチされている前回のメモリカセツトに記
録されたデータとの差3を算出し、これが設定値Dを越
えたとき、コンパレータgによつて、データラツチ信号
4が出力され、メモリカセツト記録データとしてラツチ
される。同時に、dより出力される毎正時信号と合わせ
て、リクエスト信号5として制御部におくられる。また
、カウンタhは、時刻データ部でサンプリング信号をカ
ウントし、毎正時信号によつてリセツトされるようにな
つており、毎正時からのサンプリングの回数は、aのラ
ツチデータと合わせて、記録データEとして制御部に送
られる。リクエストを受けた制御部は、データEおよび
日付データを、メモリカートリツジに記録し、また、外
からの要求によりデータの修正や表示を行う。
The n-bit parallel data A is directly converted into digital data, and the analog data B is digitally converted by the A/D converter b, and latched in the n-bit latch a every sample period. The sampling period at this time is determined by the output of the OSC to the set value C by the counter d and the comparator C. Output 1 of latch a is input to a difference calculation circuit f, which calculates the difference 3 between the data recorded in the previous memory cassette latched in e, and when this exceeds the set value D, it is input to comparator g. Therefore, data latch signal 4 is output and latched as data recorded in the memory cassette. At the same time, the request signal 5 is sent to the control section together with the every hour signal output from d. In addition, the counter h counts sampling signals in the time data section and is reset by the signal every hour on the hour, and the number of samplings from every hour on the hour is recorded together with the latch data of a. The data is sent to the control unit as data E. Upon receiving the request, the control section records the data E and date data in the memory cartridge, and also modifies and displays the data in response to an external request.

以上説明したように、本発明によれば、測定値に対して
設定値を越える変化があつたときにだけ、データが記録
され、メモリ容量、消費電力を少なく抑えながら、実際
の変化に忠実なデータを再現できる為、各方面に利用価
値が高いと考えられる。
As explained above, according to the present invention, data is recorded only when there is a change in the measured value that exceeds the set value. Since the data can be reproduced, it is considered to have high utility value in various fields.

【図面の簡単な説明】[Brief explanation of the drawing]

図1は、各サンプリング周期における再成波形を示す。 A、入力波形 B、サンプリングタイム60分再成波形
 C、サンプリングタイム6分再成波形 D、オートイ
ンターバル再成波形図2は、オートインターバル機能回
路構成図を示す。Aはデイジタル入力、Bはアナログ入
力で、Cはサンプリング周期設定値、Dは記録信号出力
差分設定値、Eは記録データ、又各素子はすべてCMO
Sで、それぞれ、a入力バツフア、DA/Dコンバータ
、Cコンパレータ、dカウンタ、eラツチ、f差分演算
回路、gコンパレータ、hカウンタにて構成されている
FIG. 1 shows the regenerated waveform at each sampling period. A. Input waveform B. Regenerated waveform with sampling time of 60 minutes C. Regenerated waveform with sampling time of 6 minutes D. Auto-interval regenerated waveform FIG. 2 shows an auto-interval function circuit configuration diagram. A is digital input, B is analog input, C is sampling cycle setting value, D is recording signal output difference setting value, E is recording data, and each element is all CMO.
Each of the S circuits is composed of an a input buffer, a DA/D converter, a C comparator, a d counter, an e latch, an f difference calculation circuit, a g comparator, and an h counter.

Claims (1)

【特許請求の範囲】[Claims] 1 収録対象となる測定データに対し、設定記録周期ご
とに、前回の記録データとの差をめ、設定値を越える差
分が検出されたとき、そのデータおよび時刻データを、
次のデータとしてメモリカセツトに記録し、設定値に満
たない場合でも、少なくとも毎正時のデータは記録され
るようにしたこと、また、この時の時刻データは、記録
インターバル時間とし、毎正時からの記録周期信号の数
を、これに対応させて記録するようにしたことを特徴と
するオートインターバル機能をもつメモリカセツト式デ
ータ収録装置。
1 Calculate the difference between the measured data to be recorded and the previous recorded data at each set recording cycle, and when a difference exceeding the set value is detected, the data and time data are
The next data is recorded in the memory cassette, and even if it does not meet the set value, at least the data every hour is recorded, and the time data at this time is set as the recording interval time, and the data is recorded every hour on the hour. A memory cassette-type data recording device having an auto-interval function, characterized in that the number of recording cycle signals from a memory card is recorded in correspondence with the number of recording period signals from the memory cassette-type data recording device.
JP10120084A 1984-05-19 1984-05-19 Memory cassette type data gathering and recording device with automatic interval function Pending JPS60244810A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10120084A JPS60244810A (en) 1984-05-19 1984-05-19 Memory cassette type data gathering and recording device with automatic interval function

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10120084A JPS60244810A (en) 1984-05-19 1984-05-19 Memory cassette type data gathering and recording device with automatic interval function

Publications (1)

Publication Number Publication Date
JPS60244810A true JPS60244810A (en) 1985-12-04

Family

ID=14294287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10120084A Pending JPS60244810A (en) 1984-05-19 1984-05-19 Memory cassette type data gathering and recording device with automatic interval function

Country Status (1)

Country Link
JP (1) JPS60244810A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63114620A (en) * 1986-10-31 1988-05-19 Nissei Plastics Ind Co Method for detecting operating state of injection molder
JPH01269121A (en) * 1988-04-21 1989-10-26 Ono Sokki Co Ltd Sampling signal generator

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63114620A (en) * 1986-10-31 1988-05-19 Nissei Plastics Ind Co Method for detecting operating state of injection molder
JPH0339816B2 (en) * 1986-10-31 1991-06-17
JPH01269121A (en) * 1988-04-21 1989-10-26 Ono Sokki Co Ltd Sampling signal generator

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