JPS60231976A - Digital magnetic reproducing circuit - Google Patents

Abstract

PURPOSE:To decrease the number of parts by substituting an adding circuit in a conventional waveform equalizing circuit with an adding and integrating circuit and removing a trailing-stage integrating circuit. CONSTITUTION:The waveform equalized and integrating circuit 7 which performs waveform equalization and integration simultaneously is installed between an amplifying circuit 2 and a discriminating and reproducing circuit 5 as a substitute for a waveform equalizing circuit and an integrating circuit which are provided independently before. This waveform equalizing and integrating circuit 7 consists of a delay inversion coefficient circuit 20, adding and integrating circuit 21, and low-band negative feedback adding and integrating circuit 22. The delay inversion coefficient circuit 20 consists of delay circuits 22 and 23, amplitude inverting circuits 24 and 25, and a coefficient circuit composed of a resistor, and the adding and integrating circuit 21 consists of an operational amplifier 26 and an integrating capacitor C. Therefore, voltages at specific nodes (p), (q), and (r) in the delay inversion coefficient circuit 20 are summed up and integrated by the adding and integrating circuit 21 simultaneously. Namely, the waveform equalization and integration are carried out simultaneously.

Description

Detailed Description of the Invention Field of the Invention The present invention relates to a digital magnetic reproducing circuit used in the technical field of VTRs and the like to reproduce digital signals such as PCM signals recorded on magnetic media. It is.

BACKGROUND ART When reproducing a digital signal on a magnetic recording medium, the signal waveform output from the reproducing head appears as an isolated waveform close to the differential waveform of the recording signal due to the low-frequency cutoff characteristic of the reproducing head. Therefore, in a typical digital magnetic reproducing circuit, an integrating circuit is provided before the identification reproducing circuit.

Furthermore, as the magnetic recording density increases, the code amount interference between adjacent isolated waveforms increases, so a delay-type waveform equalization circuit is provided in the preceding stage of the above-mentioned integrating circuit to reduce the code amount interference. ing.

Therefore, in the conventional digital magnetic reproducing circuit, as shown in FIG. After the waveform is equalized, it is integrated by an integrating circuit 4, and the integrated waveform is reproduced into a digital signal by an identification reproducing circuit 5, which is output to an output terminal 6.

FIG. 3 is a block diagram showing the configuration of the waveform equalization circuit 3 and the integration circuit 4 of FIG. 2. The waveform equalization circuit 3 includes delay circuits 12, 13 . The delay inversion coefficient circuit 10 is composed of an amplitude inversion circuit 14 15 and a coefficient circuit including a resistor, and the delay inversion coefficient circuit 10 is composed of an operational amplifier 16 and a resistor.
The adder circuit 11 adds the voltages of predetermined nodes P, Q, and R within. Further, the integrating circuit 4 is composed of an operational amplifier 17, an integrating capacitor C, and a resistor.

However, the above-mentioned conventional digital magnetic reproducing circuit
Since waveform equalization and integration are performed separately, there are problems in that the number of parts is large and the space occupied is large.

Also, the conventional digital magnetic reproducing circuit mentioned above.

There is a problem in that low frequency components contained in the magnetic recording signal itself and direct current components generated by drift of the adder circuit and the integrating circuit enter the identification and reproducing circuit, deteriorating the identification and reproducing function.

Problems to be Solved by the Invention The present invention has been made in view of the problems of the prior art described above, and its purpose is to reduce the number of parts per unit and the space required.
Another object of the present invention is to provide a digital magnetic reproducing circuit in which the identification reproducing function is less likely to deteriorate due to low frequency components.

Structure of the Invention The present invention achieves the above objects by replacing the adder circuit in the conventional waveform equalization circuit with an adder-integrator circuit, thereby eliminating the subsequent-stage integrator circuit, and at the same time eliminating the low-frequency components of the output of the adder-integrator circuit. It is configured to reduce the gain of low frequency components by negative feedback.

Hereinafter, the present invention will be described in detail based on Examples.

Embodiment of the Invention FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. In this figure, components given the same reference numbers as in FIG. 2 are the same components as in FIG. In this embodiment, instead of a waveform equalization circuit and an integration circuit that are conventionally provided as separate circuits between the amplifier circuit 2 and the identification/regeneration circuit 5, a waveform equalization/integration circuit that simultaneously performs waveform equalization and integration is used. A circuit 7 is installed.

FIG. 4 is a block diagram showing an example of the configuration of the waveform equalization/integration circuit 7. As shown in FIG. This waveform equalization/integration circuit includes a delay inversion coefficient circuit 20. It is composed of an addition and integration circuit 21 and a low frequency negative feedback addition and integration circuit 22.

The delay inversion coefficient circuit 20 is composed of a delay circuit 22, 23°, an amplitude inversion circuit 24, 25, and a coefficient circuit formed by a resistor, and the addition and integration circuit 21 is composed of an operational amplifier 26 and an integrating capacitor C. Therefore, the voltages at predetermined nodes p, q, and r in the delay inversion coefficient circuit 20 are added and simultaneously integrated by the addition and integration circuit 21. That is, waveform equalization and integration are performed simultaneously.

The low-pass negative feedback circuit 22 is a low-pass filter circuit (LPF) 27
．． It is constituted by an operational amplifier 28 and a resistor, and negatively feeds back the low frequency component of the output of the summing/integrating circuit 21 to the input side.

The low-pass filter circuit 27 in this low-pass negative feedback circuit 22 is
It is designed to allow only low frequency components of several tens of Hz (for example, 20 to 30 Hz) or less to pass through. Therefore, low frequency components contained in the digital signal itself and DC components caused by drifts of the inverting circuits 24 and 25 in the amplifier circuit 2, the waveform equalization/integration circuit 7, and the operational amplifier 26 are The gain of the integrating circuit 21 is effectively reduced, and a reproduction signal with a small amount of DC fluctuation is supplied to the discriminating and reproducing circuit at the subsequent stage.

The low-pass filter circuit 27 may be an appropriate one such as a Re integration circuit, but if a full-wave rectification circuit is used as such a low-pass filter circuit, it does not involve low-frequency phase rotation like the Re integration circuit. There is an advantage. Furthermore, when the DC component included in the output of the operational amplifier 26 is small, the low-frequency negative feedback circuit 2
The operational amplifier 28 in 2 is omitted and the low-pass filter circuit 27 is used.
The output may be directly fed back to the input side of the addition/integration circuit 21 in a negative manner.

FIG. 5 is a circuit diagram showing a specific example of the circuit configuration of the waveform equalization/integration circuit 7 of FIG. 4. In this circuit,
A positive phase amplifier circuit 29 is installed after the delay circuit 22. Further, the low-frequency negative feedback circuit 22 is composed only of a Re integration circuit.

FIG. 6(A) is an experimental result showing an eye pattern of an output when a 3PM modulated signal is reproduced using the waveform equalization/integration circuit shown in FIG. One scale on the time axis is 1 μs, and the rectangular wave below the eye pattern is a clock signal. Figure 6(B) is.

This is an eye pattern when the low-frequency negative feedback circuit 22 in FIG. 5 is removed, and the eye is narrowed by low frequency components. In this way, the eye pattern improvement effect of the low-frequency negative feedback circuit is clear.

DETAILED DESCRIPTION OF THE INVENTION As described above, the present invention is configured to eliminate the subsequent integrating circuit by replacing the adding circuit in the conventional waveform equalization circuit with an adding integrating circuit, thereby reducing the number of parts and occupying 2 parts. This has the advantage that it is possible to realize an inexpensive, compact digital magnetic reproducing circuit that takes up little space.

In addition, the present invention is configured to reduce the gain of the low frequency component by negative feedback of the low frequency component of the output of the addition and integration circuit, so that the discrimination and reproduction function is less likely to deteriorate due to the low frequency component. This has the advantage that a digital magnetic reproducing circuit can be realized.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a block diagram showing the configuration of a conventional digital magnetic reproducing circuit, and FIG. 3 is a block diagram showing the configuration of a conventional digital magnetic reproducing circuit. FIG. 4 is a block diagram showing an example of the configuration of the waveform equalization/integration circuit in FIG. Circuit diagram shown,
FIG. 6 is an eye pattern of the output of the waveform equalization/integration circuit shown in FIG. 1...Playback head, 2...Amplification circuit, 3...Wave Patent applicant: Toshihiko Enoki, patent attorney representing NEC Home Electronics Co., Ltd. 1 Revised page 6 (with no change to i) Figure 6 ( A) CB) Manual scratch (l↑Formal writing (method) % formula % 2. Name of the invention Digital magnetic reproducing circuit 3. Relationship with the supplementary case Patent applicant Osaka Kitaku Umeg Address Kita, Osaka City 1-8-17 Umeda-ku (193):
Tsupon Tenki Name NEC Home Electronics Co., Ltd. 4,
Figure 6 on Page 1 of Agent 1 will be corrected as shown in attached Figure 6.

Claims (1)

[Scope of Claim] A digital magnetic reproducing circuit that performs waveform equalization and integration on a reproduced solitary wave output from a reproducing head, and then performs discrimination reproduction. A delay inversion coefficient circuit including a delay circuit, an amplitude inversion circuit, and a coefficient circuit; and an addition and integration circuit that adds and integrates voltages at predetermined nodes in the delay inversion coefficient circuit. A digital magnetic reproducing circuit comprising a low-frequency negative feedback circuit that negatively feeds a low frequency component of the output of the summing/integrating circuit to the input side of the summing/integrating circuit.