JPS60220466A - High speed fourier transformation device - Google Patents

Abstract

PURPOSE:To improve economical efficiency and reliability due to decrease in the number of required parts by inputting a product obtained by multiplying the result of the first operation by a twist coefficient to the same discrete Fourier transform arithmetic unit (DFT). CONSTITUTION:Data taken out r at a time in the direction of column from the first and change circuits CT22 are supplied to a DFT20 through a switching circuit 23. The switching circuit 23 switches outputs of the first CT22 and outputs of the second CT24 at every tauhr of the DFT20 and leads to the DFT20. Outputs of the DFT20 are switched at every tauhr, and arithmetic outputs of data from the first CT22 are inputted to a multiplier 25, and outputs of data from the second CT24 are inputted to an output register 28. Output data of r in number, of the multiplier 25 are stored in the second buffer 27, and transferred to the second CT24.

Description

Detailed Description of the Invention (a1 Technical Field of the Invention The present invention relates to a data processing device, and particularly relates to a data processing device that processes r points (r is 2
The present invention relates to an improvement of a fast Fourier transform device that performs Fourier transform of data of 12 points using a discrete Fourier transform arithmetic unit of data of (an integer greater than or equal to).

(b) Background of the Technology Fast Fourier transform technology has been widely used in fields such as digital signal processing. Moreover, recent advances in electronic technology have enabled the technology to be used on a large scale, with remarkable improvements in the performance/price ratio of the conversion process.

For example, in astronomical observation using a radio telescope, it may be required to process fast Fourier transforms of signals from several to several dozen antennas in parallel in real time.

(C) Prior Art and Problems In such a system, a required number of fast Fourier transform functions are placed in parallel, and each fast Fourier transform function has conventionally been realized with a configuration as described below.

In other words, the data is expressed two-dimensionally and the original data is expressed as xo(
k+, ko), and the data after the discrete Fourier transform is
(n++no), where no+rll is 0 to r1 H=exp(-2π/r''j), but this calculation can be decomposed into two stages as follows using a fast Fourier transform technique.

X(n++no)=Xz(no+n+) Therefore, the above formula (
11 as an r-point discrete Fourier transform with a fixed value of 0 for r sets of different data, and then perform the computation of equation (2) as a 1-point discrete Fourier transform with a fixed no.

11. - despise.

FIG. 1 is a block diagram of a conventional fast Fourier transform device constructed by the above two-stage discrete Fourier transform. 1
0 is the first discrete Fourier transform operator (hereinafter, D
It is abbreviated as FT. ), each input data is operated on r pieces of input data, and the output is stored in a sorting circuit (hereinafter abbreviated as CT) 11. After r sets of data are stored in the CTII, every r sets of data are retrieved,
The multiplier 13 multiplies the twist coefficient inputted to the second r-point DFT 14 and supplied from the twist coefficient supply circuit in the process.

The conventional fast Fourier transform device described above satisfactorily achieves the purpose of Fourier transform, but as the scale increases, the amount of circuitry required for each Fourier transform function significantly affects the price and reliability of the system. Improvements such as reducing the number of parts were desired.

OBJECTS OF THE INVENTION Therefore, it is an object of the present invention to provide an improved scheme that can improve the economy and reliability of fast Fourier transform devices, especially on a large scale.

(e) Structure of the Invention According to the present invention, in a fast Fourier transform device that processes discrete Fourier transform of data at 12 points, r
an arithmetic unit that performs a discrete Fourier transform of point data; a multiplier that multiplies the output of the arithmetic unit by a twisting coefficient; a means for re-inputting the multiplication result of the multiplier to the arithmetic unit; This is achieved by a fast Fourier transform device having means for rearranging data after calculation. In particular, by switching the input of the arithmetic unit to new data or the re-input data every r-point arithmetic cycle and supplying the arithmetic input,
It is possible to configure a device that continuously performs real-time processing of collected data.

That is, paying attention to the fact that the calculations in equations (1) and (2) above are in the same format, the calculation result of equation (1) is multiplied by the twist coefficient, and then the same discrete Fourier transform calculation unit is used again. By configuring the input to
Since the FT can be combined into one set, economical efficiency and reliability can be improved by reducing the number of required parts.

According to this method, in order to obtain the same output speed as the conventional method, the DFT calculation speed needs to be almost twice as fast as the conventional method, but in general, the price increase due to the use of high-speed circuits is due to the increase in the number of circuit elements. Since it is smaller, it is possible to satisfy economical efficiency, and at the same time, reliability is improved.

(f) Embodiment of the invention FIG. 2 is a block diagram showing an embodiment of the invention. This example shows an apparatus that continuously processes fast Fourier transform of data at the rt point in a pipeline manner.

The r-point DFT 20 shown in the figure calculates one set of r points in a one-hour calculation cycle.
It is assumed that the conversion operation for each piece of data is completed, and each part of this device proceeds with the processing in units of 2τ time.

R sample data of some physical quantity are input to the buffer 21 every 2τ time. Buffer 21 is rx
It has a configuration in which r pieces of data are stored, and when the buffer 21 is filled with one input, all data is transferred to the first CT 22.

Like the buffer 21, the first CT 22 has a configuration of r rows and r columns, and inputs data from the row direction and takes it out from the column direction (or takes out every r pieces of input data). This is a known circuit configured to perform rearrangement. This data sorting by the first CT 22 is not directly necessary for the Fourier transform calculation, but in combination with the sorting described later, it has the effect of making the output data of the device the same as the input data, and the buffer 21 Together with this, a two-stage buffer is configured to enable continuous input of data from the outside.

The data to be extracted from the first CT 22 by r pieces in the column direction is as follows:
The same k in equation (1) above. This applies to all data belonging to . This data is supplied to the DFT 20 through a switching circuit 23 consisting of r sets of gates.

The switching circuit 23 switches the first C for every τ time of the DFT 20.
It has a function of switching between the output of T22 and the output of a second CT24, which will be described later, and guiding it to the DFT20.

The DFT 20 uses the above equation (1) using r input data.
Alternatively, a known arithmetic unit that performs a discrete Fourier transform operation corresponding to equation (2) may be used. In the present invention, DFT20
The output of is connected to the output register 28 and the twist coefficient multiplier 25, and is switched every τ time, so that the calculation output of the data from the first CT 22 is input to the multiplier 25, and the output of the data from the second CT 24 is input to the output register 28. do. This switching control is achieved, for example, by alternately supplying set pulses sent to the output register 28 and the second buffer 27 from the control circuit 29.

As mentioned above, the twist coefficient is a constant determined by the position in the data array, and is set in advance by the twist coefficient supply circuit 26.
For example, it is stored using a read-only memory (ROM), and the equation (11) is
The same k. The r twist coefficients belonging to the multiplier 25
is supplied to each of the multiplier circuits.

The r output data of the multiplier 25 are stored in the second buffer 27. The second buffer 27 also has the same configuration as the first buffer 21, and transfers all data to the second CT 24 when the buffer is filled by storing data r times.

The second CT 24 has the same configuration as the first CT 22, rearranges the data, and supplies r pieces of data to the DFT 20 again through the switching circuit 23.

The rearranging of data in the second CT 24 corresponds to extracting r pieces of data belonging to -n0 shown in equation (2).

The calculation outputs of the DFT 20 are output to the output register 28 in r pieces as fast Fourier transform results of 12 pieces of data.

The process from input to output of a set of 12 pieces of data has been described above, following the flow of processing. During this period, after the data stored in the first buffer 21 is transferred to the first cT 22, storage of subsequent data begins immediately in the first buffer 21, and the first buffer is filled in 2τ×r time. At this time, the last r data of the first CT 22 will be transferred to the DFT 20, so the data of the first buffer 21 can be transferred to the first CT 22.

During this time, the data previously in the 1st cT'>z is stored in the buffer 27 through the processing of the DFT 20 and the multiplier 25 as described above. When the last r 7'-tak data are stored in the second buffer 27, all the data in the buffer is transferred to the second CT 24 and D
It will be in a state where it will be supplied to the FT20.

Therefore, while data is continuously input, 1, DFT
Data waiting for processing in CT 20 is always sent to the first CT 22 and the second CT
24, and in order to continue inputting data from the outside, it is necessary to process data from both CTs in parallel.

For this purpose, the switching circuit 23 switches the input to the DFT 20 every τ time under the control of the control circuit.

Effects of fg1 Invention As is clear from the above explanation, the present invention reduces the number of required parts of a fast Fourier transform device and improves its economic efficiency and reliability, so it has significant industrial effects.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a conventional fast Fourier transform device, and FIG. 2 is a block diagram of a fast Fourier transform device that is an embodiment of the present invention. In the figure, 10.14.20 is a one-point discrete Fourier transform operator (DFT), 11.22.24 is a data sorting circuit (CT), 12.26 is a twist coefficient supply circuit,
13.25 is a multiplier, 21.27 is a buffer, 23 is a switching circuit, and 28 is an output register. World 1 diagram

Claims (1)

[Scope of Claims] A fast Fourier transform device that processes discrete Fourier transform of data at point "fit r", which includes an arithmetic unit that performs discrete Fourier transform of data at point r, and an output of the arithmetic unit that is multiplied by a twist coefficient. A fast Fourier transform device comprising a multiplier, a means for re-inputting the multiplication result of the multiplier to the arithmetic unit, and a means for rearranging data before or after the operation of the multiplier. (2) The re-input hand carving includes an arithmetic unit input switching means for switching the input of the arithmetic unit to new data or the re-input data.
) The fast Fourier transform device described in section 2. (3) The fast Fourier transform device according to claim (2), wherein the arithmetic unit input switching means executes the switching every one arithmetic cycle time of the arithmetic unit.