JPS60161646A - Lead frame for semiconductor device - Google Patents

Lead frame for semiconductor device

Info

Publication number
JPS60161646A
JPS60161646A JP59015210A JP1521084A JPS60161646A JP S60161646 A JPS60161646 A JP S60161646A JP 59015210 A JP59015210 A JP 59015210A JP 1521084 A JP1521084 A JP 1521084A JP S60161646 A JPS60161646 A JP S60161646A
Authority
JP
Japan
Prior art keywords
lead
leads
tie bar
resin
widths
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59015210A
Other languages
Japanese (ja)
Inventor
Akira Suzuki
明 鈴木
Hideki Tanaka
英樹 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP59015210A priority Critical patent/JPS60161646A/en
Publication of JPS60161646A publication Critical patent/JPS60161646A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • H01L23/49555Cross section geometry characterised by bent parts the bent parts being the outer leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce stress to be generated when the outside leads of a lead frame for a semiconductor device are bent, and to enhance the external appearance and reliability of the device by a method wherein widths of the outside leads inner side than a tie bar and a part of inside leads are constructed narrower than width of the other leads of the outside. CONSTITUTION:The fundamental construction of a lead frame 14 is so formed as to make widths of outside leads 4 inside of a tie bar 2 and widths of a part of inside leads, namely widths of the bending parts 6 of the outside leads and widths of a part of the inside leads 10 to be narrowed, and strengths of the leads are reduced. Accordingly, stress to be applied to a package when the outside leads are bent is reduced, damage to the sealing resin of the package is checked, and coming out of inside lead parts 11 is checked. Moreover, by extending the lead width narrowed parts up to the tie bar 2, resin inside the tie bar 2 can be pushed down easily.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は、封止型半導体装置用リードフレームに適用し
て特に有効な技術に関するものであり、例えば、樹脂封
止体とリード折り曲げ部の寸法余裕度の少ない半導体装
置製造技術に利用して有効な技術に関するものである。
[Detailed Description of the Invention] [Technical Field] The present invention relates to a technique that is particularly effective when applied to a lead frame for a sealed semiconductor device. The present invention relates to a technique that is effective for use in semiconductor device manufacturing techniques that have a limited number of semiconductor devices.

〔背景技術〕[Background technology]

第1図及び第2図は、リードフレーム上に半導体素子を
組み立てた後、樹脂封止したものの形状を示す図であり
、1は樹脂封止、2はタイバー、8はタイバー内樹脂、
4は外部リードであり、リードの封止部外に露出した部
分である。5はリードの外部リード4に設けられた切り
欠き部である。
FIGS. 1 and 2 are diagrams showing the shapes of semiconductor elements that are resin-sealed after being assembled on a lead frame; 1 is resin-sealed, 2 is a tie bar, 8 is resin inside the tie bar,
4 is an external lead, which is a portion of the lead exposed outside the sealed portion. Reference numeral 5 denotes a notch provided in the external lead 4 of the lead.

第3図及び第4図は、前記第1図及び第2図に示す樹脂
封止完了のもののタイバー2を切断除去した後、タイバ
ー2内の樹脂3を突き落した後の形状を示す図である。
3 and 4 are diagrams showing the shape of the resin-sealed product shown in FIGS. 1 and 2 after the tie bar 2 is cut and removed and the resin 3 inside the tie bar 2 is pushed down. be.

第5図及び第6図は、第3図及び第4図に示すリードの
外部リード4を折り曲げ成形した後の形状を示す図であ
り、6は封止樹脂部lと外部リード折り曲げ部、6A、
6Bは外部リード折り曲げ部寸法余裕、7は外部リード
4の折り曲げ時の外部リード」二下押え金型、8は半導
体素子、9はタブ、10は内部リードであり、リニドの
封止体内部に入っている部分である。llは半導体素子
8の各電極と内部リードlOの先端部を接続するボンデ
ィングワイヤ、12は隙間である。
5 and 6 are diagrams showing the shape of the external lead 4 of the lead shown in FIGS. 3 and 4 after being bent and molded, and 6 is a sealing resin part l, an external lead bent part, and 6A. ,
6B is a dimensional allowance for the bent part of the external lead, 7 is a mold for holding down the external lead when the external lead 4 is bent, 8 is a semiconductor element, 9 is a tab, and 10 is an internal lead. This is the part that is included. 11 is a bonding wire connecting each electrode of the semiconductor element 8 and the tip of the internal lead 10, and 12 is a gap.

樹脂封止型半導体装置用リードフレームは、封止樹脂部
lとリード折り曲げ部の寸法余裕6A。
The lead frame for resin-sealed semiconductor devices has a dimensional margin of 6A between the sealing resin part l and the lead bending part.

6Bが0.5〜0.7mn程度あったため、第5図に示
すように、外部リード4の折り曲げ時に、外部リード上
下挿え金型7を設けることができた。しかしながら、近
年、半導体装置の高集積化、高機能化が進み、半導体素
子8が大型化してきている。
6B was approximately 0.5 to 0.7 mm, it was possible to provide upper and lower external lead insertion molds 7 when bending the external leads 4, as shown in FIG. However, in recent years, semiconductor devices have become highly integrated and highly functional, and the semiconductor element 8 has become larger.

一方、システムの小型化のため、パッケージは小型化し
なければならない。この結果少なくとも従来のパッケー
ジに大きな半導体素子を収納しなければならない。′ これらの目的を達成するため、実装基板に実装するた・
めのリード間隔は規定の従来寸法で樹脂封止体を大きく
する手法がとり入れられつつある。
On the other hand, in order to miniaturize the system, the package must be miniaturized. As a result, large semiconductor devices must be accommodated in at least conventional packages. ´ In order to achieve these objectives,
A method is being adopted in which the lead spacing is set to a predetermined conventional size and the resin molded body is made larger.

この結果、第6図に示すように、封止樹脂部lと外部リ
ードヘリ曲げ時の応力(ストレス)がパッケージにダメ
ージを与え、リードの内部リードlOと封止樹脂部1と
の界面に隙間12が発生し、耐湿性の信頼度に重大な影
響を及ぼす。
As a result, as shown in FIG. 6, the stress at the time of bending the sealing resin part l and the outer lead edge damages the package, causing a gap 12 at the interface between the inner lead lO of the lead and the sealing resin part 1. occurs, which seriously affects the reliability of moisture resistance.

これらの改善策として第2図に示すようなリードの折り
曲げ部6の強度を弱くするため、リードに切り欠き部5
を設ける手法が考えられる。
As a countermeasure for these improvements, in order to weaken the strength of the bent portion 6 of the lead, as shown in FIG.
One possible method is to provide

しかしながら、このような構成を有するリードは下記の
欠点を有していることが本発明者の実験により明らかに
なった。
However, the inventor's experiments have revealed that the lead having such a configuration has the following drawbacks.

(1)第4図に示すように、タイバー内の樹脂3を突き
落した後、リードに設けられた切り欠き部5に樹脂5A
が残存し、外部リード折り曲げ成形時に、これがその金
型内に落ち、リード表面に打痕傷が発生し、リード外観
を損傷するとともに、完成品の錫又は半田層表面を損傷
し、下地リード表面が露出してリード錆の原因となる。
(1) As shown in Fig. 4, after pushing down the resin 3 in the tie bar, insert the resin 5A into the notch 5 provided in the lead.
remains and falls into the mold when the external lead is bent and molded, causing dents on the lead surface and damaging the lead appearance, as well as damaging the tin or solder layer surface of the finished product and damaging the underlying lead surface. is exposed and causes lead rust.

(2)リードに切り欠き部5を設けたことにより、リー
ドの折り曲げ部6の剛性を低下できるが、切り欠き部5
に残存した樹脂5Aがリードを補強し、実質的にはリー
ド強度は低下せず、折り曲げ時のダメージがパッケージ
に発生し、第6図に示すように、内部リードとレジン等
の封止樹脂部lとの界面に隙間12が発生し耐湿性の信
頼度が低下する。また、さらに内部リードが抜けること
もある。
(2) By providing the notch portion 5 in the lead, the rigidity of the bent portion 6 of the lead can be reduced; however, the notch portion 5
The remaining resin 5A reinforces the leads, and the lead strength does not substantially decrease, but damage occurs to the package during bending, and as shown in Figure 6, the inner leads and the sealing resin part such as resin A gap 12 is generated at the interface with l, reducing the reliability of moisture resistance. Furthermore, internal leads may also come out.

〔発明の目的〕[Purpose of the invention]

本発案の目的は、前記封止樹脂部と外部リード折り曲げ
部の寸法余裕のない封止型半導体装置において、外観及
び信頼性を確保できるリードフレームを提供することに
ある。
An object of the present invention is to provide a lead frame that can ensure appearance and reliability in a sealed semiconductor device that does not have a dimensional margin between the sealing resin portion and the external lead bending portion.

本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述及び添付図面によって明らかになるであろ
う。
The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

〔発明の概要〕[Summary of the invention]

本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、下記のとおりである。
A brief overview of typical inventions disclosed in this application is as follows.

すなわち、リードフレームのタイバーを起点とし、タイ
バーより内側の外部リード及び内部リードの一部の幅を
、それより外側の他のリード幅より狭く構成することに
より、外部リードを折り曲げた時に生ずる応力を減少さ
せるものである。
In other words, starting from the tie bar of the lead frame, the width of some of the external leads and internal leads inside the tie bar is configured to be narrower than the width of other leads outside the tie bar, thereby reducing the stress that occurs when the external lead is bent. It is something that reduces

〔実施例〕〔Example〕

第7図乃至第9図は、本発明の実施例を示す図であり、
第7′図は、エポキシレジン等の樹脂で半導体素子等を
封止した後の形状を示す図、第8図は、第7図に示す形
状のリードフレームのタイバー内の樹脂を突き落した後
の形状を示す図、第9図は、第8図に示す外部リードを
所定の位置で折り曲げた後の形状を示す図、第10図は
、リードフレームの形状を示す図である。第7図乃至第
10図において、第1図乃至第6図と同等の機能を有す
るものは同一符号を付け、その繰り返しの説明は省略す
る。
7 to 9 are diagrams showing embodiments of the present invention,
Figure 7' is a diagram showing the shape of a semiconductor element etc. after being sealed with resin such as epoxy resin, and Figure 8 is a diagram showing the shape of a lead frame after the resin in the tie bar of the shape shown in Figure 7 is pushed down. 9 is a diagram showing the shape of the external lead shown in FIG. 8 after being bent at a predetermined position. FIG. 10 is a diagram showing the shape of the lead frame. In FIGS. 7 to 10, parts having the same functions as those in FIGS. 1 to 6 are given the same reference numerals, and repeated explanations thereof will be omitted.

本実施例は、第7図及び第10図に示すように、リード
フレーム14の基本構成は、外部リード4のタイバー2
の内側及び内部リードの一部、すなわち、外部リード折
り曲げ部6及び内部リード10の一部のリード幅を、第
4図に示す切り欠き部5を設けた部分と同様に狭くして
リード強度を小さくしたものである。これにより外部リ
ード折り曲げ時に、パッケージにかかる応力を低減させ
て、パLケージの封止樹脂へのダメージを防止し1、内
部リード部11の抜けを防止する。また、リード幅を狭
くした部分をタイバー2まで延長することにより、タイ
バー2内の樹脂を突き落しゃすくしである。すなわち、
第1図又は第2図の方法では、タイバー切断パンチ又は
タイバー樹脂突落しパンチでタイバー内樹脂を突き落す
が、これ、らのパンチはモールド金型の上下間ズレ、リ
ードフレームとモールド金型とのズレを見込み、樹脂部
から0゜2m以上離した寸法で作るため、リード切り欠
き部の樹脂は突き落しにくくなり、かつ、パンチの摩耗
が発生すると当初0゜2 nwnに設計しても0.2n
wn以上となる。したがって、樹脂残りが発生する。
In this embodiment, as shown in FIGS. 7 and 10, the basic structure of the lead frame 14 is as follows:
The lead width of the inner side and a part of the internal lead, that is, the external lead bent part 6 and part of the internal lead 10, is narrowed in the same way as the part provided with the notch part 5 shown in FIG. 4 to increase the lead strength. It is a smaller version. This reduces the stress applied to the package when bending the external leads, prevents damage to the sealing resin of the package L cage, and prevents the internal lead portion 11 from coming off. Furthermore, by extending the narrowed lead width to the tie bar 2, the resin in the tie bar 2 can be pushed down. That is,
In the method shown in Fig. 1 or 2, the resin inside the tie bar is pushed down with a tie bar cutting punch or a tie bar resin falling punch, but these punches are used to prevent misalignment between the upper and lower parts of the mold die, and between the lead frame and the mold die. In anticipation of misalignment, the dimensions are made at least 0°2 m from the resin part, so the resin at the lead notch becomes difficult to fall off, and if the punch wears out, it will be 0°2 m or more apart from the resin part. .2n
It becomes more than wn. Therefore, resin residue is generated.

しかしながら、前記実施例の方法ではタイバ一部を起点
としてリードを狭くするため、突き落し、パンチが摩耗
しても容易にその樹脂の突き落しができる。
However, in the method of the embodiment described above, since the lead is narrowed starting from a part of the tie bar, even if the punch is worn out, the resin can be easily pushed off.

なお、第1O図において、12.13は外枠、14はタ
ブ吊りリードである。
In addition, in FIG. 1O, 12 and 13 are the outer frame, and 14 is a tab hanging lead.

〔効果〕〔effect〕

タイバーの内側の外部リード折り曲げ部及び内部リード
の一部の幅を、他のリード幅よりも狭くしてリード強度
を小さくすることにより次のような効果を得る。
The following effects can be obtained by making the width of the outer lead bent portion inside the tie bar and a part of the inner lead narrower than the other lead widths to reduce the lead strength.

(1)外部リードの折り曲げ加工が容易である。(1) It is easy to bend the external leads.

(2)外部リード折り曲げ時にパッケージに与えるダメ
ージを防止することができる。
(2) Damage to the package when bending the external leads can be prevented.

(3)内部リードの抜けを防止することができる。(3) It is possible to prevent internal leads from coming off.

(4)タイバー内の樹脂の突き落しが容易にできる。(4) The resin inside the tie bar can be pushed down easily.

以上、本発明者によってなされた発明を実施例にもとづ
き説明したが、本発明は前記実施例に限定されるもので
なく、その要旨を逸脱しない範囲で種々変更可能である
ことはいうまでもない。
Although the invention made by the present inventor has been explained above based on examples, it goes without saying that the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図及び第2図は、リードフレーム上に半導体素子を
組立後樹脂封止したものの形状を示す図、第3図及び第
4図は、前記第1図及び第2図に示すタイバーを切断し
、タイバー内の樹脂を突き落し7た後の形状を示す図、 第5図及び第6図は、第3図及び第4図に示す外部リー
ドを折り曲げ成形した後の形状を示す図、第7図乃至第
9図は本発明の実施例を示す図であり、第7図は、エポ
キシレンジ等の樹脂で半導体モールドした後の形状を示
す図、第8図は、第7図に示す形状のリードフレームの
タイバーを切断し、タイバー内の樹脂を突き落した後の
形状を示す図、 第9図は、第8図に示す外部リードを所定の位置で折り
曲げ成形した後の形状を示す図、第10図は、リードフ
レームの形状を示す図である6 図中、l・・・封止樹脂部、2・・・タイバー、3・・
・タイバー内樹脂、4・・・外部リード、5・・・切り
欠き部、5A・・・残存樹脂、6・・・外部リード折り
曲げ部、6A、6B・・・外部リード折り曲げ部寸法余
裕、7・・・外部リード上上押え金型、8・・・半導体
素子、9・・・タブ、lO・・・内部リード、11・・
・ボンデインクワイヤ、12・・・隙間である。 第 1 図 第 2 図 ユ 第 7 図 第 8 同 第 9 図 // 第10図
Figures 1 and 2 are diagrams showing the shape of a semiconductor element sealed with resin after being assembled on a lead frame, and Figures 3 and 4 are diagrams showing the tie bars shown in Figures 1 and 2 cut away. Figures 5 and 6 are diagrams showing the shape after the resin in the tie bar has been pushed down. Figures 5 and 6 are diagrams showing the shape after the external leads shown in Figures 3 and 4 have been bent and formed. 7 to 9 are diagrams showing embodiments of the present invention, FIG. 7 is a diagram showing the shape after semiconductor molding with resin such as epoxy range, and FIG. 8 is a diagram showing the shape shown in FIG. 7. Figure 9 is a diagram showing the shape after the tie bars of the lead frame are cut and the resin inside the tie bars is pushed out. Figure 9 is a diagram showing the shape after the external leads shown in Figure 8 are bent and formed at predetermined positions. , FIG. 10 is a diagram showing the shape of the lead frame.6 In the figure, l...Sealing resin portion, 2...Tie bar, 3...
・Resin in tie bar, 4... External lead, 5... Notch, 5A... Residual resin, 6... External lead bent part, 6A, 6B... External lead bent part dimensional allowance, 7 ...External lead upper presser mold, 8...Semiconductor element, 9...Tab, lO...Internal lead, 11...
・Bonde ink wire, 12...Gap. Figure 1 Figure 2 Figure 7 Figure 8 Figure 9 // Figure 10

Claims (1)

【特許請求の範囲】 ■、封止型半導体装置用リードフレームにおいて。 タイバーを起点とし、タイバーから内側の外部リード及
び内部リードの一部の幅を、それより外側のリードの幅
よりも狭くしたことを特徴とする半導体装置用リードフ
レーム。
[Claims] (1) In a lead frame for a sealed semiconductor device. 1. A lead frame for a semiconductor device, starting from a tie bar, and having a width of a part of the external leads and internal leads inside the tie bar being narrower than the width of the leads outside the tie bar.
JP59015210A 1984-02-01 1984-02-01 Lead frame for semiconductor device Pending JPS60161646A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59015210A JPS60161646A (en) 1984-02-01 1984-02-01 Lead frame for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59015210A JPS60161646A (en) 1984-02-01 1984-02-01 Lead frame for semiconductor device

Publications (1)

Publication Number Publication Date
JPS60161646A true JPS60161646A (en) 1985-08-23

Family

ID=11882505

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59015210A Pending JPS60161646A (en) 1984-02-01 1984-02-01 Lead frame for semiconductor device

Country Status (1)

Country Link
JP (1) JPS60161646A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373656A (en) * 1986-09-17 1988-04-04 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH0224555U (en) * 1988-08-04 1990-02-19
US5271148A (en) * 1988-11-17 1993-12-21 National Semiconductor Corporation Method of producing a leadframe
JPH07297339A (en) * 1995-04-10 1995-11-10 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
US6250783B1 (en) 1997-04-25 2001-06-26 Britax Vision Systems (North America) Inc. Exterior rear view mirror integral warning light
US9688201B2 (en) 1999-06-17 2017-06-27 Magna Mirrors Of America, Inc. Exterior mirror system for a vehicle

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6373656A (en) * 1986-09-17 1988-04-04 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH0622266B2 (en) * 1986-09-17 1994-03-23 三菱電機株式会社 Semiconductor device and manufacturing method thereof
JPH0224555U (en) * 1988-08-04 1990-02-19
US5271148A (en) * 1988-11-17 1993-12-21 National Semiconductor Corporation Method of producing a leadframe
JPH07297339A (en) * 1995-04-10 1995-11-10 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
US6250783B1 (en) 1997-04-25 2001-06-26 Britax Vision Systems (North America) Inc. Exterior rear view mirror integral warning light
US6517227B2 (en) 1997-04-25 2003-02-11 Britax Vision Systems (North America) Inc. Exterior rear view mirror integral warning light
US6644838B2 (en) 1997-04-25 2003-11-11 Schefenacker Vision Systems Usa Inc. Exterior rear view mirror integral warning light
US6905235B2 (en) 1997-04-25 2005-06-14 Schefenacker Vision Systems Usa Inc. Exterior rear view mirror integral warning light
US7108410B2 (en) 1997-04-25 2006-09-19 Schefenacker Vision Systems Usa Inc. Exterior rear view mirror integral warning light
US9688201B2 (en) 1999-06-17 2017-06-27 Magna Mirrors Of America, Inc. Exterior mirror system for a vehicle

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