JPS60161621A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS60161621A JPS60161621A JP59017591A JP1759184A JPS60161621A JP S60161621 A JPS60161621 A JP S60161621A JP 59017591 A JP59017591 A JP 59017591A JP 1759184 A JP1759184 A JP 1759184A JP S60161621 A JPS60161621 A JP S60161621A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- pattern
- foundation
- irregularities
- organic layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 238000000034 method Methods 0.000 claims abstract description 18
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 10
- 229920003986 novolac Polymers 0.000 claims abstract description 9
- 238000010438 heat treatment Methods 0.000 claims abstract description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 11
- 238000004528 spin coating Methods 0.000 claims description 2
- 239000012044 organic layer Substances 0.000 abstract description 10
- 239000010410 layer Substances 0.000 abstract description 4
- 229920005989 resin Polymers 0.000 abstract description 4
- 239000011347 resin Substances 0.000 abstract description 4
- 230000001678 irradiating effect Effects 0.000 abstract description 3
- 239000010409 thin film Substances 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、凹凸の大きな半導体基板上に微細なレジスト
パターンを寸法精度良く形成するだめの多層構造レジス
トプロセスの下層有機層の形成に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to the formation of a lower organic layer in a multilayer resist process for forming a fine resist pattern on a highly uneven semiconductor substrate with high dimensional accuracy.
従来例の構成とその問題点
凹凸の大きな半導体基板上に微細なレジストパターンを
形成するため、有機層を回転塗布し、下地の凹凸を平坦
化した後、低温形成可能な無機薄膜を形成し、その後前
記無機薄膜並びに前記有機層に対し、それぞれ、通常の
リソグラフィ一工程を行う、いわゆる、多層構造レジス
トプロセスが用いられる。下地の凹凸を平坦化するだめ
の有機層として、フェノールノボラック樹脂系のホトレ
ジストが良く用いられるが、下地の凹凸を完全に平坦化
することは難しく、特に下地パターンの密度が小さい場
合、熱処理だけでは完全な平坦化は不可能であった。Conventional structure and its problems In order to form a fine resist pattern on a highly uneven semiconductor substrate, an organic layer is spin-coated to flatten the underlying unevenness, and then an inorganic thin film that can be formed at low temperatures is formed. Thereafter, a so-called multilayer structure resist process is used in which the inorganic thin film and the organic layer are each subjected to one step of normal lithography. A phenol novolac resin photoresist is often used as an organic layer to flatten the unevenness of the base, but it is difficult to completely flatten the unevenness of the base, especially when the density of the base pattern is small, heat treatment alone is not enough. Complete flattening was not possible.
発明の目的
本発明は、上記の問題点の解決を図ったものであり、下
層有機層にたとえばフェノールノボラック樹脂系のホト
レジストを用い、回転塗布した後、紫外線を全面に照射
し、感光基を十分反応させることで耐熱性を低下させ、
この性質を利用して、半導体基板上の凹凸を完全に平坦
化することの可能な半導体装置の製造方法を提供するこ
とを目的とするものである。Purpose of the Invention The present invention aims to solve the above-mentioned problems, and uses, for example, a phenol novolak resin photoresist as the lower organic layer, and after spin coating, the entire surface is irradiated with ultraviolet rays to sufficiently remove the photosensitive groups. Reacting reduces heat resistance,
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can completely flatten unevenness on a semiconductor substrate by utilizing this property.
発明の構成
本発明の多層構造レジストプロセスは、半導体基板上の
凹凸部を平坦化するだめ、まず、たとえばフェノールノ
ボラック樹脂系のホトレジストを回転塗布し、その後、
これに紫外光を全面照射し、たとえば２００°Ｃ以上の
熱処理を施こして、同面の凹凸を完全に平坦化した後、
無機薄膜を低温形成する工程をそなえたものであり、し
かる後、通常のホトリソグラフィ一工程を行うことによ
り、ｌ構造レジストプロセスで、高精度、微細パターン
形成を達成するものである。Structure of the Invention In the multilayer resist process of the present invention, in order to flatten the uneven portions on a semiconductor substrate, first, a photoresist of, for example, a phenol novolac resin is spin-coated, and then,
After irradiating the entire surface with ultraviolet light and performing heat treatment at, for example, 200°C or higher to completely flatten the unevenness on the same surface,
This method includes a process of forming an inorganic thin film at a low temperature, and then performs one step of normal photolithography to achieve highly accurate and fine pattern formation using the L-structure resist process.
実施例の説明
本発明による多層構造レジストプロセスの下層となると
ころの有機層の形成方法を実施例をもって以下に説明す
る。第１図は下地凹凸パターンの密度が異なる基板１上
に、フェノールノボラック樹脂系のホトレジスト２を約
２μ〃ｚの厚さになるよう回転塗布する。この時点では
パターン密度が小さい部分での完全な下地凹凸の平坦化
はできていない。DESCRIPTION OF EMBODIMENTS A method for forming an organic layer as a lower layer in a multilayer resist process according to the present invention will be described below with reference to Examples. In FIG. 1, a phenol novolac resin-based photoresist 2 is spin-coated to a thickness of about 2 .mu.z on a substrate 1 having different densities of underlying uneven patterns. At this point, the underlying unevenness cannot be completely flattened in areas where the pattern density is low.
この後、波長域が３９０〜４５０ｎｍの紫外光を全面照
射し、ホトレジスト２中の感光基を十分反応させた後、
２ｏｏ°Ｃ３０分の加熱処理を施こし、同レジスト２を
十分フローさせ、下地凹凸を平坦化した後の断面構造を
第２図に示しだ。After that, the entire surface was irradiated with ultraviolet light having a wavelength range of 390 to 450 nm to sufficiently react the photosensitive groups in the photoresist 2.
FIG. 2 shows the cross-sectional structure after heat treatment was performed at 20° C. for 30 minutes to cause the resist 2 to flow sufficiently and the underlying unevenness was flattened.
このように、フェノールノボラック樹脂系のホトレジス
ト２に紫外光を全面照射することで、レジストの耐熱性
を低下させ、後に熱処理を加えることで、下地の凹凸部
は、パターン密度に関係なく平坦化でき、これを多層構
造レジストプロセスの下層有機層に用いることで、上層
レジストからのパターン転写を、非常に精度良く行うこ
とが可能になる。In this way, by irradiating the entire surface of the phenol novolac resin photoresist 2 with ultraviolet light, the heat resistance of the resist is reduced, and by applying heat treatment afterwards, the uneven portions of the base can be flattened regardless of the pattern density. By using this for the lower organic layer of a multilayer resist process, it becomes possible to transfer patterns from the upper resist with very high precision.
発明の効果
以上、本発明によると、多層構造レジストプロセスの下
層有機層に、たとえばフェノールノボランク樹脂系のホ
トレジストを用いて、下地凹凸のパターン密度に関係な
く、その表面の平坦化が可能となり、安定した多層構造
レジストプロセスを提供し得るものである。As described above, according to the present invention, by using, for example, a phenol novolank resin-based photoresist as the lower organic layer of a multilayer resist process, it is possible to flatten the surface regardless of the pattern density of the underlying unevenness. A stable multilayer structure resist process can be provided.
第１図および第２図は本発明実施例の工程順断面図であ
る。
１・・・・・凹凸のある半導体基板、２・・・・・・フ
ェノールノボラック樹脂系ホトレジスト。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第１
図FIGS. 1 and 2 are cross-sectional views in the order of steps of an embodiment of the present invention. 1... Semiconductor substrate with unevenness, 2... Phenol novolac resin photoresist. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure
Claims (3)
として、ホトレジスト層を回転塗布で形成した後、前記
半導体基板主表面全領域に紫外光を照射し、しかる後、
２００°Ｃ以上の熱処理を加える工程をそなえた半導体
装置の製造方法。(1) After forming a photoresist layer as a lower layer in a multilayer resist process on a semiconductor substrate by spin coating, the entire main surface area of the semiconductor substrate is irradiated with ultraviolet light, and then,
A method for manufacturing a semiconductor device that includes a step of applying heat treatment at 200°C or higher.
脂系のポジ型ホトレジストであることを特徴とする特許
請求の範囲第１項に記載の半導体装置の製造方法。(2) The method for manufacturing a semiconductor device according to claim 1, wherein the lower photoresist layer is a phenol novolac resin-based positive photoresist.
ｍの範囲であることを特徴とする特許請求の範囲第１項
もしくは第２項に記載の半導体装置の製造方法。(3) The ultraviolet light to be irradiated is 390 to 460 n
The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the range is m.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59017591A JPS60161621A (en) | 1984-02-01 | 1984-02-01 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59017591A JPS60161621A (en) | 1984-02-01 | 1984-02-01 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60161621A true JPS60161621A (en) | 1985-08-23 |
| JPH0244140B2 JPH0244140B2 (en) | 1990-10-02 |
Family
ID=11948137
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59017591A Granted JPS60161621A (en) | 1984-02-01 | 1984-02-01 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60161621A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6266630A (en) * | 1985-09-19 | 1987-03-26 | Oki Electric Ind Co Ltd | Manufacturing of semiconductor device |
| JPS6286823A (en) * | 1985-10-14 | 1987-04-21 | Tokyo Ohka Kogyo Co Ltd | Formation of fine pattern |
| JPH05210243A (en) * | 1991-09-27 | 1993-08-20 | Siemens Ag | Manufacture of bottom resist |
| US6514663B1 (en) | 1999-04-28 | 2003-02-04 | Infineon Technologies Ag | Bottom resist |
| US8220654B2 (en) | 2008-01-31 | 2012-07-17 | Aisan Kogyo Kabushiki Kaisha | Fuel tank structure |
-
1984
- 1984-02-01 JP JP59017591A patent/JPS60161621A/en active Granted
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6266630A (en) * | 1985-09-19 | 1987-03-26 | Oki Electric Ind Co Ltd | Manufacturing of semiconductor device |
| JPS6286823A (en) * | 1985-10-14 | 1987-04-21 | Tokyo Ohka Kogyo Co Ltd | Formation of fine pattern |
| JPH05210243A (en) * | 1991-09-27 | 1993-08-20 | Siemens Ag | Manufacture of bottom resist |
| US6514663B1 (en) | 1999-04-28 | 2003-02-04 | Infineon Technologies Ag | Bottom resist |
| US8220654B2 (en) | 2008-01-31 | 2012-07-17 | Aisan Kogyo Kabushiki Kaisha | Fuel tank structure |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0244140B2 (en) | 1990-10-02 |
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