JPS60149271A - Solid state image pickup device - Google Patents

Abstract

PURPOSE:To secure the low and high scan speeds and also to reduce the leakage current of a switch to prevent a blooming phoenomenon, by making threshold voltages different in level between elements of horizontal and vertical scan circuits and horizontal and vertical switch elements. CONSTITUTION:Plural photoelectric transducers 4 are arrayed 2-dimensionally on the same semiconductor substrate to store the signal charge corresponding to the optical information. The charge of the element 4 is extracted to a vertical output line 5 by a vertical switch (element) 3 and then sent out by a horizontal switch 6 for a prescribed period. While the charge extracted out of the switch 6 is sent out to a horizontal output line 7 through a horizontal scan circuit 1 consisting of an MOS transistor TR. The element of the circuit 1 and the threshold voltage of a vertical scan circuit 2 are set at different levels. While the different levels of threshold voltage are set between switches 3 and 6. The channel part of the switch 3 has the same conduction type as the substrate. Then the threshold value of the switch 3 is set higher than that of the switch 6 to prevent a blooming phenomenon.

Description

Detailed Description of the Invention [Field of Application of the Invention] The present invention provides, on a semiconductor substrate, a large number of light conversion elements that accumulate signal charges corresponding to optical information and a scanning circuit element that extracts the signal charges from each element. This relates to solid-state imaging devices, which have become obsolete.〇 [Background of the Invention] Solid-state imaging devices convert spatial two-dimensional original information into time-series electrical signals, and one type of this device has low resolution. In order to achieve this, a matrix of approximately 500 x 500 photoelectric conversion elements, switch elements for extracting signal charges from these photoelectric conversion elements, and an X (horizontal) scanning circuit and a Y (vertical) scanning circuit that output scanning pulses to open and close the switching elements are provided. ing.

The basic configuration of an example of a solid-state imaging device is illustrated in FIG. 1. The following description will be made with reference to the drawings, where the same reference numerals indicate the same or equivalent parts. In FIG. 1, reference numeral 1 denotes a horizontal scanning circuit, which sequentially outputs scanning pulses shifted by a fixed timing time in one horizontal scanning period to each stage of the unit circuit according to a clock pulse for driving the scanning circuit. Reference numeral 2 denotes a vertical scanning circuit, which consists of unit circuits with a number of stages corresponding to the number of rows (for example, 500) of the photoelectric conversion element matrix, and corresponds to one horizontal scanning period in one field by a clock pulse that drives the ζ scanning circuit. The scanning pulses shifted by a certain timing time are sequentially output to each stage of the unit circuit. Vertical transfer switch elements are sequentially opened and closed by scanning pulses output from the vertical scanning circuit 2,
The signals from the individual photoelectric conversion elements arranged two-dimensionally are transferred to the vertical output line 5, and the horizontal transfer switch elements 6 are sequentially opened and closed by the scanning pulses output from the horizontal scanning circuit l.
A signal is transferred from the vertical output line 5 to the horizontal output line 7 through the horizontal transfer switch element 6. Since the signal from the photoelectric conversion element 4 corresponds to the optical image projected thereon, the above operation? A video signal can be extracted from this.

The above-mentioned solid-state imaging device is usually relatively easy to integrate into a cylinder, and the second
As shown in the cross section of the structure, the photosensitive element and the switching element are manufactured using MOS-LSI technology, which allows the fabrication of an integrated structure. As can be seen from the figure, the vertical switch 3 is composed of an MO8 field effect transistor (hereinafter abbreviated as MO8T) equipped with a gate 8 that is opened and closed by a vertical scanning pulse, and the photoelectric conversion element 4 is a pn using the source junction.
(or np) junction photodiode, vertical output line 5 is MO
It consists of a wire (usually A/ is used) connected to the drain of 8T3. The horizontal switch 6 is composed of an MO8T equipped with a gate 9 that is opened and closed by a horizontal scanning pulse, and the horizontal hanging wire 7 is composed of a wiring (usually AI! is used) connected to the drain of the MO8T6.

10 is a semiconductor (e.g. silicon) substrate on which these elements are integrated; if the source and drain are made of p-type impurities, it is n-type (if the source and drain are made of n-type, it is p-type); ).

11 is an insulating oxide film (silicon oxide film is generally used).0 A solid-state imaging device configured in this manner can be used as a dwarf scanning circuit in which an MO8T source junction can be used as a photoelectric conversion element. However, this solid-state imaging device has the following problems due to its structure.

1. Scanning circuit The scanning circuit is composed of a horizontal scanning circuit that scans in the X direction and a vertical scanning circuit that scans in the Y direction. In the standard TV broadcasting system, it is 64μs, which is 15.73k expressed in frequency.
Hz), it is necessary to scan all the photoelectric conversion elements arranged in the X direction, and the scanning speed required for the horizontal scanning circuit is the number of pixels in the X direction (for example, 500
00 (Y direction) element is 500 times larger. ) will be higher. However, in general, the horizontal and vertical scanning circuits may have the same configuration (of course, they may be different circuits), and are preferably made in the same manufacturing process.

Each stage unit circuit of a typical conventionally used scanning circuit (see Material 5SD72-36 of the Semiconductor and Transistor Study Group of the Institute of Communication Studies) consists of one set of polarity inverting circuits and one set of polarity inverting circuits, as shown in Figure 3. It is a shift register type circuit composed of transfer gates.

In the figure, the first slope, which is a structural unit of the shift register type scanning circuit, and its driving circuit are shown together. 12 and 13 are clock pulse generators with a 180 phase shift, 14 is an input pulse 2 generation circuit that generates an input pulse vIN'l'' to obtain a shift pulse to the output terminal 16 of the unit circuit 15, and 17 is for driving. It is a power source.1
8 is a transfer MO8T which opens and closes according to clock pulses φ and l.

Reference numeral 19 denotes a transfer MO8T that opens and closes in accordance with the clock pulse φ2. 2o is a polarity inverting circuit, which is composed of a saturated load MO8T21 whose gate and drain are connected to the same power supply 17 and a drive MO8T22 connected in series.

Figure (b) shows the timing of the input/output pulses obtained by this circuit. The input pulse VIN synchronized with the clock pulse φ2 is delayed by the period T of the clock pulse, and the input pulse VIN is input from the output terminal 16. This output pulse (■) yields an output pulse (vs) with the same polarity as the pulse V1N. 1 is the next stage (not shown), and the output pulse V is delayed by a time Tt from its output. 2 is obtained, and T is obtained in the same manner.

It is possible to obtain an output pulse train v03 . In the above output pulse, the rise time is 1r (・
0・→・1・) is the time to charge the capacitance C parasitic to the output terminal 16 by the load MO8T, and the falling time [, (“1” → “0”) is the time to charge the parasitic capacitance C1 through the drive MO8T22. This is the time required for the "1" voltage accumulated in the voltage to be discharged. Generally, the conductance of the load Mo5T21 is selected to be about 1/101 of the conductance of the drive MO8T22 in order to perform the polarity reversal operation. For this reason,
The rise time is one order of magnitude larger than the fall time, and it is this rise time, that is, the conductance of the load MO8T21, that determines the upper limit of the speed that can be obtained with this scanning circuit. Here, the load MO8T conductance grnt and the 1'' level voltage V.) are given by the following equation, where the voltage of the power supply 17 is dd, and the threshold voltages are v and r.

gm, "'β(■dd-vT)(1) vosi+")-vdd'T (2) However, β is the channel conductance determined by the device constant of MO8T. As can be seen from this formula, when the threshold voltage is decreased, the conductance increases and the "I" level voltage also increases. That is, the third
As seen in Figure (C), as the threshold voltage decreases, V. ,..., becomes higher and t becomes smaller, so the speed of the scanning circuit becomes higher. From this, it is possible to select the threshold voltage TH(lo) of MO8T that constitutes a horizontal scanning circuit that operates at high speed to be lower than the threshold voltage ■Tvc8c) of MO8T that constitutes a vertical scanning circuit that operates at low speed. It becomes necessary.

■v>vT(IC) (3) T(sc) However, as mentioned above, it is desirable to make both scanning circuits in the same manufacturing process, and if this is done, it is natural that the MC)S that constitutes both scanning circuits of The threshold voltages of 'l' are the same.Therefore, the MO8 forming the horizontal scanning circuit
It is necessary to improve the conductance by changing the design value of T (channel width, channel length, etc.), but it is impossible to create a difference of two orders of magnitude by simply changing the design value.
This is undesirable because it causes disadvantages such as an extremely large layout area occupied by the horizontal scanning circuit.

2. The transfer switch horizontal switch 6 is selected every 64 μs by the high-speed horizontal scanning circuit 1 in the standard television broadcasting system, and the vertical output line is selected every 64 μs.
The video voltage is charged every 4 μs, whereas the vertical switch 3 is charged every 17 ms (field frequency is 60 Hz).
). As a result, the photodiode 4 is operated in a so-called accumulation mode in which the photodiode 4 receives irradiation with a 17 ms burst of light and accumulates the optical signal charge generated during that time in the diode, thereby increasing its photosensitivity. The resistance of MO8T when non-conducting is relatively large compared to other elements such as bipolar transistors, but even if the voltage applied to the gate is below the threshold voltage, it is not completely cut off and a small current (generally known as tailing current) occurs. ) flows,
The photodiode 4 is charged with current through the MO8T3% for the vertical switch. Therefore, it is not possible to read out a signal that accurately reflects optical information.

3. Inductive noise caused by the rise and fall of the aforementioned clock pulse that drives the horizontal scanning circuit 1 or the scanning pulse output from each stage of the circuit is transmitted to the noise horizontal signal output line 7 through parasitic capacitance inside or outside the substrate semiconductor. Leakage (noise generated by Z-less or scanning pulses in the clock that drives the vertical scanning circuit) can be effectively eliminated by keeping the clock pulse within the horizontal pranking period provided for each horizontal scanning period. (This is not a problem because it can be removed from the video signal.) At 0%, the noise that enters the body through the body is added to the parasitic capacitance and the resistance of the semiconductor substrate, and enters through a complicated path, so the noise processing circuit (generally The noise is extremely difficult to remove (low-pass filters are used). For this reason, the signal-to-noise ratio of solid-state imaging devices is lower than that of electronic devices, and the image quality is poor, which limits the field of application of the device or prevents it from being put to practical use.

[Purpose of the invention]

The present invention aims to solve the above problems.

[Summary of the invention]

As a means to solve the above-mentioned problems, it is conceivable to make the threshold voltage of the scanning circuit higher than the threshold voltage of MO8T of the horizontal scanning circuit. Furthermore, regarding noise intrusion, it is possible to integrate the scanning circuit and the switch in different substrate areas.Based on this idea, in the present invention, it is possible to integrate the scanning circuit and the switch in different substrate areas. Is this the main surface of the semiconductor substrate that forms the solid-state imaging device? A region that has the same conductivity type as the substrate but has a higher impurity concentration than the substrate @
was formed, and an MO8T for vertical switches was integrated in this area.

[Embodiments of the invention]

Hereinafter, the present invention will be described in detail with reference to embodiments. FIG. 4 is a plan configuration diagram showing the basic concept of a solid-state imaging device according to the present invention. 23 is an area including the horizontal scanning circuit 1, 24 is an area including the horizontal switch MO8T6, and 25 is an area including the horizontal scanning circuit 1;
26 is a region including the vertical scanning circuit 2, and 26 is a region including a photoelectric conversion section in which a vertical switch M, an OS T 3, and a photodiode 4 are arranged in a two-dimensional manner.

First, the scanning circuit will be explained. Threshold voltage of MO8T of horizontal scanning circuit 1 included in area 23 ■1...1
The region T (sr,
The threshold voltage T (sc) of the MO8T of the vertical scanning circuit 2 included in the control area 25 is set lower than that of the MO8T.

Next, the threshold voltage of MO8T for switching will be explained. MO8T6 for the horizontal switch is as described above. moreover,
In detail, the vertical signal output line 5 that connects to the horizontal switch
The information storage time of the photodiode 4 connected to the vertical switch is 500 times longer, whereas the information storage time of the photodiode 4 connected to the vertical switch is 64 μS. Therefore, in order to suppress information leakage from the photodiode, the tailing current when the vertical switch MOS T 3 is not conducting is reduced to 1/10 by increasing K O,IV when the vertical switch MOS T 3 is not conducting. MO8 for vertical switch
To make the leakage of optical information of T3 simultaneous with the leakage of MO8T for horizontal switch, the threshold voltage vV of MO8T for vertical switch is compared with the threshold voltage of MO8T for horizontal switch T (8W) T ( 8W) 0.25 V, and it is generally desirable that the threshold voltage of MO8T included in region 26 be higher than that of MO8T included in region 24.

vv > VH T (sw)? (8W) (4) The threshold voltage between the MO8Ts that make up the scanning circuit and the switch changes depending on the required characteristics.
The size relationship cannot be unambiguously determined as described above.

As mentioned above, in the present invention, the MO constituting the imaging device
The threshold voltages of 8T are set to partially different values. As a method of setting the threshold voltage to partially different values,
The threshold voltage can be changed by changing the substrate concentration of the MO8T channel region constituting the four regions (FIG. 4) or the two regions described above.

For simplicity, Figure 5 shows the threshold voltages of the two regions depending on the substrate concentration? An example of changing this is shown, and its cross-sectional structure is shown in the sixth section.
Figure ζ is shown. 10 is a substrate of the first conductivity type, 57-1 is an impurity layer of the same type as the substrate containing region 46, and 57-2 is region 4
This is an impurity layer of the same type as the substrate containing 7. Reference numerals 58 and 59 denote the drain or source of any MO8T51 forming the horizontal scanning circuit 1 and horizontal switch MO8T6Km, which is I and is made of an impurity of the second conductivity type. 60 and 61 are the drains or sources of any MO8T5 constituting the vertical scanning circuit 2 and the vertical switch 3, and are made of impurities of the second conductivity type. 56 is a gate electrode. In the case of this structure, the threshold voltage depends on the concentration of the impurity N57 of low conductivity type, and the threshold voltage increases as the concentration increases. Therefore, the concentration N1v of the impurity layer 57-2 is
It is sufficient if the concentration is higher than the concentration N1H.

N1v>N1H The most common substrate concentration was selected to 15 pieces/cmJ'
M, N, H 1015~1016, N1v 5×10
It may be selected from about 15 to 1017. As a special example, the impurity concentration of the region where the region 46 is integrated may be the same as that of the substrate; in this case, there is no need to provide the impurity layer 57-1, and the drain and source of M'08T51 are directly formed on the substrate. Just switch off. This impurity layer can be easily manufactured by a normal ion implantation method.

In the embodiment shown in FIG. 6, it was considered that an impurity layer having a higher concentration than the substrate is provided in the entire corresponding region, but the same effect can of course be obtained by increasing the concentration only in the channel region of the MO8T structure. FIG. 7 shows a cross-sectional structure of an embodiment in which the threshold voltages of the two regions are changed depending on the channel concentration, similar to the embodiment of FIG. 6. In the figure, 58.59 is area 4
It is the drain or source of any MO8T51 constituting 6 and is made of impurity of the 24th electric type. Reference numeral 62-1 denotes an impurity layer provided in a region located under the gate electrode 52, that is, a channel portion, and which is the same type of impurity as the substrate and has a higher impurity concentration than the substrate. This impurity layer is provided for each MO8T forming this region. Reference numerals 60 and 61 are drains or sources of any MO8T 55 constituting the region 47, and are made of impurities of the second conductivity type. 5
6 is a gate electrode. 62-2 is an impurity layer provided in the channel part, which also constitutes the MO8T region.
provided for each one. As in the embodiment of FIG. 6, the impurity concentration N1v(CI()) of the impurity layer 62-2 is set higher than the concentration NIH0° of the impurity Ji62-1.

N1v(cH)〉N1H3゜.

As explained above in detail using the embodiments, it is possible to set the threshold voltages of the elements of the horizontal scanning circuit and the elements of the vertical scanning circuit to different values. As a result, high and low scanning speeds can be obtained, and by setting the threshold voltages of the horizontal switch element and the vertical switch element to different values, it is possible to reduce the leakage current of the switch. Furthermore, by sifting the threshold value of the vertical switch element, it is possible to prevent flooding (overflow of charge due to intense light).

In the above description, the combination of a photodiode and an MO8 type scanning circuit was used as an example of a solid-state imaging device as a component, but the present invention can also be applied to a solid-state imaging device consisting of a combination of a photodiode and a voltage transfer type scanning element. It is possible to implement it.

[Brief explanation of the drawing]

Fig. 1 is a diagram showing the basic configuration of a conventional solid-state imaging device, Fig. 2 is a sectional view showing the structure of the solid-state imaging device shown in Fig. 1, and Fig. 3 is a diagram showing the scanning circuit used in the solid-state imaging device and FIGS. 4 and 5 are diagrams showing the operating characteristics, and FIGS. 4 and 5 are diagrams showing the planar configuration of the solid-state imaging device of the invention. FIGS. 6 and 7 are diagrams showing the cross-sectional structure of the solid-state imaging device of the invention. 1...Horizontal scanning circuit 2...Vertical scanning circuit 3...
Vertical switch (element) 4... Photoelectric conversion element (photodiode) 5... Vertical output line 6... Horizontal switch (element) 7... Horizontal output line 10... Semiconductor substrate (first conductivity type) Substrate) 11... Insulating oxide film 23.24, 25, 26, 46.47... Region 51.
55...MO8T (MOS transistor) 57...
・First conductivity type impurity layer 62... 14th conductivity type impurity layer 7 Figure 2 Figure ¥ 311J 5 ¥ 4 Ro0-1in Yu Anti8-i 笥 zTi! 3 1-4Δ-147□ 1 1 1 謬'7T! 1 1-4g-+ 47□ l I+ Continued from page 1 0 Inventor Osamu Ando Hisashi Higashi Koigakubo Research Institute, Kokubunji City [Phase] Inventor Tenba Common name Kokuyo City Keigakubo Research Institute 0 Inventor Horiuchi Katsutada Kunichi City Keigakubo Research Institute 0 Inventor Seiji Kubo Kunichi Keigakubo Research Institute

Claims (1)

[Claims] 1. A plurality of photoelectric conversion elements arranged two-dimensionally on the surface of the same semiconductor substrate and accumulating signal charges according to optical information, and vertical transmission of the signal charges of the photoelectric conversion elements. A vertical transfer switch element for extracting signal charges from this vertical transmission line in a predetermined period, a horizontal transfer switch element for extracting signal charges from this vertical transmission line in a predetermined period, and outputting the signal charges obtained via this horizontal transfer switch element in a predetermined order. In a solid-state imaging device comprising a horizontal scanning element for taking out to a terminal and a vertical scanning element for controlling opening and closing of the vertical transfer switch element,
The channel portion of the vertical transfer switch element is doped with an impurity layer of the same conductivity type as the substrate and at a higher concentration than the substrate, and the threshold value of the vertical transfer switch element is made higher than the threshold value of the horizontal transfer switch element. Solid-state imaging device◇2, the solid-state imaging device according to claim 1, characterized in that the vertical transfer switch element is formed in an impurity layer region that has the same conductivity type as the substrate and has a higher concentration than the substrate. . 3. The solid-state imaging device according to claim 1, wherein only the channel portion of the vertical transfer switch element is an impurity layer having the same conductivity type as the substrate and having a higher concentration than the substrate. 4. The solid-state imaging device according to claim 1, wherein the channel portion of the vertical scanning element is an impurity layer having the same conductivity type as the substrate and having a higher concentration than the substrate.