JPS60140323A - Liquid crystal display panel device - Google Patents

Abstract

PURPOSE:To obtain a device which has a long life and a high quality, and also does not require a charge storage capacity by detecting a ''0'' voltage level shift in a single direction applied to a liquid crystal layer, and feeding back a correcting voltage of this level shift to the liquid crystal layer. CONSTITUTION:When a drain bus line Dcomp is connected in advance to a ground potential, when level compensating transistors TrC1-TrCn are on, one end of level compensating liquid crystals LCc1-LCcn becomes the ground potential through the Dcomp. As for the LCc1-LCcn, when the Trc1-Trcn become off, the potential drops by DELTAVs from ''0''V of an initial state by a charge movement from a channel of the Trc1-Trcn, and a shift voltage DELTAVs is generated in the source of the Trc1-Trcn. It is fetched by a source bus line Scomp and received by an input terminal 51, and connected to a common electrode of a display panel from an output terminal 54 through an impedance converting buffer 52 and a peak holding circuit 53.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical Field of the Invention The present invention relates to a display device, and particularly to a matrix type liquid crystal display panel device having an insulated gate transistor for inverting in each pixel.

(2) Prior Art and Problems An equivalent circuit diagram for one pixel of a liquid crystal display panel using a conventional insulated gate transistor is shown in FIG. 1(a). The gate, source, and drain voltages of the insulated gate transistor Tr are V, Va, and V, respectively.

One end of the liquid crystal CL is connected to the source. The other end of the liquid crystal CL is connected to a common voltage vcommon, and a charge storage capacitor Cs may be connected in parallel with the liquid crystal C. The insulated gate transistor Tr has the structure shown in FIG.
and an amorphous silicon layer 13. Gate insulating film 1
Consisting of 5. A conductive portion 14 called a channel is formed on the amorphous silicon layer 13 by the voltage applied to the gate electrode 16 . The source electrode 12 is connected to a transparent conductive film 17 that drives the liquid crystal. When the transistor is in the on state, charge is accumulated due to the voltage applied to the gate, forming the channel 14 and draining the drain electrode 11.
．． The source electrode 12 becomes conductive. When the transistor is in the off state, no charge accumulation occurs and therefore the channel 14
is not formed. When a transistor goes from on to off state.

The charges accumulated in the channel 14 are transferred to the drain electrode 11,
It flows out through the source electrode 12. The charge accumulated in the channel 14 is (-) in a thin film transistor using electron accumulation or a MOS transistor using an n-type inversion layer.

Further, in a MOS transistor using hole accumulation or a p-type inversion layer, it becomes (+).

FIG. 2 shows an example of the various voltages when driving the circuit of FIG. 1 ia+ for a transistor using an electron accumulation or n-type inversion layer. When the gate voltage V applied to the gate of the transistor Tr rises and turns on the transistor Tr, the liquid crystal C is turned on.

The interlayer voltage V s -V common is the drain voltage (■) due to the time constant of the interlayer capacitance of the liquid crystal C and the on-resistance of the transistor Tr. approach. After that, the gate voltage V falls and the transistor is turned off, causing the aforementioned charge outflow and the interlayer voltage of the liquid crystal CL Vs -V cos+son
decreases by ΔVs due to the outflow of charge. A similar phenomenon occurs each time the transistor is turned off, and as shown in FIG. 2, the interlayer voltage of the liquid crystal C1 shifts to the (-) side. In a transistor using hole accumulation or a p-type inversion layer, a voltage shift (→-) occurs for the same reason.

This type of voltage shift in a single direction has a large effect on the lifespan of the liquid crystal, and since liquid crystal displays are affected by the voltage applied between the liquid crystal layers, it is disadvantageous that the display quality will deteriorate if voltage is constantly applied. There is. In order to solve this problem, there is a method of applying a compensation voltage corresponding to a -voltage shift to , as shown in FIG. (b) The figure shows V
A waveform diagram when compensating for common is shown. (
a) The correction in the figure is to increase the drain voltage v0 by a voltage level shift ΔVs. By applying a voltage higher by ΔVs to the liquid crystal in advance, when the transistor is off and ΔVs decreases, the voltage applied to the liquid crystal returns to its original value. .

On the other hand, the correction shown in FIG. 3B is to correct the liquid crystal eyebrow voltage to its original value by lowering V common by the voltage level shift ΔVs. Conventionally, this compensation voltage was fixed, but the dielectric constant of the liquid crystal layer when it is on and off generally differs by a factor of two to several times.Furthermore, the anisotropy of this dielectric constant is large (depends on temperature), so it cannot be accurately determined. It was difficult to obtain a sufficient amount of compensation.

As a way to increase the accuracy of compensation, we add a charge storage capacitance Cs several times larger than the capacitance of the liquid crystal layer, as shown by the broken line in Figure 1+8), to prevent the increase in compensation error even if the dielectric constant of the liquid crystal layer changes. There are ways to suppress it. That is.

Since the voltage level shift Δv3 is caused by charge movement from the transistor Tr, if the capacitance on the side receiving charges is large, ΔVs becomes small.

Even when the dielectric constant of the liquid crystal layer changes, if a large capacitor is connected in parallel, the overall relative capacitance change will be small, and the change in ΔVs will also be small.

However, this addition of capacitance complicates the manufacturing process of the liquid crystal display panel, and also requires a large capacity with high reliability, which has the disadvantage of being a major factor in reducing yield.

(3) Purpose of the Invention The purpose of the present invention is to accurately detect the O voltage level shift in a single direction applied to the liquid crystal layer, and to feed back an accurate correction voltage for this level shift to the liquid crystal layer. Therefore, it is an object of the present invention to provide a liquid crystal panel display device with a long life, high quality, simple structure, and high yield since no charge storage capacitor is required.

(4) Main Points of the Invention The present invention comprises a 0 voltage level detection element with a transistor having the same structure as a switching transistor, and a capacitance of the same liquid crystal layer used in the display, so that no voltage is applied to the liquid crystal layer. It is designed to accurately detect a zero voltage level shift in a single direction.

In a liquid crystal display panel including an insulated gate transistor for switching in each pixel, the charge accumulated in the transistor channel portion when the transistor is in the on state is transferred to the liquid crystal display panel for display when the transistor is turned off. A liquid crystal display panel device comprising: a means for detecting a voltage level shift of a liquid crystal cell caused by a voltage flowing into the cell; and a correcting means for correcting the voltage level shift using a detection signal from the voltage level shift detecting means. This is achieved by providing

(5) Examples of the invention FIG. 4 shows a liquid crystal display panel according to an embodiment of the present invention.

In FIG. 4, the sources of the transistors Tr11 to Trnn of the pixel switch layer arranged in a grid pattern are connected to the pixel (7).
Liquid crystals L C+ + to LCnn are connected, gate pass lines G1 to Gn connect the gates of the transistors in each row, and drain pass lines D1 to Dn connect the drains of the transistors in each column. The gate pass lines G1 to Gn include level compensation transistors T r of the voltage level shift detection circuit 18 within the broken line in FIG.
The gates of the level compensation transistors T r c + to Trcn are connected to each other, and the level compensation liquid crystals LCc + to LCcn and the source pass line S com p for drawing out the compensation voltage are connected to the sources of the level compensation transistors T r c + to Trcn.

The drain is connected to a drain pass line Dcomp.

FIG. 5 shows an embodiment of the compensation voltage generation circuit.
An input voltage from the source path line S com p shown in the figure is received at an input terminal 51, and an impedance conversion buffer 52. Output terminal 5 via peak hold circuit 53
4 to the common electrode of the display panel.

In this embodiment, the voltage compensation shown in FIG. 3(b) is performed, and the applied voltage is detected and compensated as shown below.

The liquid crystal display panel is driven by applying liquid crystal drive data to the drain pass lines D1 to Dn in accordance with a scanning signal that sequentially activates the gate lot lines GI to Gn. A detailed explanation of the liquid crystal drive in each transistor will be omitted since it was made using the conventional example shown in FIG. When Trc+=Trcn is on, one end of the level compensation liquid crystals LCCI to LCcn is D.
It becomes ground potential through com p. Level compensation liquid crystal LCc+~L Ccn LtWhen the level compensation transistor Trc+xTrcn is turned off, the charge transfer from the channel of this transistor Trc+~Trcn lowers the ΔVs potential from the initial state OV, and the level compensation transistor A shift voltage ΔVs is generated at the sources of T r c + to TrCfi. This is taken out by the source pass line Scomp and fed back to the common electrode via the compensation voltage generation circuit shown in FIG.

In the compensation voltage generation circuit, ΔVs is extracted from the fluctuating voltage of Scomp by a peak hold circuit 53 which maintains the negative peak value of the signal from Scomp via a buffer 52 with high input impedance.

Common electrode, that is, liquid crystal for level compensation L Cc I-L Cc
n and the ground terminals of display liquid crystals LC++ to LCnn. And level compensation transistors TrC1 to 7'
The DC component voltage ΔVs applied to this liquid crystal layer when r c n is off is canceled and becomes zero.

In addition, display liquid crystals LC++ to LCnn and transistors,
Tr+ 1 to Trnn are LCc+ to LCcn and Tr
Since they have the same structure as c1 to Trcn, the shift voltage due to charge inflow from the channels of transistors Tr++ to Trnn is also the same ΔV as the shift voltage in the detection circuit.
By feeding back to the common electrode, the DC component is removed from other display pixels as well, and the liquid crystal is completely driven by AC. As a result, the life of the liquid crystal can be extended, and since only the voltage for data is applied to two display pixels, the quality of one display is also improved. Furthermore, since the transistors and liquid crystals used for detection have the same structure as those used in the display panel, there is no need to perform temperature correction, and the detection circuit can be created in the same process, simplifying the circuit configuration.

In the embodiment of FIG. 4, a multi-element detection element array is used, but this is to lower the output impedance, and a single large element may be used for this purpose.

Furthermore, although the detection element was provided on the display panel in the previous embodiment, it may be provided at a location other than the panel due to mounting considerations and the same effect can be obtained. -Furthermore, in the previous embodiment, a compensation voltage was applied to the common electrode, but as shown in FIG.
It is also possible to correct by drain voltage as shown in
Has a similar effect.

(7) Effects of the Invention According to the present invention, it is possible to prevent a shift in the voltage level applied to the liquid crystal, thereby prolonging the life of the display panel.1 Also, since there is no need to add a storage capacitor, the manufacturing process of the panel can be simplified. 2. This has the effect of improving yield.

[Brief explanation of the drawing]

Figure 1 (al is the equalization circuit diagram of the liquid crystal display panel, Figure 1 (
bl is a cross-sectional view of an insulated gate transistor of a liquid crystal display panel, FIG. 2 is a waveform diagram when driving the liquid crystal display panel, FIG. 3 (al), (bl is a waveform diagram showing an example of level shift voltage compensation, FIG. is a circuit diagram representing an embodiment of the present invention, and FIG. 5 is a configuration diagram of a compensation voltage generation circuit. TrotA'Trnn...Switching transistor, LC11-LCnn... Liquid crystal display element, TrcI-Trcn. ... Transistor for level compensation. LCc+~LCcn... Liquid crystal for level compensation. 18... Voltage level shift detection circuit. - Patent applicant Fujitsu Ltd. Figure 4 Figure 5

Claims (6)

[Claims] (1) In a liquid crystal display panel equipped with an insulated gate transistor for switching for each pixel, the charge accumulated in the transistor channel part when the transistor is in the on state is
A liquid crystal display comprising: means for detecting a voltage level shift of a liquid crystal cell due to a voltage flowing into a display liquid crystal cell; and a correction means for supplementing the voltage level shift with a detection signal from the voltage level shift detecting means. Display panel device. (2) The liquid crystal display according to claim 1, wherein the voltage level shift detection means has a transistor having the same structure as the switching transistor and a liquid crystal cell that is the same as the subassembly display liquid crystal cell. Panel device. (3) The liquid crystal display panel device according to claim 1, wherein the detection means is provided on the display panel. (4) The liquid crystal panel i display device according to claim 1, characterized in that the nucleus detection means is provided in a portion other than the display panel. (5) Claims characterized in that the correction means has a level shift correction voltage generating means, and the correction is performed by applying the level shift correction voltage to a common electrode provided on the display panel. 2. The liquid crystal display panel device according to item 1. (6) The liquid crystal display panel device according to claim 5, wherein the correction is performed by adding the level shift correction voltage to the voltage applied to the drain of the switching transistor.