JPS5972844A - Communication control system - Google Patents

Communication control system

Info

Publication number
JPS5972844A
JPS5972844A JP57184328A JP18432882A JPS5972844A JP S5972844 A JPS5972844 A JP S5972844A JP 57184328 A JP57184328 A JP 57184328A JP 18432882 A JP18432882 A JP 18432882A JP S5972844 A JPS5972844 A JP S5972844A
Authority
JP
Japan
Prior art keywords
signal
command signal
master
slave
acknowledge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57184328A
Other languages
Japanese (ja)
Other versions
JPS6365258B2 (en
Inventor
Toshio Ogawa
敏夫 小川
So Akai
赤井 創
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Hokushin Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Hokushin Electric Corp filed Critical Yokogawa Hokushin Electric Corp
Priority to JP57184328A priority Critical patent/JPS5972844A/en
Publication of JPS5972844A publication Critical patent/JPS5972844A/en
Publication of JPS6365258B2 publication Critical patent/JPS6365258B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/12Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/1607Details of the supervisory signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To prevent the double processing owing to a fault of a transmission part of a slave station, by testing the function of a transmitter of acknowledge signal after reception of a command signal. CONSTITUTION:A command signal transmitted onto a transmission line L from a master M is stored temporarily in a buffer memory 13 via a receiving circuit 11. A logic control part 30 checks the stored contents of the buffer 13 to perform an error check or an address check. Then a confirmation signal of a bit pattern which is not recognized as a significant signal frame is transmitted onto the line L. This confirmation signal is detected by a carrier detecting circuit 12, and the result of this detection is sent to a logic control part 30. If the absence of carrier is decided, a fault is decided with a transmitting circuit 22 to avoid performing the processing of the received command signal. Then an acknowledge signal is transmitted after the command signal is processed.

Description

【発明の詳細な説明】 本発明は、通信制御システムに関するものであって、詳
しくは、マスターからスレーブにコマンド信号を送出し
スレーブからマスターにアクノリッジ信号を返送するよ
うに構成されたシステムの改良に関するものであυ、複
数のマスターとスレーブとの間でコマンド信号及びアク
ノリッジ信号の送受を効率よく行うことができるように
したものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a communication control system, and more particularly, to an improvement in a system configured to send a command signal from a master to a slave and return an acknowledge signal from the slave to the master. This system is designed to efficiently transmit and receive command signals and acknowledge signals between a plurality of masters and slaves.

通信制御システムの一種に、マスター通信制御装置(以
下マスターという)からのコマンド信号に対してスレー
ブ通信制御装置(以下スレーブという)からアクノリッ
ジ信号を返送して1回の通信を終了するように構成され
、通信エラーが発生した場合にはコマンド信号を再送し
てエラー回復を図るようにしたものがある。
A type of communication control system is configured so that a slave communication control device (hereinafter referred to as slave) returns an acknowledge signal in response to a command signal from a master communication control device (hereinafter referred to as master) to terminate one communication. Some devices are designed to retransmit a command signal in order to recover from the error when a communication error occurs.

このようなシステムでは、アクノリッジ信号の伝送にエ
ラーが発生した場合に、再送されるコマンド信号に対し
て2重処理を行わないようにスレーブに2重処理を禁止
する手段を設けておかなければならない。
In such a system, if an error occurs in the transmission of the acknowledge signal, a means must be provided to prevent the slave from performing double processing on the retransmitted command signal. .

このような2重処理禁止にあたっては、一般には、コマ
ンド信号フレーム内にシーケンス番号を付け、スレーブ
では同一シーケンス番号の連続処理を実行しないように
規定することが行われている。
To prohibit such double processing, a sequence number is generally added to the command signal frame, and it is specified that the slave will not execute consecutive processing with the same sequence number.

しかし、このような方法では、第1図に示すように複数
mのマスターMと複数nのスレーブSとでm:nのシス
テムが構成されている場合、各マスターMでは各スレー
ブS毎のシーケンス番号管理を行うと共に各スレーブS
では各マスターM毎のシーケンス番号管理を行い、さら
には電源0N10FF時の特殊処理も行わなければなら
ず、制御は複雑になる。
However, in such a method, when an m:n system is configured with a plurality of m masters M and a plurality of n slaves S as shown in FIG. In addition to number management, each slave S
In this case, sequence numbers must be managed for each master M, and special processing must also be performed when the power is turned on and off, making the control complex.

このような欠点を解決する方法として、アクノリッジ信
号伝送にエラーが発生した場合にはマスターMからスレ
ーブ8に対してそのアクノリッジ信号フレームの再送を
要求するコマンド信号を送出する方法が提案されている
が、スレーブSのアクノリッジ信号の送信部が故障した
場合にはマスターMは最初のコマンド信号が受信されな
かったと判断してコマンド信号を再送することにab、
2重処理の問題を生じることになる。
As a method to solve these drawbacks, a method has been proposed in which, when an error occurs in acknowledge signal transmission, the master M sends a command signal to the slave 8 requesting retransmission of the acknowledge signal frame. , if the transmitter of the acknowledge signal of the slave S fails, the master M determines that the first command signal was not received and resends the command signal.
This results in the problem of double processing.

本発明は、このようなスレーブSの送信部が故障した場
合の2重処理を避けるようにしたものであって、スレー
ブにはアクノリッジ信号の送信機能確認手段を設け、コ
マンド信号を受信した後アクノリッジ信号の送信機能の
確認を行い、送信機能が正常の場合にはコマンド信号に
従って所定の処理を実行し、処理実行後アクノリッジ信
号を返送するようにしたことを特徴とする。
The present invention is designed to avoid such double processing when the transmitter of the slave S fails, and the slave is provided with means for checking the transmission function of an acknowledge signal, and after receiving the command signal, the slave S is provided with means for confirming the transmission function of the acknowledge signal. The present invention is characterized in that the signal transmission function is checked, and if the transmission function is normal, a predetermined process is executed according to the command signal, and an acknowledge signal is returned after the process is executed.

以下、図面を用いて詳細に説明する。Hereinafter, it will be explained in detail using the drawings.

第2図は、本発明を構成するスレーブSの具体例を示す
ブロック図であって、10は受信部、2oは送信部、3
0は論理制御部である。
FIG. 2 is a block diagram showing a specific example of the slave S constituting the present invention, in which 10 is a receiving section, 2o is a transmitting section, and 3
0 is a logic control section.

受信部10は、伝送ラインLからの信号を受信する受信
回路11、伝送ラインL上で通信が実行されていること
を検出するキャリア検出回路12、受信した信号フレー
ムを一時記憶する受信バッファメモリ13などで構成さ
れている。送信部20は、伝送ラインLを介してマスタ
ーMに返送するアクノリッジ信号フレームを一時記憶す
る送信バッファメモリ21、伝送ラインLに信号を送出
する送信回路22などで構成されている。論理制御部3
0は、各部の動作制御及び信号送受制御を行う。
The receiving unit 10 includes a receiving circuit 11 that receives signals from the transmission line L, a carrier detection circuit 12 that detects that communication is being performed on the transmission line L, and a receiving buffer memory 13 that temporarily stores received signal frames. It consists of etc. The transmitting unit 20 includes a transmitting buffer memory 21 that temporarily stores an acknowledge signal frame to be sent back to the master M via the transmission line L, a transmitting circuit 22 that transmits a signal to the transmission line L, and the like. Logic control section 3
0 controls the operation of each part and controls signal transmission and reception.

このように構成された装置の動作について説明する。The operation of the device configured in this way will be explained.

(3) マスターMから伝送ラインL上にコマンド信号が伝送さ
れると、その信号フレームは受信回路11を介して受信
バッファメモリ13[一時記憶される。
(3) When a command signal is transmitted from the master M onto the transmission line L, the signal frame is temporarily stored in the reception buffer memory 13 via the reception circuit 11.

論理制御部30は受信バッファメモリ13の内容を調べ
、エラーチヱックやアドレスチェックを行い、工2−が
ありたシ自分宛のアドレスでない場合にはその信号を無
視するが、エラーがなく自分宛のアドレスの場合には次
のステップに移行する。すなわち、次のステップにおい
て、アクノリッジ信号を送出するための送信回路22の
動作機能の確認を行う。この確認にあたっては、伝送ラ
インL上に有意義信号フレームとして認識されないビッ
トパターンの確認信号を送出し、この信号をキャリア検
出回路12で検出して検出結果を論理制御部3゜に送出
する。なお、このような確認信号としては、例えばHD
LCfltlJ N手1@に準拠した通信システムでは
、フラグパターン以外のビットパターンであれば任意の
ビットパターンを用いることができる。確認の結果、キ
ャリア検出が行われない場合には送信回路22の故障と
して判断し、受信したコマンド信(4) 号の処理を行わないようにする。一方、確認の結果、送
信回路22が正常の場合には受信したコマンド信号の処
理を実行し、実行後アクノリッジ信号を送出する。
The logic control unit 30 examines the contents of the reception buffer memory 13, performs an error check and address check, and ignores the signal if there is an error and the address is not addressed to itself, but if there is no error and the address is addressed to itself. In this case, move to the next step. That is, in the next step, the operational function of the transmitting circuit 22 for sending out the acknowledge signal is confirmed. For this confirmation, a confirmation signal with a bit pattern that is not recognized as a meaningful signal frame is sent onto the transmission line L, this signal is detected by the carrier detection circuit 12, and the detection result is sent to the logic control section 3. Note that such confirmation signals include, for example, HD
In a communication system compliant with LCfltlJN-1@, any bit pattern other than the flag pattern can be used. As a result of the confirmation, if carrier detection is not performed, it is determined that the transmitting circuit 22 is malfunctioning, and the received command signal (4) is not processed. On the other hand, if the transmission circuit 22 is normal as a result of the confirmation, it executes processing of the received command signal and sends out an acknowledge signal after execution.

このような構成によれば、送信回路22が伝送ラインL
にアクノリッジ信号を送出する機能を確認した後にコマ
ンド信号に従って処理を実行することになるので、アク
ノリッジ信号は必ずマスターMに伝送されることになる
。従って、アクノリッジ信号の伝送中にノイズ々どKよ
って信号フレームにエラーが発生した場合には、マスタ
ーMから前回のコマンド信号を再送する必要はなく、ア
クノリッジ信号の再送を要求するだけでよい。なお、ア
クノリッジ信号が返送されない場合には、マスターMか
ら所定回数前回のコマンド信号を送出し、所定回数の送
出に対して応答がない場合にはスレーブSの故障と判断
することになる。
According to such a configuration, the transmitting circuit 22 connects to the transmission line L.
Since the process is executed according to the command signal after confirming the function of sending an acknowledge signal to the master M, the acknowledge signal is always transmitted to the master M. Therefore, if an error occurs in the signal frame due to noise during transmission of the acknowledge signal, there is no need to retransmit the previous command signal from the master M, and it is only necessary to request retransmission of the acknowledge signal. If the acknowledge signal is not returned, the master M sends out the previous command signal a predetermined number of times, and if there is no response to the predetermined number of sends, it is determined that the slave S has failed.

このように、本発明によれば、従来のよう々シーケンス
番号を用いることなく1個又は複数のマスターとスレー
ブとの間での信号の送受を制御することかでき、各種の
通信制御システムに有効である。
As described above, according to the present invention, it is possible to control the transmission and reception of signals between one or more masters and slaves without using sequence numbers as in the past, and it is effective for various communication control systems. It is.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明に係る通信制御システムの概念図、第2
図は本発明を構成するスレーブ8の具体例を示すブロッ
ク図である。 M・・・マスター通信制御装置(マスター)、S・・・
スレーブ通信制御装置(スレーブ)、10・・・受信部
、11・・・受信回路、12・・・キャリア検出回路、
13・・・受信バッファメモリ、20・・・送信部、2
1・・・送信バッファメモリ、22・・・送信回路、3
0・・・論理制御部、L・・・伝送ライン。 7  I 圓 (7)
Fig. 1 is a conceptual diagram of a communication control system according to the present invention, Fig. 2 is a conceptual diagram of a communication control system according to the present invention;
The figure is a block diagram showing a specific example of the slave 8 constituting the present invention. M...Master communication control device (master), S...
Slave communication control device (slave), 10... receiving section, 11... receiving circuit, 12... carrier detection circuit,
13... Reception buffer memory, 20... Transmission section, 2
1... Transmission buffer memory, 22... Transmission circuit, 3
0...Logic control unit, L...Transmission line. 7 I En (7)

Claims (1)

【特許請求の範囲】[Claims] マスターからスレーブにコマンド信号を送出しスレーブ
からマスターにアクノリッジ信号を返送するように構成
された通信制御システムにおいて、スレーブにはアクノ
リッジ信号の送信機能確認手段を設け、コマンド信号を
受信した後アクノリッジ信号の送信機能の確認を行い、
送信機能が正常の場合にはコマンド信号に従って所定の
処理を実行し、処理実行後アクノリッジ信号を返送する
ようにしたことを特徴とする通信制御システム。
In a communication control system configured to send a command signal from a master to a slave and return an acknowledge signal from the slave to the master, the slave is provided with means for confirming the sending function of the acknowledge signal, and after receiving the command signal, the acknowledge signal is Check the sending function,
A communication control system characterized in that when a transmission function is normal, a predetermined process is executed according to a command signal, and an acknowledge signal is returned after the process is executed.
JP57184328A 1982-10-20 1982-10-20 Communication control system Granted JPS5972844A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57184328A JPS5972844A (en) 1982-10-20 1982-10-20 Communication control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57184328A JPS5972844A (en) 1982-10-20 1982-10-20 Communication control system

Publications (2)

Publication Number Publication Date
JPS5972844A true JPS5972844A (en) 1984-04-24
JPS6365258B2 JPS6365258B2 (en) 1988-12-15

Family

ID=16151394

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57184328A Granted JPS5972844A (en) 1982-10-20 1982-10-20 Communication control system

Country Status (1)

Country Link
JP (1) JPS5972844A (en)

Also Published As

Publication number Publication date
JPS6365258B2 (en) 1988-12-15

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