JPS5952858B2 - Station automatic bypass device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a station automatic bypass device, more specifically, a station automatic bypass device that is disposed in the middle of a data highway and selectively selects a transmission signal inputted on the highway and a data signal from a terminal device. The station automatic bypass device detects an abnormality in the station sending out to the output highway and automatically switches to the bypass line side.In particular, it not only automatically switches to the bypass line side in the event of a failure, but also automatically returns when repaired. This invention relates to a station automatic bypass device having the following functions.

The prior art will be explained with reference to FIGS. 1 to 3.

FIG. 1 is a diagram showing a general configuration of a data highway, FIG. 2 is a block diagram of a repeater section of a station, and FIG. 3 is a diagram showing a conventional example of an automatic bypass device. As shown in FIG.
) 3 to 7 are sequentially connected in a loop to transmit signals.The central station 2 is connected to a central processing unit (CPU) 8, and each RST is connected to terminal devices 9 to 13. are doing. FIG. 2 is a diagram showing the configuration of any one RST among R5T3-7 in FIG. 1. In FIG. 2, 21 is a signal acquisition circuit, 22 is a clock regeneration circuit, 23 and 24 are each a signal conversion circuit, 25 is a signal sending circuit, 26 is a logic circuit (in the case shown, there are a negation circuit, an OR circuit, and two This is an online/offline control circuit consisting of an AND circuit). Reference numeral 1 denotes a data highway transmission line, and an input signal a from the transmission line 1 is taken into a signal acquisition circuit 21 .

The signal' acquisition circuit 21 is composed of an isolation transformer, a waveform shaping circuit, and the like. The clock recovery circuit 22 uses this input signal a to generate a signal synchronization clock b. The internal configuration of the clock regeneration circuit 22 is generally a phase locked loop (Phase-Locked Loop).
circuit is used. The input signal a is sent to the signal conversion circuit 23
In synchronization with the signal synchronization clock b, the signals are converted into digital signals of logic levels "1" and "o" and taken into the RST. Also, output data d from the terminal device
is similarly synchronized with the signal synchronous clock b and output from inside the terminal device, combined with the signal synchronous clock b in the signal conversion circuit 24, and sent to the transmission line 1 by the signal sending circuit 25. In this case, if there is no request from the terminal device to put its output data on the transmission line 1, the online/offline control signal e causes the input signal a to pass through the RST and be output to the transmission line 1. Online/offline control circuit 26
controlled by. As mentioned above, the RST glue heater part is a part of the transmission line 1 of the highway, and since the data highway is a loop connecting many stations with the transmission line as shown in Figure 1, 1 If one RST fails, the entire system will go down.

In order to cope with this problem, a method has conventionally been adopted in which a faulty RST is automatically bypassed. The problem with the automatic bypass method is failure detection, and a conventional failure detection method will be explained with reference to FIG. In FIG. 3, 27 is a clock detection circuit provided at the final stage of the RST, specifically, the primary side of the isolation transformer provided in the signal sending circuit 25, and 28 is a clock detection circuit provided at the final stage of the RST, specifically, on the primary side of the isolation transformer provided in the signal sending circuit 25. This is a relay drive circuit that is driven when a down state is detected.

Reference numeral 29 denotes contacts of bypass relays provided on the input side and output side of the RST, which are switched and controlled by the relay drive circuit 28.

30 is a bypass line.

Automatic bypass is possible with the circuit shown in Figure 3.However, in the conventional circuit shown in Figure 3, if you try to strictly detect clock detection and detect frequency deviation,
Even if there is an abnormality in T, it will be judged as a failure of the own RST. Also, if you try to use a clock detection circuit that simply detects the presence or absence of a clock, the clock regeneration circuit 22 will run on its own even if there is no input. For this reason, even if there is a failure in the signal acquisition circuit 21 or the clock regeneration circuit 22, it is not possible to detect the failure. Furthermore, there were other inconveniences such as the system sometimes going down after a failure was detected.

The object of the present invention is to eliminate the above-mentioned disadvantages in conventional devices,
It is possible to detect not only clock down but also tarok frequency abnormalities, and even if the own station is judged to be abnormal due to an abnormality in the previous station and is bypassed, it can automatically return immediately if there is no abnormality in the own station.
That is, the object is to provide an automatic bypass device that does not cause the system to go down due to erroneous detection and being bypassed, or failure to detect an abnormality even though it occurs.

The present invention is characterized by a circuit that compares the waveforms of an input signal and an output signal, a circuit that detects a clock abnormality in the output signal,
A flip-flop which is set by the waveform match signal outputted from the waveform comparison circuit and set by the clock abnormality signal outputted from the clock abnormality detection circuit, and a flip-flop which is installed at the output end of the station and which is set by the clock abnormality signal outputted from the clock abnormality detection circuit. By being equipped with a bypass switching relay that is switched and controlled by the output of the station, it switches to the bypass side when a clock abnormality occurs, and automatically returns to the highway side when the station returns to normal and the output signal and input signal match. It is in the composition.

An embodiment of the present invention will be explained with reference to FIG.

In FIG. 4, 41 is a blocker abnormality detection circuit, 42 is a flip-flop with priority to reset, 43 is a bypass switching relay, 44 is a waveform comparison circuit, 45 is a gate circuit, and other symbols are shown in FIGS. 2 and 3. The same is true for . The clock abnormality detection circuit 41 monitors not only the presence or absence of the clock but also the synchronization, and outputs a clock abnormality signal f when an abnormality occurs. This clock abnormal signal f
The Q output of flip-flop 42 operates relay drive circuit 28 and switches bypass switching relay 43. 44 is a waveform comparison circuit, R
The waveforms of the input signal and output signal of ST are compared, and if they match, a match signal g is output.

Flip-flop 42 is set by the coincidence signal g if no Talia signal is present. In the above configuration, first of all, if the RST itself has some kind of failure, or if there is some kind of trouble in the previous stage RST, the input signal a
When the RST becomes abnormal, the output signal of the RST goes down or the frequency changes.

At this time, the clock abnormality detection circuit 41 detects an abnormality in the clock, outputs a clock abnormality signal f, and resets the flip-flop 42. Q of this flip-flop 42
The output switches the bypass switching relay 43 to the bypass side via the relay drive circuit 28, and at the same time drops the RST normal signal, forcing the RST to go offline. In this state, input signal a bypasses this RST,
At the same time as the signal is transmitted to the next RST, the signal is also transmitted within the own RST. As described above, there are two types of RST states at this time: when the own RST is in failure and when the preceding RST is in failure. The input waveforms of the waveform comparison circuit 44 are taken from one side immediately after the signal acquisition circuit 21 (this is referred to as comparison waveform A), and the other is taken from the input side of the signal sending circuit 25 (this is taken as comparison waveform B). Since the synchronized clock signal b is inserted between the two, the waveforms will not match if the own RST is in failure.

In other words, when the signal acquisition circuit 21 is out of order, the waveform A
is not output at all, and waveform B is a signal synchronized with the free-running frequency of the clock regeneration circuit 22. If the clock regeneration circuit 22 and subsequent circuits are malfunctioning, waveform A is completely normal.
This is because waveform B is not output or is output at some abnormal frequency. Therefore, in this case, the coincidence signal g is not output, and this RST remains bypassed. On the other hand, if the preceding stage RST is in failure, the preceding stage RST is bypassed as described above. The own RST is temporarily bypassed as the input signal a becomes abnormal, but the input signal is not disconnected and is in a remote state, so the input signal passes through, so the abnormal RST in the previous stage is bypassed and becomes normal. If a signal is input as input signal a, comparison waveforms A and B match, and the waveform comparison circuit 44 outputs a match signal g.
is output, whereby the flip-flop 42 is set and generates a Q output, and the generation of the Q output returns the bypass switching relay 43 from the bypass side to the normal side. As explained above, according to the present invention, it is possible to accurately detect the failure of a failed station, and a non-faulty station is not left bypassed, so that a failure of a station can cause the entire system to go down. The reliability of the data highway system is significantly reduced compared to conventional devices, and the reliability of the data highway system can be significantly improved.

[Brief explanation of the drawing]

Fig. 1 is a general configuration diagram of the data highway, Fig. 2 is a block diagram of the beam mode station glue heater section, Fig. 3 is a diagram showing a conventional example of an automatic bypass device, and Fig. 4 is a block diagram of an embodiment of the present invention. FIG. 1... Transmission line, 21... Signal acquisition circuit, 22... Clock regeneration circuit, 23, 2
4...Signal conversion circuit, 25...Signal sending circuit, 28...Relay drive circuit, 41...
... Clock abnormality detection circuit, 43 ... Bypass switching relay 44 ... Waveform comparison circuit, 3
0...Bypass line.

Claims (1)

[Claims] 1 Station automatic bypass device that is placed in the middle of a data highway and selectively sends the transmission signal coming in on the highway and the data signal from the terminal device to the output highway.It detects an abnormality in the station and switches to bypass. , a circuit that compares the waveforms of the input signal and the output signal, a circuit that detects a clock abnormality in the output signal, and a match signal output from the waveform comparison circuit, and is output from the clock abnormality detection circuit. It is equipped with a reset-priority flip-flop that is reset by a clock abnormality signal, and a bypass switching relay that is installed at the station output end and is switched and controlled by the output of the flip-flop, and switches to the bypass side when a clock abnormality occurs. An automatic station bypass device characterized in that the station is returned to the highway side when the station returns to normal and the output signal and input signal match.