JPS5950133U - signal selection circuit - Google Patents
signal selection circuitInfo
- Publication number
- JPS5950133U JPS5950133U JP14430982U JP14430982U JPS5950133U JP S5950133 U JPS5950133 U JP S5950133U JP 14430982 U JP14430982 U JP 14430982U JP 14430982 U JP14430982 U JP 14430982U JP S5950133 U JPS5950133 U JP S5950133U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- selection circuit
- signal selection
- circuit
- terminals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はテレビジョン受像機とＶＴＲを組合せＶＴＲを
再生する場合の接続状態を示す回路図、第２区は本考案
の基本回路を示す回路図、第３図は本考案を第１因の場
合に適用した接続状態を示す回路図である。
２１−０〜２１−ｎ・・・入力端子、２３−０〜２３−
ｎ・・・ゲート、２５・・・第１出力端子、２６・・・
第２出力端子、２７・・・スイッチ、２９−１〜２９−
ｎ・・・ダイオード、Ｓｏ〜Ｓｎ・・・選択スイッチ。Figure 1 is a circuit diagram showing the connection state when a television receiver and a VTR are combined to play a VTR, Section 2 is a circuit diagram showing the basic circuit of the present invention, and Figure 3 is a circuit diagram showing the basic circuit of the present invention. FIG. 3 is a circuit diagram showing a connection state applied to the case. 21-0 to 21-n...input terminals, 23-0 to 23-
n...gate, 25...first output terminal, 26...
Second output terminal, 27... switch, 29-1 to 29-
n...diode, So~Sn...selection switch.
Claims (1)
って、複数の入力信号端子と、そのうちの１つの端子に
印加される信号を選択するスイッチング回路と、少なく
とも２系統の出力端子を有し前記複数の入力信号のうち
特定の入力信号を選択した時にこの特定信号を前記出力
端子の１系統・−１導出することを禁止する制御回路と
を具備したことを特徴とする信号選択回路。A circuit that selects a required signal from a large number of input signals, and has a plurality of input signal terminals, a switching circuit that selects a signal to be applied to one of the terminals, and at least two systems of output terminals. A signal selection circuit comprising: a control circuit that prohibits, when a specific input signal is selected from the plurality of input signals, the specific signal from being derived from one system of the output terminals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14430982U JPS5950133U (en) | 1982-09-25 | 1982-09-25 | signal selection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14430982U JPS5950133U (en) | 1982-09-25 | 1982-09-25 | signal selection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5950133U true JPS5950133U (en) | 1984-04-03 |
Family
ID=30321843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14430982U Pending JPS5950133U (en) | 1982-09-25 | 1982-09-25 | signal selection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5950133U (en) |
-
1982
- 1982-09-25 JP JP14430982U patent/JPS5950133U/en active Pending
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