JPS5948429B2 - Arithmetic circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the configuration of a circuit that performs multiplication/division operations on a first signal whose variable is frequency and a second signal whose variable is voltage or current.

When multiplication or division is performed using an analog method, conventional methods include logarithmic conversion, direct multiplication and division using the physical properties of transistors, or methods of converting the signal into a pulse signal and performing multiplication and division by waveform manipulation. It has been used.

Methods using logarithmic conversion or direct multiplication/division have complicated circuit configurations;
There are problems such as the price tends to be high and adjustment is required.

Methods based on waveform conversion are often used in applications where high calculation speed is not required, but they have the disadvantage of a complicated circuit configuration.

The present invention has been made in view of this point, and an object of the present invention is to provide a multiplication/division circuit with a simple configuration and relatively high accuracy.

Examples will be explained below.

FIG. 1 shows a block diagram ram showing an embodiment of the present invention.
FIG. 2 is a waveform diagram for explaining the operation of the circuit of FIG. 1.

In FIG. 1, 1 is a first signal source, and the repetition frequency X of its output is a variable.

Further, 2 is a second signal source, and variable Y is the magnitude of voltage or current.

3 is a sawtooth wave voltage output, 30 is a timing control terminal, 31 is a slope control terminal, and 32 is an output terminal.

4 is an average value circuit, which obtains an output Z at its output terminal.

The first signal source 1 has a period T (=1/
X) generates a pulse signal.

The output obtained at the output terminal 32 of the sawtooth wave generation circuit 3 is:
It is reset to zero each time the signal applied to the timing control terminal 30 rises, and the voltage rises at a slope proportional to the signal Y applied to the slope control terminal 31 until the next rise.

Therefore, the peak of the signal at the output terminal 32 is expressed as vP and Y. Then, VP=KYT=.

However, K is a constant.

The average value circuit 4 averages the input signals to obtain an output Z.

The average value Z of the sawtooth wave shown in Figure 2 is Z=-VPT/TΣVp, and from the above equation, VP=K
Since it is given by Y/X, Z=KY/X (!: becomes.

However, 'Hani'=N/2, which is a constant.

As is clear from the above explanation, the output Z is a value obtained by multiplying a constant by Y and dividing by X (multiplying and dividing is realized.

FIG. 3 shows the sawtooth wave generation circuit 3 in the embodiment shown in FIG.
FIG. 3 is a diagram showing a more specific example.

In FIG. 3, 300 is a reset circuit, and when the signal applied to the timing control terminal 30 rises, the capacitor 300
This circuit discharges the charge of 01 and makes its terminal voltage zero.

The transistors 302 and 303 constitute a current mirror circuit, and when a current Y flows through the collector of the transistor 303, the collector current Y' of the transistor 302 becomes equal to Y.

Reference numeral 304 denotes a buffer amplifier with a gain of 1 formed by an operational amplifier.

When the reset circuit 300 is not in the reset state, the current flowing into the capacitor 301 is Y', so the terminal voltage of the capacitor 301, that is, the voltage at the output terminal 32 is Y'/
It rises at a slope of C.

However, C is the capacitance of the capacitor 301.

Therefore, the above explanation is similar to IY’ Therefore, the output Z of the average value circuit 4 becomes Z=2XC.

Also, since Y'=Y, Z=hM after all! : It can be seen that multiplication and division are performed.

The average value circuit 4 can be a low-pass filter consisting only of a resistor and a capacitor, or an active filter using an operational amplifier.

As described above, according to the present invention, a multiplication/division circuit can be constructed more easily than a combination of a simple sawtooth wave generation circuit and an average value circuit, and its practical value is extremely high.

Further, the sawtooth wave generating circuit charges the integrating capacitor with the output current of the current mirror circuit that generates an output current corresponding to the magnitude of the second signal, and charges one of the rising and falling edges of the first signal. (Thus, since the configuration is such that the charging of the integrating capacitor is reset, even if the pulse duty of the first signal fluctuates, the integration period can be given accurately corresponding to the period.
Moreover, with a simple configuration, it is possible to suppress the slope of the integral in accordance with the magnitude of the second signal, and therefore, there is a practical effect that highly accurate calculations are possible with a simple configuration.

[Brief explanation of drawings]

Fig. 1 is a circuit configuration diagram showing one embodiment of the present invention, Fig. 2 is a waveform diagram for explaining the operating principle of Fig. 1, and Fig. 3 is a circuit specifically showing the main parts of Fig. 1. FIG. In the figure, 1 and 2 are fourth and second signal sources, 3 is a sawtooth wave generation circuit, and 4 is an average value circuit. In addition, in the figures, the same reference numerals indicate the same parts.

Claims (1)

[Claims] 1 a first signal source that generates a first signal of varying frequency; a second signal source that generates a second signal of varying intensity; two transistors coupled to each other; A current mirror circuit in which the transistor current is suppressed in proportion to the magnitude of the second signal, and an output current corresponding to the one transistor current is generated from the other transistor, the output current of this current mirror circuit. The integral capacitor is charged by the differential output of the first signal, and the charge in the capacitor is discharged to the initial value at each rising edge or falling edge of the first signal. an arithmetic circuit comprising a reset circuit for restarting charging, and an average value circuit for averaging the sawtooth wave voltage output generated in the capacitor.