JPS5933521A - Power supply control circuit - Google Patents
Power supply control circuitInfo
- Publication number
- JPS5933521A JPS5933521A JP57142851A JP14285182A JPS5933521A JP S5933521 A JPS5933521 A JP S5933521A JP 57142851 A JP57142851 A JP 57142851A JP 14285182 A JP14285182 A JP 14285182A JP S5933521 A JPS5933521 A JP S5933521A
- Authority
- JP
- Japan
- Prior art keywords
- power
- power supply
- switch
- section
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Direct Current Feeding And Distribution (AREA)
Abstract
Description
【発明の詳細な説明】 本発明は端末装置における電源制御回路に関する。[Detailed description of the invention] The present invention relates to a power supply control circuit in a terminal device.
従来、端末装置の電源制御回路は電源スィッチが切られ
るとそのまま電源が切第１るか又はその時にＣＰＵに対
して割込みが発生する稈度のものであった。したがって
電源が切られた時ＣＰＵは、実質的にはメモリ上の止片
なデータの一部分をＣＭＯＳ などに退避する位の事
しかできず電源を特に費やすファイル（フロッピィディ
スク１磁気デイスク）等は電源が切られた時のままでお
シフアイル破壊等を発生する欠点があった。、本発明は
電源スィッチが切られた時にＣＰＵに割込みが入シ、か
つＣＰＵからの電源切断前・°町７５（出されるまでは
電源が切れないという機能を有する制御回路を設けると
とにより上記欠点を解決した電源制御回路を提供するも
のである。Conventionally, the power control circuit of a terminal device is such that when the power switch is turned off, the power is turned off immediately or an interrupt is generated to the CPU at that time. Therefore, when the power is turned off, the CPU can only save part of the data in the memory to CMOS, etc., and the files (floppy disk, 1 magnetic disk), etc. that require a lot of power cannot be saved from the power supply. There was a drawback that the file could be destroyed if it was left in the same state as when it was cut. , the present invention provides the above-mentioned control circuit by providing a control circuit which has a function that an interrupt is input to the CPU when the power switch is turned off, and the power is not turned off until the power is turned off from the CPU. The present invention provides a power supply control circuit that solves the drawbacks.
本発明は、上記欠点を電源スィッチが切られた時にＣＰ
Ｕに割込みが入りかつＣＰｔＪ７５・らの・電源が切断
されない制御回路を伺加することによυ解決した。The present invention solves the above-mentioned drawbacks when the CP is turned off when the power switch is turned off.
This problem was solved by adding a control circuit that does not cut off the power of CPtJ75 and others when an interrupt occurs in U.
次に本発明の実施例について図面を参照して目見間する
。。Next, embodiments of the present invention will be briefly described with reference to the drawings. .
第１図を参照すると、電源スィッチを含み電源スィッチ
が切られた時に割込みを発生させる主電テスイッチ部１
と一旦電源が入った後スイッチカニ入る副電源スイッチ
部２とＣＰＵからの電ｓｒ ９−１ 姉？許可により副
電源スイッチを切断する昂１１ ｉｔｉ源スイッチ制御
部３と、外部から供給される電源である外部電源ａと電
源スイツチ部により接続・切断される内部電源１）と電
源スィッチが切断さｔｌだ時に発生する電源切断割込信
号Ｃと、ＣＰＵから発生する電源切断許可信号ｄと副電
源スイッチ部のスイッチを制御する副電源スイッチ制御
信号ｅと、列部電源を内部電源に変換する電源変換部４
とを含む。Referring to FIG. 1, a main power switch unit 1 that includes a power switch and generates an interrupt when the power switch is turned off.
Once the power is turned on, the switch is turned on and the sub power switch part 2 and the power from the CPU are sent to the CPU.9-1 Sister? Upon permission, the sub power switch is disconnected from the power source switch control section 3, the external power source a, which is a power source supplied from the outside, and the internal power source 1), which is connected/disconnected by the power switch section, and the power switch is disconnected. power-off interrupt signal C generated when Part 4
including.
主電源スイッチ部は第２図−ａのように外部から接続・
切断可能なスイッチがあり、かつスイッチが切断された
時に電源切断割込信号を発生する構造になっている、ま
た副電源スイッチ部、副電源スイッチ制御部は、第２図
−すのように入力信号によシ内部のスイッチが接続・切
断可能な構造になっている。ただし副電源スイッチ部は
入力信号（副電源スイッチ制御信号）がオンのとき接続
され、入力（ｉ３号がオフのとき切断される。また、副
電源スイッチ制御部は入力信号（％源切断許可信号）が
オフのとき切断され、入力信号がオンのとき切断される
構造に表っている。The main power switch section is connected externally as shown in Figure 2-a.
There is a switch that can be disconnected, and the structure is such that a power-off interrupt signal is generated when the switch is disconnected.The sub-power switch section and sub-power switch control section have inputs as shown in Figure 2. The structure is such that an internal switch can connect and disconnect depending on the signal. However, the sub power switch control section is connected when the input signal (sub power switch control signal) is on, and is disconnected when the input (i3) is off. ) is disconnected when the input signal is off, and disconnected when the input signal is on.
次に電源スイッチオンからオフまでの各スイッチ（圧電
源スイッチ部、副電源スイッチ部、副電源スイッチ制御
部）の状態を第３図を参照して説明する。Next, the states of each switch (pressure power switch unit, sub power switch unit, sub power switch control unit) from power switch on to power switch off will be explained with reference to FIG.
第３図−ａは電源スイツチオン時の各スイッチの状態を
表わしたものである。％源オフであるから主電源スイッ
チ部は切断。壕だ内部電源がオフのため副電源スイッチ
制御部は接続であシ、副電源スイッチ部は切断となる。FIG. 3-a shows the states of each switch when the power is turned on. The main power switch section is disconnected because the % source is off. Since the power supply inside the trench is off, the sub power switch control section is not connected, and the sub power switch section is disconnected.
電源スィッチをオンＣ接続）にした場合が第３図−ｂで
ある。電源スィッチ（主電源スイッチ部）が接続（オン
）になると内部電源がオンになるので副電源スイッチ制
御仏号がオンになる。細雪漉。The case where the power switch is set to ON (C connection) is shown in FIG. 3-b. When the power switch (main power switch part) is connected (on), the internal power is turned on, and the sub power switch control signal is turned on. Thin snow strainer.
スイッチ部は入力信号（副電源スイッチ制御１＠号）が
オンになると接続される構造になっているため副電源ス
イッチ部も接続となる。Since the switch section is structured to be connected when the input signal (sub power switch control number 1@) is turned on, the sub power switch section is also connected.
次に電源スィッチをオフ（切断）にした場合が第３図−
〇である。電源スィッチ（主電源スイッチ部）が切断さ
れると主電源スイッチ部から凭：潰切断割込信号が発生
するが、他のスイッチの状態は変化せず内部電源はオン
のま壕となる。Figure 3 shows what happens when the power switch is turned off (disconnected).
It is 〇. When the power switch (main power switch section) is turned off, a power cut interrupt signal is generated from the main power switch section, but the state of the other switches does not change and the internal power remains on.
その後に電源切断許可信号がオンになった場合が第３図
−ｄである。電源切断許可信号がオンになると副電源ス
イッチ制御回路を１その構造からスイッチはオフとなる
。副ｔｆｉ、スイッチ制御回路が切断されると副電源ス
イッチ制御信号がオフになシ副電源スイッチ回路部が切
断される。副電源スイッチ回路部が切断されると内部電
源はオフになり電源が切断されたことになる。The case where the power cut permission signal is turned on after that is shown in FIG. 3-d. When the power cut permission signal is turned on, the sub power switch control circuit is turned off due to its structure. When the secondary TFI and switch control circuit are disconnected, the secondary power switch control signal is turned off and the secondary power switch circuit section is disconnected. When the sub power switch circuit section is disconnected, the internal power supply is turned off and the power supply is cut off.
本発明は９上説明Ｉ７たように飛、源制御回路を主電源
スイッチ回路部、副電源スイッチ回路部、副電源スイッ
チ制御回路部の構成にすることによ、り電源スイツチ切
断時ＣＰＵに電源切断割込信号を与え、電源切断割込信
号が出なければ内部電源を切断することができなくする
効果がある。。The present invention provides power to the CPU when the power switch is turned off by configuring the power source control circuit to include a main power switch circuit section, a sub power switch circuit section, and a sub power switch control circuit section as explained in I7 above. This has the effect of providing a disconnection interrupt signal and making it impossible to disconnect the internal power supply unless the power disconnection interrupt signal is generated. .
第１図は本発明の実施例をブロック図で示した回路図で
あり、第２図−ａは第１図に示した主電源スイッチ回路
部】のスイッチ状態図、紀２図−すは第１図に示した副
電源スイッチ部路部２及び細雪、源スイッチ制御回路部
３のスイッチ状態図である。第３図−ａ〜ｄは電源スイ
ッチオンからオフまでの名スイッチの状卯図である。
Ｚ ／ （２）
ａ ｂ
Ｌ ｚ 図
０− ｂＣ（１
舅 、３ ｍFig. 1 is a circuit diagram showing an embodiment of the present invention in the form of a block diagram, Fig. 2-a is a switch state diagram of the main power switch circuit section shown in Fig. 1, and Fig. FIG. 1 is a switch state diagram of the sub-power switch circuit section 2 and the main switch control circuit section 3 shown in FIG. Figures 3-a to 3-d are diagrams of the power switch from on to off. Z / (2) a b L z Figure 0- bC (1 leg, 3 m
Claims (1)
つＣＰＵからの電源切断許可信号がオンにならないと電
源が切れないことを％ｍとするＩｏ、源制御回路。When the power switch is turned off, %m indicates that the power will not be turned off unless the CPU receives an interrupt and the power-off permission signal from the CPU is turned on.Io is a power supply control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57142851A JPS5933521A (en) | 1982-08-18 | 1982-08-18 | Power supply control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57142851A JPS5933521A (en) | 1982-08-18 | 1982-08-18 | Power supply control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5933521A true JPS5933521A (en) | 1984-02-23 |
Family
ID=15325089
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57142851A Pending JPS5933521A (en) | 1982-08-18 | 1982-08-18 | Power supply control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5933521A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61163423A (en) * | 1985-01-14 | 1986-07-24 | Ricoh Co Ltd | Processing unit with backup power feeding for memory |
| JPS6242215A (en) * | 1985-08-20 | 1987-02-24 | Fujitsu Ltd | Remote power supply control system |
| JPS62134713A (en) * | 1985-12-09 | 1987-06-17 | Hitachi Constr Mach Co Ltd | Power source circuit for microcomputer device |
| JPS62177612A (en) * | 1986-01-30 | 1987-08-04 | Noritsu Co Ltd | Time limit holding circuit for power supply of microcomputer |
| JPS62138228U (en) * | 1986-02-20 | 1987-08-31 | ||
| EP0273322A2 (en) * | 1986-12-26 | 1988-07-06 | Kabushiki Kaisha Toshiba | A power supply with a built-in microcomputer for use in a computer system |
| WO1988006988A1 (en) * | 1987-03-12 | 1988-09-22 | Robert Bosch Gmbh | Circuit arrangement for switching off electronic systems |
| FR2660450A1 (en) * | 1990-03-30 | 1991-10-04 | Marelli Autronica Sa | Device for temporarily keeping a computer live and power supply installation for internal combustion engine applying same |
| US5339446A (en) * | 1986-12-26 | 1994-08-16 | Kabushiki Kaisha Toshiba | Power supply and method for use in a computer system to confirm a save operation of the computer system and to stop a supply of power to the computer system after confirmation |
-
1982
- 1982-08-18 JP JP57142851A patent/JPS5933521A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS61163423A (en) * | 1985-01-14 | 1986-07-24 | Ricoh Co Ltd | Processing unit with backup power feeding for memory |
| JPS6242215A (en) * | 1985-08-20 | 1987-02-24 | Fujitsu Ltd | Remote power supply control system |
| JPS62134713A (en) * | 1985-12-09 | 1987-06-17 | Hitachi Constr Mach Co Ltd | Power source circuit for microcomputer device |
| JPS62177612A (en) * | 1986-01-30 | 1987-08-04 | Noritsu Co Ltd | Time limit holding circuit for power supply of microcomputer |
| JPS62138228U (en) * | 1986-02-20 | 1987-08-31 | ||
| EP0273322A2 (en) * | 1986-12-26 | 1988-07-06 | Kabushiki Kaisha Toshiba | A power supply with a built-in microcomputer for use in a computer system |
| US5339446A (en) * | 1986-12-26 | 1994-08-16 | Kabushiki Kaisha Toshiba | Power supply and method for use in a computer system to confirm a save operation of the computer system and to stop a supply of power to the computer system after confirmation |
| WO1988006988A1 (en) * | 1987-03-12 | 1988-09-22 | Robert Bosch Gmbh | Circuit arrangement for switching off electronic systems |
| FR2660450A1 (en) * | 1990-03-30 | 1991-10-04 | Marelli Autronica Sa | Device for temporarily keeping a computer live and power supply installation for internal combustion engine applying same |
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