JPS59227147A - Mounting structure of large-scale integrated circuit - Google Patents
Mounting structure of large-scale integrated circuitInfo
- Publication number
- JPS59227147A JPS59227147A JP10319383A JP10319383A JPS59227147A JP S59227147 A JPS59227147 A JP S59227147A JP 10319383 A JP10319383 A JP 10319383A JP 10319383 A JP10319383 A JP 10319383A JP S59227147 A JPS59227147 A JP S59227147A
- Authority
- JP
- Japan
- Prior art keywords
- connector
- circuit board
- wiring board
- printed wiring
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K7/00—Constructional details common to different types of electric apparatus
- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/10—Plug-in assemblages of components, e.g. IC sockets
- H05K7/1053—Plug-in assemblages of components, e.g. IC sockets having interior leads
- H05K7/1076—Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by sliding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明は、電子機器のＬＳＩ（大規模集積回路）の実装
構造に関する。DETAILED DESCRIPTION OF THE INVENTION [Technical field to which the invention pertains] The present invention relates to a mounting structure of an LSI (Large Scale Integrated Circuit) of an electronic device.
従来のＬＳＩの実装構造は第１図および第２図に示すよ
うに、多層印刷配線板２の入出力信号ピン５を下側に位
置した状態で、その上面側に両接触方式の接触バネ１１
を内蔵する多極コネクタ１と、上記多層印刷配線板２の
下面側に矯正用のスチフナ１４とを、それぞれ取付ネジ
６と取付ナツト６′によって取付け、上記接触バネ１１
と上記多層印刷配線板２上の接続端子１３を接触させ、
さらに、複数個のＬＳＩ９を搭載した平板状回路基＃ｉ
ｉ８を、ヒートシンク１０が付いたホールドダウンリン
グ３と締付ネジ７によって、上記多極コネクタ１に取付
け、上記接触バネ１１と上記平板状回路基板８」二の接
続端子１２を接触させることによって、上記多層印刷配
線板２の上記接続端子１３と、上記平板状回路基板８の
上記接続端子１２とが上記多極コネクタ１の両接触方式
の上記接触ハネ１１によって電気的に接続されていた。As shown in FIGS. 1 and 2, the conventional LSI mounting structure is such that the input/output signal pins 5 of the multilayer printed wiring board 2 are located on the lower side, and the contact springs 11 of the double-contact type are placed on the upper surface of the multilayer printed wiring board 2.
A multi-pole connector 1 with a built-in connector 1 and a stiffener 14 for straightening are attached to the lower surface side of the multilayer printed wiring board 2 using mounting screws 6 and nuts 6', respectively, and the contact springs 11
and contact terminals 13 on the multilayer printed wiring board 2,
Furthermore, a flat circuit board #i equipped with a plurality of LSI9
By attaching the i8 to the multi-pole connector 1 using the hold down ring 3 with the heat sink 10 and the tightening screw 7, and bringing the contact spring 11 into contact with the connecting terminal 12 of the flat circuit board 8, The connection terminals 13 of the multilayer printed wiring board 2 and the connection terminals 12 of the flat circuit board 8 were electrically connected by the contact springs 11 of the double-contact type of the multipolar connector 1.
このような従来構造においては、上記多極コネクタ１お
よび上記平板状回路基板８を交換する場合に、煩雑なネ
ジの締付けによって接続する操作を行う必要があり、多
層印刷配線板あるいは平板状回路基板を簡単に交換し接
続することができず、さらに高密度に実装するために、
上記平板状回路基板８に搭載する上記ＬＳ１９の数を多
くすると、上記接続端子１２の数が増大し、上記多極コ
ネクタｌの上記接触バネ１１を紐条端子にする必要があ
る。In such a conventional structure, when replacing the multi-pole connector 1 and the flat circuit board 8, it is necessary to perform a complicated connection operation by tightening screws, and the multilayer printed wiring board or the flat circuit board 8 must be connected. cannot be easily replaced and connected, and in order to implement even higher density,
When the number of LSs 19 mounted on the flat circuit board 8 increases, the number of connection terminals 12 increases, and the contact springs 11 of the multipolar connector 1 must be made into string terminals.
このため、上記多極コネクタｌを大きくするだけでは構
造上の限界があり、実装密度を格別に大きくし、高密度
に実装することは不可能に近い。For this reason, there is a structural limit to simply increasing the size of the multi-pole connector l, and it is almost impossible to significantly increase the packaging density and implement high-density packaging.
本発明者は、実装の構造を変えることによっ′ζ、この
問題が解決することに着目し、本発明を完成するに至っ
た。The inventors of the present invention have focused on the fact that this problem can be solved by changing the mounting structure, and have completed the present invention.
本発明は、多層印刷配線板と、この多層印刷配線板に垂
直に配置されたＬＳＩを搭載した複数の平板状回路基板
とを、上記多層印刷配線板上の複数の多極コネクタを用
いて接続することによって、上記配線板あるいは回路基
板の交換または接続を簡単にし、さらにＬＳＩを高密度
に実装できるＬＳＩの実装構造を提供することを目的と
する。The present invention connects a multilayer printed wiring board and a plurality of flat circuit boards mounted with LSI arranged perpendicularly to the multilayer printed wiring board using a plurality of multipole connectors on the multilayer printed wiring board. By doing so, it is an object of the present invention to provide an LSI mounting structure that simplifies the replacement or connection of the wiring board or circuit board and also allows LSIs to be mounted at high density.
本発明は、多層印刷配線板の表面に平行に配列され取付
けられた多極コネクタと、ＬＳＩが搭載されこの多極コ
ネクタを介して上記多層印刷配線板に接続され上記多極
印刷配線板に対して垂直になるようにかつ互いに平行に
配置された複数の平板状回路基板と、この複数の平板状
回路基板の上記多極コネクタに接続された電極以外の電
極の少なくとも一部を相互に接続するフラットケーブル
付コネクタとを備えたことを特徴とする。The present invention provides a multi-pole connector arranged and attached in parallel to the surface of a multi-layer printed wiring board, and an LSI mounted thereon and connected to the multi-layer printed wiring board through the multi-pole connector. a plurality of flat circuit boards arranged perpendicularly and parallel to each other; and at least some of the electrodes of the plurality of flat circuit boards other than the electrodes connected to the multi-pole connector. It is characterized by being equipped with a connector with a flat cable.
次に本発明の一実施例を図面に基づい°Ｃ詳細に説明す
る。Next, one embodiment of the present invention will be described in detail based on the drawings.
第３図は本発明実施例構造の斜視図である。第４図は本
発明の実施例構造のＢＢ’断面図である。FIG. 3 is a perspective view of a structure according to an embodiment of the present invention. FIG. 4 is a BB' cross-sectional view of the embodiment structure of the present invention.
本実施例構造は、多層印刷配線板２の上面側に、２つの
接触バネ２３および２４を内蔵する多極コネクタ５１お
よび５１′ を配置する。次に、複数個のＬＳＩ９を搭
載した平板状回路基板８を、この多層印刷配線板２に対
して垂直に配置するように上記多極コネクタ５１に挿入
して、平板状回路基板８の上面側の接続端子１３と下面
側の接続端子１２とを、上記多極コネクタ５１の２つの
上記接触バネ２３．２４をもって接続する。In the structure of this embodiment, multipolar connectors 51 and 51' having two contact springs 23 and 24 built in are arranged on the upper surface side of the multilayer printed wiring board 2. Next, the flat circuit board 8 on which a plurality of LSIs 9 are mounted is inserted into the multi-pole connector 51 so as to be arranged perpendicularly to the multilayer printed wiring board 2, and the upper surface of the flat circuit board 8 is The connecting terminal 13 and the connecting terminal 12 on the lower side are connected using the two contact springs 23 and 24 of the multipolar connector 51.
同様に、複数個のＬＳＩ９’を搭載した平板状回路基板
８′をこの多層印刷配線板２と垂直に、かつ上記平板状
回路基板８と対向するように多極コネクタ５１’に挿入
して、平板状回路基板８′の上面側の接続端子１３’
と下面側の接続端子１２′ とを、多極コネクタ５１’
の２つの接触バネ２３’２４’をもって接続する。複数
個の上記ＬＳＩ９．９′を搭載した上記平板状回路基板
８．８′の各々の背面には直接ヒートシンク１０．１０
′ がけりられていて、このヒートシンク１０．１０’
が互いに反対に位置するように、上記平板状回路基板８
．８′の一端を上記多層印刷配線板２と垂直に配置すよ
うに上記多極コネクタ５１．５１′ と接続する。Similarly, a flat circuit board 8' carrying a plurality of LSIs 9' is inserted into the multipolar connector 51' perpendicularly to the multilayer printed wiring board 2 and facing the flat circuit board 8. Connection terminal 13' on the top side of the flat circuit board 8'
and the connection terminal 12' on the bottom side, and the multi-pole connector 51'.
The two contact springs 23' and 24' are used for connection. A heat sink 10.10 is installed directly on the back of each of the flat circuit boards 8.8' on which a plurality of LSIs 9.9' are mounted.
' is cut out and this heat sink 10.10'
the flat circuit board 8 so that they are located opposite to each other.
．． One end of the connector 8' is connected to the multipolar connector 51, 51' so as to be disposed perpendicularly to the multilayer printed wiring board 2.
上記平板状回路基板８の上端には、フラットケーブル付
コネクタ４１を挿入して、上記平板状回路基板８の上面
側の接続端子４３と下面側の接続端子４２とがフラット
ケーブル付コネクタ４１の２つの接触バネ２１および２
２と接続する。同様に、上記平板状回路基板８′におい
ても、その上端には、上記フラットケーブル付コネクタ
４１’を挿入して、上記平板状回路基板８′の上面側の
接続端子４３′ と下面側の接続端子４２′ とが上記
フラットケーブル付コネクタ４１′の２つの接触バネ２
１’および２２′と接続する。これによって、上記多層
印刷配線板２上に実装された上記平板状回路基板８．８
′を上記フラットケーブル付コネクタ４１．４１’ に
よって同時に接続することが可能となり、上記平板状回
路基板８．８′を上記多層印刷配線板２と垂直に上記多
極コネクタ５１．５１’ と上記フラットケーブル４に
よって１ブロツクとして接続することができる。A connector with a flat cable 41 is inserted into the upper end of the flat circuit board 8, and the connection terminal 43 on the top side of the flat circuit board 8 and the connection terminal 42 on the bottom side are connected to two of the connectors with flat cables 41. two contact springs 21 and 2
Connect with 2. Similarly, the flat cable connector 41' is inserted into the upper end of the flat circuit board 8', and the connecting terminal 43' on the upper surface side of the flat circuit board 8' is connected to the connecting terminal 43' on the lower surface side. The terminal 42' is connected to the two contact springs 2 of the flat cable connector 41'.
1' and 22'. As a result, the flat circuit board 8.8 mounted on the multilayer printed wiring board 2
' can be connected at the same time by the flat cable connector 41.41', and the flat circuit board 8.8' can be connected perpendicularly to the multilayer printed wiring board 2 with the multipolar connector 51.51' and the flat They can be connected as one block by cable 4.
同様に、別の平板状回路基板８．８′を多極コネクタ５
１および５１′に接続し、かつ平板状回路基板８および
８′をフランＩ・ケーブル４によって接続することで上
記多層印刷配線板２と別の１つのブロックとして垂直に
配置することが可能となる。Similarly, another flat circuit board 8.8' is connected to the multi-pole connector 5.
1 and 51', and by connecting the flat circuit boards 8 and 8' with the Fran I cable 4, it becomes possible to arrange them vertically as a separate block from the multilayer printed wiring board 2. .
従って、このよ、うなブロック実装構造を、上記多層印
刷配線板２上にいくつかのブロックを作ることが可能に
なる。この実装構造によって、平板状回路基板およびフ
ラットケーブルの交換は、第１図および第２図に示した
従来方式に比べて、煩雑なネジの締付けが全くないため
に、きわめて簡単に交換、接続することが可能となり、
作業性が非常に良くなる。Therefore, it becomes possible to create several blocks on the multilayer printed wiring board 2 with such a block mounting structure. With this mounting structure, flat circuit boards and flat cables can be replaced and connected extremely easily, as there is no need to tighten any complicated screws, compared to the conventional method shown in Figures 1 and 2. It becomes possible to
Workability is greatly improved.
この実装構造は、第１図および第２図に示したような平
板状回路基板を多層印刷配線板に平面実装していた従来
方式に比べて、複数の平板状の回路基板を多層印刷配線
板に垂直に立体的な３次元実装することが可能となり、
高密度にＬＳＩを実装できる。また、第１図および第２
図に示したような従来構造の場合には、平板状回路基板
に搭載するＬＳＩの数を多くすることは接続端子の数を
多くする必要が生じ、さらに多極コネクタの接触バネを
紐条端子にする必要が生じるために、現実的には限界が
あり不可能であワたが、本発明の実装構造によって、平
板状回路基板の接続端子を、平板状回路基板の上面側と
下面側の両面に設げることが可能となるために、従来構
造に比べて接続端子が多くなり、搭載するＬＳＩの数を
多くすることが可能となり、高密度にＬＳＩを実装でき
る。This mounting structure allows multiple flat circuit boards to be mounted on a multilayer printed wiring board, compared to the conventional method in which flat circuit boards are mounted on a multilayer printed wiring board as shown in Figures 1 and 2. It becomes possible to implement three-dimensional three-dimensional mounting perpendicular to the
LSI can be mounted in high density. Also, Figures 1 and 2
In the case of the conventional structure shown in the figure, increasing the number of LSIs mounted on a flat circuit board requires increasing the number of connection terminals, and furthermore, the contact springs of the multi-pole connector are connected to the string terminals. However, with the mounting structure of the present invention, the connection terminals of the flat circuit board can be connected to the upper and lower sides of the flat circuit board. Since it is possible to provide them on both sides, there are more connection terminals than in the conventional structure, and it is possible to increase the number of LSIs to be mounted, allowing for high-density mounting of LSIs.
この実装構造によって、第１図および第２図に示したよ
うな高価格である再接触方式の接触ハネを内蔵する多極
コネクタの代わりに、一般的な２つの接触バネを内蔵す
る多極コネクタおよびフラットケーブル付コネクタを使
用することが可能となり安価になる。また、この実装構
造によって、第１図および第２図に示した付加荷重によ
る多層印刷配線板の変形（そり）を防止する矯正用のス
チフナ１４などは削除することができる。With this mounting structure, instead of the high-priced multi-pole connector with built-in re-contact type contact springs as shown in Figs. 1 and 2, a multi-pole connector with built-in two contact springs can Also, it becomes possible to use a connector with a flat cable, resulting in lower cost. Further, with this mounting structure, it is possible to eliminate the straightening stiffener 14 for preventing deformation (warping) of the multilayer printed wiring board due to the added load shown in FIGS. 1 and 2.
〔発明の効果］
本発明は、以上に説明したように、複数の平板状回路基
板を多層印刷配線板に垂直に立体的な３次元実装し、か
つ一対の平板状回路基板をフラットケーブルにより接続
することによって、平板状回路基板およびフラットケー
ブルを非常に簡単に交換、接続することができ、さらに
ＬＳＩを高密度に実装できる優れた効果がある。[Effects of the Invention] As explained above, the present invention provides three-dimensional three-dimensional mounting of a plurality of flat circuit boards perpendicularly to a multilayer printed wiring board, and connects a pair of flat circuit boards with a flat cable. By doing so, the flat circuit board and the flat cable can be exchanged and connected very easily, and furthermore, there is an excellent effect that LSI can be mounted at high density.
第１図は従来のＬＳＩの接続構造を示す斜視図。
第２図は第１図に示したＡＡ’断面図。
第３図は本発明の実施例構造の斜視図。
第４図は本発明の実施例のＢＢ’断面図。
ｌ、５１．５１’・・・多極コネクタ、２・・・多層印
刷配線板、３・・・ホールドダウンリング、４．４′・
・・フラットケーブル、５・・・入出力信号用ピン、６
・・・取付はネジ、６′・・・取付はナツト、７・・・
締付はネジ、８．８′・・・平板状回路基板、９．９′
・・・ＬＳＩ、１Ｏ１１０’ ・・・ヒートシンク、１
１．２Ｌ ２１’ ２２．２２′ 、詔、２３’ 、２
４．２４’ ・・・接触ハネ、１２．１２’ １３．１
３’・・・接続端子、１４・・・スチフナ、４１．４１
’・・・フラットケーブル付コネクタ。
特許出願人 日本電気株式会社
代理人 弁理士 井 出 直 孝
第３図
第４図FIG. 1 is a perspective view showing a conventional LSI connection structure. FIG. 2 is a sectional view along line AA' shown in FIG. 1. FIG. 3 is a perspective view of a structure according to an embodiment of the present invention. FIG. 4 is a BB' sectional view of the embodiment of the present invention. l, 51.51'...Multi-pole connector, 2...Multilayer printed wiring board, 3...Hold down ring, 4.4'.
...Flat cable, 5...I/O signal pin, 6
...Mounting with screws, 6'...Mounting with nuts, 7...
Tighten with screws, 8.8'...Flat circuit board, 9.9'
・・・LSI, 1O110' ・・・Heat sink, 1
1.2L 21'22.22', imperial edict, 23', 2
4.24'...Contact spring, 12.12' 13.1
3'... Connection terminal, 14... Stiffener, 41.41
'...Connector with flat cable. Patent Applicant NEC Corporation Representative Patent Attorney Naotaka Ide Figure 3 Figure 4
Claims (1)
付られた多極コネクタ（５１）と、ＬＳＩが搭載されこ
の多極コネクタを介して上記多層印刷配ＩｊＩＦｉに接
続され上記多層印刷配線板に対して垂直になるようにか
つ互いに平行に配置された複数の平板状回路基板（８）
と、この複数の平板状回路基板の上記多極コネクタに接
続された電極以外の電極の少なくとも一部を相互に接続
するフラットケーブル付コネクタ（４１）と を備えたＬＳＩの実装構造。[Claims] (11) A multi-pole connector (51) arranged and attached in parallel to the surface of the multi-layer printed wiring board (2), and an LSI mounted thereon and connected to the multi-layer printed circuit IjIFi via this multi-pole connector. a plurality of flat circuit boards (8) connected and arranged perpendicularly to the multilayer printed wiring board and parallel to each other;
and a connector with a flat cable (41) for interconnecting at least some of the electrodes other than the electrodes connected to the multi-pole connector of the plurality of flat circuit boards.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10319383A JPS59227147A (en) | 1983-06-08 | 1983-06-08 | Mounting structure of large-scale integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10319383A JPS59227147A (en) | 1983-06-08 | 1983-06-08 | Mounting structure of large-scale integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS59227147A true JPS59227147A (en) | 1984-12-20 |
Family
ID=14347675
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10319383A Pending JPS59227147A (en) | 1983-06-08 | 1983-06-08 | Mounting structure of large-scale integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59227147A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5006925A (en) * | 1989-11-22 | 1991-04-09 | International Business Machines Corporation | Three dimensional microelectric packaging |
| US5191404A (en) * | 1989-12-20 | 1993-03-02 | Digital Equipment Corporation | High density memory array packaging |
-
1983
- 1983-06-08 JP JP10319383A patent/JPS59227147A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5006925A (en) * | 1989-11-22 | 1991-04-09 | International Business Machines Corporation | Three dimensional microelectric packaging |
| US5191404A (en) * | 1989-12-20 | 1993-03-02 | Digital Equipment Corporation | High density memory array packaging |
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