JPS5922425A - Transversal equalizer - Google Patents
Transversal equalizerInfo
- Publication number
- JPS5922425A JPS5922425A JP13129282A JP13129282A JPS5922425A JP S5922425 A JPS5922425 A JP S5922425A JP 13129282 A JP13129282 A JP 13129282A JP 13129282 A JP13129282 A JP 13129282A JP S5922425 A JPS5922425 A JP S5922425A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- delay
- differential amplifier
- delay element
- equalizer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/16—Networks for phase shifting
- H03H11/18—Two-port phase shifters providing a predetermined phase shift, e.g. "all-pass" filters
Landscapes
- Filters That Use Time-Delay Elements (AREA)
Abstract
Description
【発明の詳細な説明】
本発明はＬＳＩ化に適したトランスバーサル形等化器に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transversal equalizer suitable for LSI integration.
トランスパーサル形等化器による波形ひずみの等化原理
は古くから知られておシ、高速データ伝送においてすぐ
れた等化効果を発揮している。しかし、クロック周波数
の低い領域では信号処理技術の進歩とデバイスの進歩に
ょシＬｓ工化はかなシ進んでいるが、クロック周波数が
数ＭＨｚ 以上ではトランスバーサル等化器の主要な構
成要素である遅延素子を小形にすることができずＬＳＩ
化は実現していない。The principle of waveform distortion equalization using a transpersal equalizer has been known for a long time, and has demonstrated excellent equalization effects in high-speed data transmission. However, in the region of low clock frequencies, advances in signal processing technology and advances in devices have made rapid progress in Ls engineering, but at clock frequencies of several MHz or higher, the delay, which is the main component of a transversal equalizer, Unable to make elements small, LSI
has not been realized.
本発明は遅延素子として遅延量を有する増幅器を用いる
ことを特徴とし、その目的はＬＳＩ化に適した遅延素子
を提供し、それによってトランスバーサル等化器の小形
化と後述する高性能化を達成することにある。The present invention is characterized by using an amplifier having a delay amount as a delay element, and its purpose is to provide a delay element suitable for LSI implementation, thereby achieving miniaturization of a transversal equalizer and improved performance as described below. It's about doing.
第１図に本発明のトランスバーサル形等化器の実施例の
構成図を示す。FIG. 1 shows a block diagram of an embodiment of a transversal equalizer according to the present invention.
１は信号入力端子、２は遅延回路、３は重み付は回路、
４は合成回路、５は識別器、６は制御回路、７は信号出
力端子である。1 is a signal input terminal, 2 is a delay circuit, 3 is a weighting circuit,
4 is a synthesis circuit, 5 is a discriminator, 6 is a control circuit, and 7 is a signal output terminal.
従来この種のトランスバーサル等化器における遅延回路
には、第２図に示すようなケーブルや、あるいはインダ
クタンスやキャパシタンスからなる遅延回路たとえば第
３図に示すような２次全通過形回路が一般に用いられた
。Conventionally, the delay circuit in this type of transversal equalizer generally uses a cable as shown in Figure 2, or a delay circuit consisting of inductance and capacitance, such as a second-order all-pass circuit as shown in Figure 3. It was done.
しかし、これらの遅延回路をＬＳＩ化することは極めて
困難であったうえ、遅延時間の微調整をすることなども
困難であり、広帯域な周波数特性を得ることも難しかっ
た。However, it has been extremely difficult to incorporate these delay circuits into LSIs, it has also been difficult to finely adjust the delay time, and it has also been difficult to obtain wideband frequency characteristics.
第１図に示す本発明の実施例の遅延回路２は第４図に示
す差動形直流増幅器によって構成され、同図に示す差動
形直流増幅器は、直流から数ＧＨｚまで広帯域な周波数
特性を有しており、かつ遅延量も周波数に関してほぼ一
定の値を有し、広帯域な遅延素子として使用することが
できる。The delay circuit 2 according to the embodiment of the present invention shown in FIG. 1 is constituted by the differential DC amplifier shown in FIG. In addition, the amount of delay has a substantially constant value with respect to frequency, and can be used as a wideband delay element.
またその遅延量は増幅器の直流入力バイアス値や回路定
数等を可変することによシ微調整が可能であシ、利得に
対する遅延量の特性は、例えば第５図に示すごとくなシ
、すぐれた遅延素子として使うことができる。さらに、
増幅器であるため回路損失も自由に補うこともできる０
近年、素子製造技術、ＬＳＩ技術の進歩も急速に進んで
おシ、直流から数ＧＨｚまでの直流増幅器をシリコンチ
ップ上に形成することも可能となシ、従来小形化の遅れ
ていたトランスパーサル形等化器を本発明によシ、シリ
コン基板を用いた１チツプ化も可能となる。Furthermore, the amount of delay can be finely adjusted by varying the DC input bias value and circuit constants of the amplifier, and the characteristics of the amount of delay relative to the gain are excellent, as shown in Figure 5, for example. It can be used as a delay element. moreover,
Since it is an amplifier, you can also compensate for circuit loss freely.
In recent years, advances in device manufacturing technology and LSI technology have progressed rapidly, and it is now possible to form DC amplifiers from DC to several GHz on silicon chips, making it possible to create transversal technology, which has traditionally been slow to miniaturize. According to the present invention, the shape equalizer can be integrated into a single chip using a silicon substrate.
なお上記の実施例では、遅延回路２として直流差動増幅
器を用いたが、本発明の遅延素子に用いる増幅器は直流
差動増幅器に限定するものではない。In the above embodiment, a DC differential amplifier is used as the delay circuit 2, but the amplifier used in the delay element of the present invention is not limited to a DC differential amplifier.
従って、このような増幅器を遅延素子として用いる本発
明によれば、トランスバーサル等化器のＬＳＩ化が可能
となり、加えて増幅器の優れた周波数特性、微調整の可
能な優れた遅延特性や損失補償機能等によシ優れた性能
を有するトランスバーサル等化器が得られる。Therefore, according to the present invention, which uses such an amplifier as a delay element, it is possible to implement a transversal equalizer into an LSI, and in addition, the amplifier has excellent frequency characteristics, finely adjustable delay characteristics, and loss compensation. A transversal equalizer having excellent performance in terms of functions etc. can be obtained.
第１図は、本発明のトランスバーサル形等化器の実施例
の構成を示す図。
第２図は、ケーブルを用いた遅延回路を示す図。
第３図は、橋絡Ｔ形２次全通過形回路を示す図０
第４図は、本発明の遅延素子として用いる差動形直流増
幅器の回路構成を示す図。
第５図は、第４図の回路構成における利得と遅延量との
関係を示す図。
１・・・・・・・・・信号入力端子、２・・・・・・・
・・遅延回路、３・・・・・・・・・重み付は回路、４
・・・・・・・・・合成回路、５・・聞・・・識別器、
６・・・・・・・・・制御回路、７・・・・・・・・・
信号出力端子、ＩＮ・・・・・・・・・信号入力端、Ｏ
ＵＴ・・・・・・・・・信号出力端、Ｃ・・・・・・・
・・キャパシタンス、Ｌ・曲回インダクタンス、■ｃｃ
・・・・・・・・・直流電源入力端子、Ｒ１゜Ｒ２・・
・・・・・・・負荷抵抗器、Ｒｓ ＋ Ｒ４＋ Ｒｓ
ｅ Ｒｅ・・・・・・・・・バイアス抵抗器
代理人 弁理士 本 間 崇＃； １ 図
第 ２ 図
第 ３ 図
埠４図
第 ５ 図
刹 将FIG. 1 is a diagram showing the configuration of an embodiment of a transversal equalizer according to the present invention. FIG. 2 is a diagram showing a delay circuit using a cable. FIG. 3 shows a bridged T-type secondary all-pass circuit. FIG. 4 shows a circuit configuration of a differential DC amplifier used as a delay element of the present invention. FIG. 5 is a diagram showing the relationship between gain and delay amount in the circuit configuration of FIG. 4. １・・・・・・・・・Signal input terminal, ２・・・・・・・・・
...Delay circuit, 3...... Weighting circuit, 4
...... Synthesis circuit, 5... Discriminator,
6・・・・・・・・・Control circuit, 7・・・・・・・・・
Signal output terminal, IN...Signal input terminal, O
UT・・・・・・Signal output terminal, C・・・・・・
・・Capacitance, L・Turning inductance, ■cc
......DC power supply input terminal, R1゜R2...
...Load resistor, Rs + R4 + Rs
e Re・・・・・・Bias resistor agent Patent attorney Takashi Honma #; 1 Figure 2 Figure 3 Figure 4 Figure 5 General
Claims (1)
トランスバーサル等化器。(1) A transversal equalizer characterized by using an amplifier as a delay element.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13129282A JPS5922425A (en) | 1982-07-29 | 1982-07-29 | Transversal equalizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13129282A JPS5922425A (en) | 1982-07-29 | 1982-07-29 | Transversal equalizer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5922425A true JPS5922425A (en) | 1984-02-04 |
Family
ID=15054549
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13129282A Pending JPS5922425A (en) | 1982-07-29 | 1982-07-29 | Transversal equalizer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5922425A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4733398A (en) * | 1985-09-30 | 1988-03-22 | Kabushiki Kaisha Tohsiba | Apparatus for stabilizing the optical output power of a semiconductor laser |
-
1982
- 1982-07-29 JP JP13129282A patent/JPS5922425A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4733398A (en) * | 1985-09-30 | 1988-03-22 | Kabushiki Kaisha Tohsiba | Apparatus for stabilizing the optical output power of a semiconductor laser |
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