JPS59216176A - Bus operation information apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] The present invention relates to a method for accurately displaying the scheduled bus operating time at the bus stop after receiving a signal from the bus.
It is something that

The operation status of route buses and the like is affected by road conditions and other factors, and K often cannot always operate according to the scheduled timetable. Therefore, passengers waiting for a bus at a bus stop may not realize that the bus they are waiting for has passed earlier than the scheduled time, so they may continue to wait and be left waiting.

The present invention has been made in view of the above points.

Receive signals from the bus at each stop.

The purpose is to display the scheduled time for each destination.

An embodiment of the present invention will be described below with reference to one drawing.

The bus driver etc. can use the transmitter device (16
By turning on switch 1, an identification signal corresponding to the preset bus destination is activated by the oscillation circuit a.
It is generated through its control circuit (19).

The identification signal is composed of a combination of a plurality of tones in order to prevent the device from malfunctioning due to urban noise. After modulating a predetermined carrier wave with the identification signal, it is emitted as a weak radio wave through a modulation and transmission circuit (I8) so that it is detected by only one stop when the bus approaches the stops. I did it like that.

As shown in FIG. 1, when the A-line bus (3) approaches the stop K (1), the stop detects the signal from the transmitter (I6) with the receiver (15) and firstly the signal identification circuit (10). )to go into. The output signal of this signal identification circuit α0) is
111Y is entered into the counter 03) divided by one line ahead, and in this case, the counter (13) of the A line is incremented by 1. Next, the CPU old) sends an information call signal corresponding to the counter number to Memo +1 (141. Memo 'J (+4
1 is for each destination as shown in Figure 4, in this case A, B,
For each C, the scheduled time of the day is stored corresponding to the address. The CPU (Il+) calls in the scheduled time corresponding to each destination and the counter number, and displays the scheduled time 'f!: of the next bus on the digital display (12) made of liquid crystal etc. Stop (1) is the 3rd bus stop. As shown in the figure, there is a normally used timetable (20) at the bottom, and a digital display section 021 showing the scheduled time is provided at the top.

The signal flow according to the present invention will be explained in detail with reference to the flowchart shown in FIG.

A bus signal is received at the stop, and a signal identified by a signal identification circuit is used to determine whether or not it is the first bus. In this case, the first train is A''' line at 6:30 AM, so 'A''' line +17)*M6:+.

As the minutes pass, the power to the liquid crystal display turns off.
N is given. This is to keep the display unit powered off from the last bus to the first bus in order to save power. Next, the signal is incremented by 1 to a separate counter 03) depending on whether it is A, B or C, and is arranged in advance according to the counter number. The scheduled time is called and displayed on the display. Furthermore, when the counter reaches the END number of line A, which is the latest, the bus is the last bus, and the power to the display section is turned off until the first bus.

Since the present invention is as described above, the following effects are also produced.

By displaying the next scheduled time for each destination, passengers can accurately know the scheduled time and can avoid the inconvenience of having to wait for a bus that has already left. Wear.

[Brief explanation of drawings]

Figure 1 is a schematic diagram showing where the bus approaches the stop.
Figure 2 is a block diagram of the bus and equipment inside the stop, Figure 6 is an explanatory diagram of the display at the stop, Figure 4 is an explanatory diagram of a timetable stored in the ROM, and Figure 5 is inside the stop. Flowchart diagram showing the signal flow. (1)...K stop (2)...Bus transmission device (3)...Bus α0)...Signal identification circuit)...CPU (121...Indicator 0
3)...Counter 041...Memory (151
... Receiving section (16) ... Transmitting device (1,7
]...Transmission circuit (I8)...Modulation and transmission circuit (19)...Control circuit Patent applicant Kazuo Suzuki, Representative of Toppan Printing Co., Ltd.

Claims (1)

[Scope of Claims] The bus is provided with a transmitting means for emitting radio waves modulated by an identification signal indicating the destination of the bus, and receiving means for receiving the radio waves emitted from the bus on the bus stop side; The received signals are counted and the time corresponding to the count number is recalled from the scheduled time stored in the memory. It consists of a calling means and a display means for displaying the called time on a display. Bus service information device.