JPS59200345A - Microprogram control system - Google Patents

Abstract

PURPOSE:To reduce the control storage and to facilitate the interchangeability among systems by executing a software instruction through using both the execution using a microprogram and the execution of a microprogram using an instruction program. CONSTITUTION:A main memory 1 stores a software program 11 including the 1st type software instruction group and the 2nd type software instruction group and an instruction program 12 in which each instruction of the 2nd type software instruction group is formed with the 1st type software instruction group. When the 1st type software instruction is read out of the memory 1, this instruction is executed by the microprograms stored in the memory 1 and a control memory 31. When the 2nd type software instruction is read out of the memory 1, the execution of the program 12 is started. Then a microprogram is started when the execution is completed with the program 12.

Description

[Detailed description of the invention] Technical field to which the invention belongs The present invention relates to a microprogram control system.

BACKGROUND OF THE INVENTION In addition to storing micrologs in control memory, microprograms can be stored in main memory and the microprograms can be directly executed or stored in specific areas of control memory for each required function. Conventionally, a method has been used in which a microb qgram is executed on a control memory by importing it into an arbitrary area using a cache method.

In such conventional devices, with the aim of speeding up processing, as storage elements become faster and processing becomes more complex and large-scale, many functions are executed in one step of the microinstructions that make up the microprogram. However, in an effort to improve parallelism, the use of so-called horizontal micro-instructions, or bit-structured bit configurations, is becoming more prominent, especially for basic arithmetic instructions that are frequently used.

The features of the horizontal microinstructions described above are fully utilized to reduce the number of microinstructions required to execute software instructions. This is extremely effective in reducing software instruction execution time.

However, many other instructions, such as list processing instructions and various control instructions that repeatedly handle data on the main memory, often involve sequential processing. When highly horizontal microinstructions are used for such functions, each microinstruction uses only some of its constituent bits at a time, leaving the remaining 9 bits unused. This is a so-called vertical type microinstruction usage. This has the disadvantage that main memory and control memory for storing microinstructions are wasted.

OBJECTS OF THE INVENTION An object of the present invention is to provide a microprogram control system that eliminates the drawbacks of conventional devices and greatly reduces waste in main memory, control memory, etc. for storing microinstructions.

In addition, in order to make it possible to run the same software, it is possible to run the same software from small to large based on one architecture (specification).
So-called series development, which involves the development of even ultra-large-scale products, is taking place, and efforts are also being made to convert various software functions into 7-armware systems in order to improve system performance. However, the 7-armwear system, which is effective in improving performance on small and medium-sized aircraft, does not necessarily have the same effect on large and ultra-large aircraft. In fact, it is often the case that the effect is less than that of basic arithmetic instructions or that there is no effect at all. However, for software compatibility, it is unavoidable to implement the corresponding functions in 7 armware, and therefore, from the above-mentioned viewpoint, firmware is implemented using software instructions. By doing so, designing using vertical software instructions can take less design time per function than designing using highly horizontal microinstructions. Along with this, when using 7 armware, which makes it difficult to guarantee compatibility between systems, it is necessary to develop the corresponding firmware for each system individually, but according to the software instructions, compatibility between systems is not guaranteed. This also makes it possible to significantly improve the efficiency of development and design man-hours.

Another object of the present invention is to eliminate the shortcomings in development and design man-hours due to only 7 armware instructions as described above, and to improve the performance of small and medium-sized machines by implementing firmware based on software instructions based on system performance. The purpose of this project is to provide a microprogram control method that makes it possible to increase the efficiency of development man-hours for large and ultra-large machines based on an architecture that improves performance.

Structure of the Invention The method of the present invention provides a data processing device controlled by a microprogram stored in at least one of a control memory and a main memory, which includes a first type of software instruction group and a second type of software instruction group. a software program that includes at least a part of the function of each instruction of the second type of software instruction group;
an instruction program constituted by a first type of software instruction group is stored in a main memory, and when the software instruction read from the main memory belongs to the first type of software instruction group, at least the control memory and the main memory are stored. Execution of the instruction is controlled by the microprogram stored in the main memory, and if the software instruction read from the main memory belongs to a second type of software instruction group, at least part of the instruction is controlled by the microprogram stored in the main memory. In this method, execution of the instruction program corresponding to the instruction program is started at the time of execution, and when the execution of the instruction program is finished, the microprogram is restarted to execute a software instruction for returning control to the microprogram.

Examples of the invention Next, the present invention will be explained in detail with reference to the drawings.

As mentioned above, software instructions can be broadly divided into a first group of instructions suitable for execution using horizontal microinstructions and a second group of instructions unsuitable for such execution. The first instruction group is used much more frequently in software programs than the second instruction group. Therefore, the first instruction group accounts for most of the execution time of the software program.

The degree to which the second instruction group contributes to reducing the execution time of the software program is relatively small. The method of the present invention focuses on this and considers the handling of the second group of instructions, and uses software instructions that maintain compatibility between different devices so that the main memory can be used effectively. This makes it possible to significantly improve design efficiency.

Furthermore, what supports the present invention is the recent development of high-speed processing techniques for large-sized computers, such as buffer memory, parallel processing, and pipeline processing. As a result, it has become possible to expect a significant reduction in the processing time for basic arithmetic instructions.

Furthermore, the reason behind the necessity of the present invention is that it is essential to create a series of computers that can be built from small walls to large ones, and even ultra-large ones, using one architecture.
Firmware implementation, which is effective in improving performance in small and medium-diameter machines, does not necessarily have the same effect on large and ultra-large machines.

Therefore, in the present invention, software instructions belonging to the first instruction group (hereinafter collectively referred to as "first software instructions") use horizontal microinstructions, and software instructions belonging to the second instruction group (hereinafter "second software instructions") are used. (collectively referred to as soft instructions)
is a program written using software instructions belonging to the first instruction group (hereinafter referred to as an instruction program). Therefore.

When executing the second soft instructions, a plurality of first soft instructions A are included in the corresponding instruction program.

That is, AI, A2. It is necessary to execute A3, etc., and for this purpose, roughly AI, A2. It is necessary to execute a plurality of horizontal microinstructions that constitute A3 and the like.

Since the second soft instructions often involve sequential processing, even if horizontal microinstructions are used, only one function is often executed at a time.

Therefore, it can be used in the same way as a vertical microinstruction.

As a result, even if the second soft instruction is written as the first soft instruction, the same effect can be obtained. Moreover, since parallel processing of software instructions can be performed through the aforementioned vibe 2-in processing, etc., the execution time is actually becoming shorter.

In order to realize the above idea, it is insufficient to simply decipher software instructions and execute microprograms as in conventional devices. In order to execute the second soft instruction, first decode the software instruction to be executed, access the microprogram (written in horizontal microinstructions), and then start the instruction program corresponding to the second instruction. In addition, functions such as accessing microprograms to execute this program are required.

Next, the above operation will be explained in detail using the drawings.

The figure is a block diagram of one embodiment according to the scheme of the present invention.

Referring to the figure, one embodiment of the present invention has main memory (MM)
l, arithmetic circuit 2. Control memory circuit 3. and instruction data 7 etching circuit 4.

The main memory 1 stores a software program 11 that performs predetermined processing and a plurality of instruction program groups 12 written in software instructions. The arithmetic circuit 2 is controlled by the control storage circuit 3 and performs various arithmetic operations. The control memory circuit 3 is a control memory (O8) 3 that stores a microprogram written in microinstructions.
1. A control memory control circuit (C
3CNT) 34. Control memory address register 32 and address adder circuit 3 that supply addresses to control memory 31
It has 3.

The instruction fetch circuit 4 receives p by the control storage control circuit 34.
This is a circuit that is controlled by aI and retrieves software instructions and data from the main memory 1 and stores them. The seven-instruction circuit 4 includes an instruction register (■几) 41 for temporarily storing the fetched instruction. Data register (DB) 44 for temporarily storing retrieved data or data to be stored. Instruction counter (IC) that temporarily stores address data of instructions to be read
4!5゜Save register (SIJ47) that temporarily saves the address data of the instruction counter 45. Address addition circuit 46゜ that creates the address of the next instruction to be read @
or address adder (ADD) 42. which creates the address of the data to be written. and an address register 43 for temporarily storing addresses.

First, the operation for the software instruction A1 belonging to the first instruction group will be described.

This software instruction ARK is handled exactly the same as in the conventional device. That is, the address signal b stored in the instruction counter 45 is supplied to the main memory 1, and one instruction in the software program 11 stored at the address specified by the address signal is sent to the connection line 10.
1 and stored in the read command register 41. This stored one instruction is the software instruction AI. The starting address for reading the microprogram stored in the control memory 31 according to this software instruction AIK is stored in the control memory address register 32.

This address signal is transmitted to the control memory 3 via the connection line 108.
1. In response to this application, a series of horizontal microinstructions are read out and decoded by the control storage control circuit 34, and a control signal is provided to the arithmetic circuit 2 via connection a113 to execute the software instruction A1. In this execution, the required data is read out from the main memory 1. It may be written. On the other hand, the address of the next instruction from the software instruction Ax is created by the address addition circuit 46 and stored in the instruction counter 45. When the execution of the software instruction A1 by the microinstruction is completed, a request for the next instruction is issued from the control memory control circuit 34, the address signal stored in the instruction counter 45 is supplied to the main memory 1, and the above-mentioned operation is performed. is repeated. In this way, the software instructions AI belonging to the plurality of first instruction groups
.

A2, . . . , All are executed.

Next, the case of the software instruction Bl belonging to the second instruction group will be explained. The instruction read from the software program 11 in the main memory 1 and stored in the instruction register 41 according to the address signal of the instruction counter 45 is the software instruction B1. The address of the next instruction is stored in the instruction counter 45 by the software B1 in the same manner as the software instruction A1. Furthermore, the address of the control memory 31 designated by the software instruction Bl is supplied to the control memory 31 via the control memory address register 32 via the connection line 105, and the microinstruction stored at the address is read out.

In the control operation executed by the microinstruction read out by the software instruction B1, a control signal is generated and the address data in the instruction counter 45 is temporarily stored in the save register 47, and then the address data supplied from the control storage control circuit 34 is stored in the instruction counter via connection line 111. Next, the address data is supplied to the main memory l and stored at the address, which is the software B1.
The instruction program for is read out. This address is specified by the software instruction B1, and is the start address of the main memory area in which an instruction program in which the software instruction B1 is written as the software instruction A is stored.

In this way, the instruction log group 12 stored in the main memory 1 is accessed by the microinstruction, and the first instruction A1 of the instruction program written in the software instruction 131 f software instruction A is retrieved from a predetermined address. , are stored in the instruction register 41. The instruction AI is a software instruction belonging to the first type of instruction group,
This is executed by horizontal microinstructions stored in the control memory 31 in the same manner as described above. Below, software instructions A' + ' + A ' + 2+ . . . constitute an instruction program corresponding to software instruction B1.
+ 'A' 10m are sequentially read out and executed in the same way. Finally, the last software instruction Ao of the instruction program (common to a group of instruction programs in some cases) corresponding to the software instruction Bl is read out, and the instruction register 4 is read out.
It is stored in 1. In the control operation executed by the microinstruction stored in the control memory 31 corresponding to the software instruction AO, the ff1j control signal is generated and the address data temporarily stored in the save register 47 is transferred to the instruction counter 45. The address data is supplied to the main memory 1, and the next instruction of the software program 11 stored at the address is read out. At the same time, the control returns to microinstruction control for sequentially executing instructions on subsequent software blocks. Since the address data stored in the save register 47 is the address at which the instruction following the software instruction B1 is stored, the read instruction becomes an instruction to be executed following the software instruction B1.

As described above, the first soft instruction belonging to the first type of software instruction is conventionally executed using highly leveled microinstructions. Further, the second software instruction B belonging to the second type of software instruction is stored in the main memory 1 as an instruction program written in the first software instruction, Command M1. The address of the instruction counter 45 is temporarily saved, and the corresponding instruction program is accessed and executed. The last software instruction An executes the microinstruction MIO and returns to the execution of the software instructions following B.

Effects of the Invention By doing so, the number of inefficient horizontal microinstructions stored in the control memory 31 is significantly reduced, and the control memory 31 can be used efficiently.

Furthermore, when the second type of software instruction group is made into a microprogram, even if the computer system is designed with the same architecture, if the computer system is different, the microprogram will be different and must be designed for each system. However, if it is made into an instruction program, it will be extremely compatible since it is written using software instructions, and it will only require 9,000 designs.

As described above, the present invention is capable of significantly reducing control memory by executing software instructions by a microprogram in combination with execution by a microprogram via an instruction program. This has the effect of allowing highly compatible microprogram control between the two.

[Brief explanation of drawings]

The figure is a diagram showing an embodiment of the present invention. In the figure, ■... Main origin [(MM), 2...
...Arithmetic circuit, 3...Control memory circuit, 4.-
...Instruction data fetch circuit, 11...Software program 2, 12...-Instruction program, 31...Control memory (C8), 32...
...Control storage address register (8A), 33
−・−・Address addition circuit (10mL 34・・・・−
・Control memory control circuit (C8CNT 41...
Instruction register (IkL), 42... Address adder (ADD), 43... Address register (AH
), 44... Data register (D), 45.
--- Instruction counter (I 几は 46 ・-----
Address addition circuit (+n), 47-... Save register <sn), 101-116-... Connection line.

Claims (1)

[Scope of Claim] In a microprogram control method for a data processing device controlled by a microprogram stored in at least one of a control memory and a main memory, the main memory includes a first type of software instruction group and a second type of software instruction group. a software program including a second type of software instruction group; and an instruction program in which at least a part of the function of each instruction of the second type of software instruction group is configured by the first type of software instruction group. If the no-aware instruction stored and read from the main memory belongs to a first type of software instruction group, the execution of the instruction is controlled by the microprogram stored in at least one of the control memory and the main memory. and if the no-aware instruction read from the main memory belongs to a second type of software instruction group, start execution of the instruction program corresponding to at least a part of the function of the instruction, and execute the instruction program. A microprogram control method characterized in that upon termination, the microprogram is restarted and a software instruction is executed to return control to the microprogram.