JPS59193650A - Device for assigning automatically slave device address - Google Patents

Abstract

PURPOSE:To assign automatically an address in response to the distance from a master device to each slave device by providing a device returning back a reference pulse in response to the designation from a slave device designating device in the master device to each slave device. CONSTITUTION:The master device MS designates an optional slave device number to turn on a gate circuit of the slave device and a pulse generator 12 generates a reference pulse S and outputs the signal to a transmission line LS via a buffer amplifier 16. This pulse S is transmitted via the line LS, outputted to a receiving line LR via a gate circuit of the designated slave device, transmitted via the line LR and received as a return pulse at the master device MS. Then, the pulse R is transmitted to a delay time detecting circuit 13 via a buffer amplifier 17 of the master device MS. The circuit 13 discriminates the relation of far and near of distances x1, x2 or the like depending relatively on the delay time tau by detecting a difference DELTAtau between delay times tau1 and tau2.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention provides a transmitting/receiving system that transmits and receives signals between at least one parent unit and a plurality of slave units. This automatic slave device address assignment system is related to a device that automatically assigns addresses corresponding to distances of devices.

[Background technology and its problems]

In general, in language teaching systems (so-called L and L systems) and group meeting systems, there is at least one parent machine for teachers, chairpersons, etc., and multiple child machines depending on the number of students and conference participants. The parent clan can selectively and individually designate each child device and communicate with them. In this way, in order for the parent clan to be able to select and designate a desired child device, it is necessary that each child device be preset with a different number or address.

Conventionally, the number or address of each child device is
In many cases, the unique status of each slave unit is mechanically set, and the mechanical setting means built into each slave unit, such as switch contacts, jumper wires, or setting pins, are turned on and off. By doing so, the numerical value that becomes the above number or address was set. These mechanical setting means are designed to prevent setting values from becoming incorrect due to careless operation by the user when the system is installed.
It is usually placed in a place where it cannot be operated directly by hand, such as inside the housing of a single device, and it is not fixed or permanently set, such as with screws or dents. There are many.

However, in such a conventional system, when one device is added, deleted, or replaced during maintenance or repair of the system, it is extremely difficult to optimize the set value. For example, when replacing a malfunctioning device with a new device, if it is almost impossible to change the numerical settings for the number or address, you will need a new device with a setting value that is equal to the setting value of the old device. Therefore, suppliers such as manufacturers must prepare metal fittings with different set values, and the procedures for ordering and delivering a single device are troublesome and mistakes are likely to occur. Furthermore, even if it is possible to change the setting of the numerical value that becomes the number or address, it is necessary to take into account the relationship with one other device and be careful not to set the set numerical value by one.

Therefore, the inventor of this case previously applied for patent application No. 57-132091.
No. 58-42415, the authors proposed a device that automatically assigns different numbers and addresses to a group of slave devices that have the same structure but do not have unique numbers or addresses during system operation. There is. The basic operation of such a device is to judge the random numbers generated independently by each device on the friendly side or between child devices, eliminate duplicates, and repeat this process to obtain the final value. This allows each device to be assigned a different numerical value.

By the way, in the automatic assigning device which is the prior art of the present invention, the number and address of each device assigned by the device are as follows:
It has nothing to do with the physical placement position of the child devices themselves, and the allocation of numbers and addresses to each device is determined completely randomly for each operation and is not constant.

Unfortunately, if the allocation operation is completed, for example, the friendly side cannot specify and communicate with one device at a predetermined position.

[Purpose of the invention]

In view of the above-mentioned circumstances, the present invention provides for a transmitting/receiving system in which a different number or address is randomly given to each device in advance, and a physical or absolute The object of this invention is to provide a device for automatically allocating slave device addresses such as automatically allocating addresses to each device.

[Summary of the invention]

That is, the automatic slave number assignment device according to the present invention is characterized by a device that assigns an address to each device in a transmitting/receiving system that transmits and receives signals between at least one device and a plurality of devices. Automatic device address assignment is performed in the device, and the above friendship is achieved by sequentially specifying the pulse generator that transmits the reference pulse to each of the above devices, and one of each of the above devices, so that only the child device in question A slave device specifying means for controlling the sending and returning of the reference pulse; a delay time detecting means for detecting the delay time of the sent back pulse with respect to the reference pulse; address assignment means for allocating an address according to the distance of signal propagation from the goodwill device; It consists of having a means for sending back the information.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an apparatus for automatically allocating child device addresses according to the present invention will be described with reference to the drawings.

First, FIG. 1 is a block diagram schematically showing the basic configuration of the present invention.

In this Figure 1, at least one Goodwill (MS)
A transmission/reception system that transmits and receives signals between a computer and a plurality of devices (SLI, Sb2, etc.) can be applied, for example, to a language learning system (so-called LL system), a group conference system, etc. In FIG. 1, only the parts related to the operation of the automatic slave number assignment are extracted and illustrated. In such a transmission/reception system, a transmission line Ls and a reception line LR are derived from the goodwill (MS) as path lines, and the terminal ends of each line Ls and LR are connected to terminators TMs and TIVn, respectively. Transmission/reception line T as this pass line
, JS, and LR, a slave device (SLI) is connected at a distance X1 from the goodwill (MS), and a slave device (Sb2) is connected at a distance X2 from the goodwill (MS), respectively.

Each child device (SLI, Sb2...) has gate circuits G], , G2゜, etc. as means for transmitting the signal of the transmission line Ls as it is or after amplifying it and sending it back to the reception line LR, and these gate circuits Gl, G2. ... is goodwill (MS)
Only the circuit of the child device specified by the child device designation means 11 is in the on (conducting) state, and the others are in the off (blocking) state. Here, each child device ST, 1°Sb2, . By specifying one number, it is possible to turn on at least two gate circuits of the child device with that number.

The friendly MS has each child device SL1. ．． SL2. A pulse generator 12 that sends out a reference pulse, S, towards ..., and each child unit S
LI, SL2. a slave device designating means SD for specifying one of the above to turn on the gate circuit so that only the slave device in question sends back the reference pulse, and the slave device specified in response to the reference pulse S. A delay time detection means 13 detects the delay time of the return pulse R. sent back from the SL2. ...The first method is to allocate an absolute physical address according to the distance from Goodwill.
4.

To explain the operation of the basic configuration circuit as above,
First, the goodwill MS specifies an arbitrary child device number, turns on the gate circuit of the child device, generates a reference pulse S from the pulse generator 12, and sends it to the transmission line via the buffer amplifier 16. Output to Ls. This reference pulse S is propagated via the transmission line LS, passed through the gate circuit of the specified child device, and outputted to the reception line LR, propagated via this line LR, and returned pulses at the friendly AIS. 7 received at (・ and I-, this return pulse 1 (
is sent to the delay time detection means 13 via the buffer amplifier 17 of the friendly MS. The delay time detection means 13 detects the above j1 (it, t: return pulse 1? from the pulse generator).
Detects the delay time τ of , and calculates the distance X of each child device from the friendliness based on this delay time τ. For example, as shown in FIG. 2, with respect to the output of the reference pulse S, the child device SLI is: 1'
The delay time of the return pulse R・1 when 8 is specified is 1, and the return pulse I1.2 when slave units SL2, Sb2, . . . Each 11-ki interval of R3, · is τ2. τ3. It appears as...

Therefore, these delay times τ1, τ2 . τ3.・・・(
(Each child device SL accordingly), Sb2.Sb2...- distance Xl.

It determines X2+X3+... and assigns physical absolute addresses to each child device according to their distance.

By the way, the propagation speed of the pulse signal is
, is determined by the LR transfer function, distribution constant, etc.
In the signal transmission line of a general transmitting/receiving system (in the case of parallel lines), J'T'2 which approximately corresponds to the unit long delay time
is approximately 5 ns/rn, and it is extremely difficult to measure the absolute value of the delay time τ with high precision.

Therefore, each weekday time τ3 above. By detecting the difference Δτ between τ2, etc., the relative magnitude relationship of the delay time τ is determined,
Based on this, the distance relationship regarding the distance X is determined.

Furthermore, in the embodiment of the present invention described later, a plurality of reference pulses S are sequentially output while one slave unit is designated, and the delay time τ is detected and integrated multiple times for the same slave unit. By using a probabilistic method that compares this integral value between each child device, the accuracy of determining distance relationships is improved.

That is, FIG. 3 shows a specific example of the delay time detection means 13 of the friendly MS as a main part of an embodiment of the present invention. The other parts in FIG. 3 may be constructed in the same manner as in FIG. 1 described above, and therefore are not shown and will not be described here.

In FIG. 3, the variable delay circuit 21 of the delay time detection means 13 receives the reference pulse S from the pulse generator 12.
is delayed by a predetermined time τD, and this delayed pulse S
o is supplied to the D terminal (data input terminal) of the D-type flip-flop 22. The clock input terminal CK of the D-type flip-flop 22 is supplied with the above-mentioned return pulse 1 (.) from the buffer amplifier 17,
A pulse ■(・M) obtained by delaying the above-mentioned return pulse R by a partial time jM in a mono multi-circuit 23 is supplied to the clear terminal CL R of the circuit 2. Furthermore, the Q terminal of the J) type flip-flop 22 is supplied to the clear terminal CLR. The output is sent to counter 24.

In the delay time detection means 13 having the above configuration, one slave device is designated by the slave device designation means 11 of the device fν1S, and is delayed by the time τ with respect to the reference pulse S in FIG. The operation will be described when the delay time τD of the variable delay circuit 21 is changed to tDA, rDB, and rDC as shown in FIG. 4A, B, and C when the return pulse R. is obtained.

Generally, the D-type flip-flop 22 is chrono'/
EFf CJ (Nikronoku Pulse (Return Pulse R)
The D terminal input is output to the Q terminal at the time when the D terminal is input. However, when the above-mentioned time on the order of n5 (1") is an issue, the so-called set-up time tsu In other words, in order for the delayed pulse SD, which is input to the D terminal, to be transmitted to the Q terminal, it is necessary to consider the delay in the operation due to the above setup time t, which precedes the input time of the clock pulse (return pulse R,).
The delayed pulse SD must be input at a time before the reference pulse
This corresponds to making the delay time τD of the variable delay circuit 21 shorter than the difference τ−jsu with respect to su (τD<τ−tsu).

Figure 4 A shows the delay time τDA that satisfies this condition.
An example of (<τ-tsu) is shown, and a pulse output is obtained from the Q terminal of the D-type flip-flop 22 at the input timing (rising edge) of the return pulse R. On the other hand, when the delay time τDB in FIG. 4B is longer than the above τ-LSu (TDB>T-tsu), no pulse output is obtained from the Q terminal of the D-type flip-flop 22. .

Furthermore, as shown in the i-th (f'th) C, when the delay time τDC is equal to the above τ-tsu by 1 time (τDC〒τ-tsu), the output from the Q terminal is not a stochastic event, and D When the number of delayed pulses SD input to the terminal is 2', Q
The probability can be determined by counting the number of pulses obtained from the terminals.

Therefore, in a state where one child device is specified, the delay time τD of the variable delay circuit 21 is changed stepwise (for example, τDI, τD2, . . . , τDM in M stages), and for each of these delay times. By sending out a fixed plurality (for example, N) of reference pulses S and counting the number of output pulses from the Q terminal in response to the reference pulses S, a histogram as shown in FIG. 5, for example, can be obtained. Obtain such histograms for each slave unit,
The superimposed image is shown in FIG. In this Figure 6, discrete values are expressed continuously, - for example, 3
The histograms for the child units SLI, Sb2, and Sb2 of the stand are shown superimposed.

As is clear from FIG. 6, each slave device, for example SLl
, Sb2. The respective total numbers Σ1. of output pulses from the Q terminal of the D-type flip-frog 22 obtained when Sb2 is respectively set to Σ2゜Σ3. Alternatively, the histogram integral value may be a child device (for example, 5LI) that is close to the device MS.
If the device is small or far from the manufacturing MS (for example, 5L3
) gets bigger. In other words, the above Q for each child device
By comparing the total number of output pulses, it is possible to determine the distance (signal propagation distance) of each child device from the manufacturing device.

For example, as shown in FIG. 7, a multiplexer 32 is used to switch and select the output from each connection point of a plurality of buffer gate circuits 31, such as TTL, connected in series. Alternatively, as shown in FIG. 8, each selected terminal of the multiplexer 33 is connected via a line 34 of a predetermined length (for example, signal propagation time is about 1.ns), and the delay time at the switching step is Can be switched. In addition, digital ICJJ such as buffer gate 31
:,,Due to the difference in the basic structure of the element, υ number 113 to number + ns
However, the absolute accuracy of this delay time cannot be guaranteed to be high due to variations in the elements themselves, usage conditions such as ambient temperature, etc. even if the elements have the same structure. However, in the case of the present invention, relative time ratio measurement is performed, and since the operation is short-term (for example, within a few minutes), it is not affected by temperature drift, and it is possible to perform distance measurement at high 4kU. Then, the relative distance relationship of each child device to the parent domain is determined, and the address (absolute address) of each child device is avoided according to the determined distance order. be. .

As described above, in the embodiments of the present invention, the measurement of minute time differences, which is generally difficult, is carried out with high precision by introducing a statistic called a histogram, and as a result, the propagation delay time of the pulse signal can be measured with high accuracy. Distinguishing the distance of each child device based on the above is achieved easily and with high accuracy.

Next, in the embodiment of the present invention described above, the number of child devices is 20, and the path line length (line length from the parent MS to the terminator TM) is 20771. Minimum distance between child devices is 0.577
A specific example applied to the transmission/reception system of No. 2 will be explained.

FIG. 9 is a block diagram showing such a transmission/reception/system.
1, a pulse generator 12 and an address allocation means 14;
This is realized by the microcomputer 10. Since the other configurations are the same as those in FIGS. 1 and 3, corresponding parts will be designated by the same reference numerals and a description thereof will be omitted.

In FIG. 9, the microcomputer 10 has at least one input terminal IP and four output terminals OP.
, t, OF2, OF2, OF2, and the input/output of these terminals is as shown in FIG.

That is, the total number of pulses Σ(, which is the count value of the counter 24 of the delay time detection means 13) is input to the input terminal IP.
Alternatively, the histogram integral value) is input as, for example, 16-bit binary value data. A control signal is output from the output terminal OP1 to designate one of the child devices SLI to 5L20 and turn on the gate circuit3.The designation of the child device at this time is as described above. This is done based on random child device numbers (or temporary numbers) that have already been determined (before the address allocation/flipping operation of the present invention), and these child device numbers R, N1 to R.N.
Although they are different from each other, they are independent of the physical location of each child, for example, their distance from the parent domain.

Next, from the output terminal OP2, while one slave unit is specified by the output of the terminal 7-OP1, a plurality of reference pulses S (N x M pieces) are outputted from the output terminal OP2. From OP3, the delay time τD of the variable delay circuit 21 is set to 4.
A delay time control signal to be varied at stages τD] to τDM is output. Here, while the delay time τD is fixed at each stage, N reference pulses S, for example, 256, are output from the terminal OP2, and this is performed over M stages, for example, 256, so that For one child device, 65536 (=256×256) reference pulses S are output.

Here, the pulse period of the reference pulse S may be determined in consideration of the maximum delay time of the return pulse R1. That is, since the above path line length is 20 m and the maximum signal propagation distance is 40 m, the unit length propagation delay time! 5 ns
/m, the maximum delay time is approximately 200 ns. Therefore, the pulse period of the reference pulse S is 200 n
s or more is preferable, and in this specific example, as shown in FIG. 11, a reference pulse S with a pulse width of 500 ns and a pulse period of 1 μS is used. The delay time of the return pulse R2 at this time varies within a range of 200 nS, as shown by the arrow in FIG. Also, the delay time τD of the variable delay circuit 21
The unit delay time corresponding to the change width for one step of the stepwise change may be determined based on the minimum distance between slave devices. When this minimum distance is 0.5 m, the difference in the corresponding propagation delay time is is 5 ns, it is preferable to set it to 51 IS or less. In this specific example, the unit delay time is ins, and the delay time τD is changed in 256 steps from lns to 256 ns.

As mentioned above, while one slave device is specified, 655
36 reference pulses S are output, and the delay time of the corresponding return pulse R is the delay time τD of the above 256 steps.
At the time when the comparison with each of τD1 to τD256 is completed 256 times, the counter 24 outputs the total number of pulses Σ. This total number Σ is taken into the microconbeater 10 via the input terminal IP, and then a clear pulse (or pulse) is sent to the counter 24 from the output terminal 0J)4, thereby delaying the delay for the next child device. Initial settings for time detection operation are made.

By the way, the total number of Noculus for one child device Σ
It takes about 66m5 or more time to find the
Even if it is about 100m5 with some margin, all 20 slave units S
For LI to 5L20, after the total number of pulses Σ in 2 is calculated, these total numbers of pulses are compared relatively, and the distance of each child device to the device is determined, and this distance relationship is determined. Of course, the address (absolute address) of each slave device is assigned according to the address.

As explained above, according to the embodiments of the present invention, it is possible to reliably know the distance relative relationships of child units connected to a large number of branch points in a transmission/reception communication system configured with a pass line. Now, for each child of the branch point,
By adding sequential numbers in advance, it is possible to number the objects in order of arrangement (perspective #). This is because the sending reference pulse from the device (located at the end of the pass line) is sent back to the device through the child device, so that the sending and returning pulse propagation times can be compared accurately.

This is because a method called histogram integration method is used for highly accurate relative comparison of propagation times, and this method requires only a small amount of hardware.

Note that the present invention is not limited to the above-mentioned embodiments, and for example, the signal for specifying the child device may be transmitted via the transmission line Ls. Of course, various changes can be made within the scope of the invention.1゜[Effects of the Invention] As is clear from the above explanation, the slave device address automatic assignment according to the present invention can be made according to the device. A unique address (absolute address) can be automatically assigned to each child device according to the signal propagation distance from the device.

[Brief explanation of the drawing]

FIG. 1 is a block diagram schematically showing the basic configuration of the present invention, FIG. 2 is a time chart for explaining the operation of the circuit in FIG. 1, and FIG. 3 is a diagram showing an embodiment of the present invention. A block circuit diagram showing the main parts, Fig. 4 is a time chart to explain the operation of the circuit in Fig. 3, Figs. 5 and 6 show the free-lag flow knob output pulse when changing the delay time of the variable delay circuit. 7 and 8 are circuit diagrams showing a specific example of the time delay elements of the variable delay circuit, FIG. 9 is a block circuit diagram showing a specific example of the above embodiment, and FIGS. FIG. 11 is a time chart for explaining the operation of the circuit shown in FIG. MS...Equipment SLl, Sb2;...Slave device 11...Slave device designation means 12...Pulse generator 13...Delay time detection means 14...Address side 9 is means Gl , G, 11...Gate circuit 21...Variable delay circuit 22...D-type flimp flop 24...Counter Patent Applicant: Sony Corporation Representative Patent Attorney: Mr. Koike

Claims (1)

[Claims] [At least] Automatic slave address assignment, which allocates the address of each slave unit in a transmitting/receiving system that transmits and receives signals between a parent unit and multiple slave units, is performed in the device, and the parent unit is a pulse generator that transmits a reference pulse to the slave device, and a slave device designation means that sequentially designates one of the slave devices so that only the slave device sends back the reference pulse;
delay time detection means for detecting the delay time of the transmitted and returned pulses with respect to the reference pulse; An address assigning means for allocating an address is provided, and each slave device is characterized in that it has a means for sending back the reference pulse according to the specification from the parent slave device specifying means. Automatic child device address assignment I) Example is a device.